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Task #620

3.0.0.22

Added by paul leroy over 5 years ago. Updated over 5 years ago.

Status:
Closed
Priority:
High
Category:
-
Target version:
-
Start date:
12/02/2016
Due date:
% Done:

100%

Estimated time:
revision:
r0

Description

Suite à un problème de numérotation de la 3.0.0.21 (livrée en #619), numérotée par erreur 3.0.0.20, j'ai généré la révision 3.0.0.22 à partir des même sources, en changeant juste le numéro.

*****************************
*** 3.0.0.22  *** 12 FEB 2016
_______________________________________
__ fsw___ Changeset: 277 (8b34cd5a6c4b)

3.0.0.21 was wrongly numbered 3.0.0.20. this is the only correction

*****************************
*** 3.0.0.21  *** 11 FEB 2016
_______________________________________
__ fsw___ Changeset: 275 (7563e13131aa)

modification in snapshot synchro (some intervals were incorrect) but this was
not detectable with the configurations used for the tests
values < 22  are forbidden for the snapshot period
README (18.5 KB) README paul leroy, 12/02/2016 07:51 AM
fsw-3-0-0-22 (4.06 MB) fsw-3-0-0-22 paul leroy, 12/02/2016 07:51 AM
tests_time_asm_VHDL-1.1.89_FSW-3.0.0.22_2016_02_12_test (204 KB) tests_time_asm_VHDL-1.1.89_FSW-3.0.0.22_2016_02_12_test thomas chust, 12/02/2016 05:05 PM
tests_time_swf_VHDL-1.1.89_FSW-3.0.0.22_2016_02_12_test (215 KB) tests_time_swf_VHDL-1.1.89_FSW-3.0.0.22_2016_02_12_test thomas chust, 12/02/2016 05:05 PM
plot_delta_SWF_F0_test.png (252 KB) plot_delta_SWF_F0_test.png thomas chust, 12/02/2016 05:05 PM
plot_delta_SWF_F1_test.png (247 KB) plot_delta_SWF_F1_test.png thomas chust, 12/02/2016 05:05 PM
plot_delta_SWF_F2_test.png (251 KB) plot_delta_SWF_F2_test.png thomas chust, 12/02/2016 05:05 PM
tests_time_cwf_VHDL-1.1.89_FSW-3.0.0.22_2016_02_12_test (51.2 KB) tests_time_cwf_VHDL-1.1.89_FSW-3.0.0.22_2016_02_12_test thomas chust, 12/02/2016 05:08 PM
header_3_0_0_22.zip (68.1 KB) header_3_0_0_22.zip header version LPP 3.0.0.22 paul leroy, 08/03/2016 01:49 PM
src_3_0_0_22.zip (103 KB) src_3_0_0_22.zip src version LPP 3.0.0.22 paul leroy, 08/03/2016 01:49 PM
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Related issues

Related to Task #624: Long test with SBM1 and SBM2 FSW 3.0.0.22Closed2016-02-12

Related to Task #630: Long Test in normal mode in 3.0.0.22Closed2016-02-18

History

#1 Updated by Veronique bouzid over 5 years ago

Installation du software le 12/02/2016
dans /opt/LFR/LFR-FSW/3.0.0.22
Adaptation des scripts pour utiliser cette version.

Voici donc le nouvel environnement de test
FSW 3.0.0.22
VHDL 1.1.89
EM sans Timegen
SocExplorerEngine.getSocExplorer: Version = 0.6.2, Branch = default, Changeset = 819d0376d481
StarDundee

Lancement du script /home/validation/just_hk_survey.py : OK
-------------------------------------------------------------------------------

La premiere HK montre bien la bonne version du soft utilisé:

08:07:28.864291, TM_LFR_HK, CCSDS_VERSION_NUMBER = 0, PACKET_TYPE: TM_PACKET = 0, DATA_FIELD_HEADER_FLAG: WITH_HEADER = 1, PROCESS_ID: RPW_PID_2 = 76, PACKET_CATEGORY: HK_ROUTINE = 4, (PACKET_ID=0xcc4), SEGMENTATION_GROUPING_FLAG: STANDALONE_PACKET = 3, SEQUENCE_CNT=0, (PACKET_SEQUENCE_CONTROL=0xc000), PACKET_LENGTH=129, SPARE_1=0, PUS_VERSION = 1, SPARE_2=0, SERVICE_TYPE: HOUSEKEEPING_AND_DIAGNOSTIC_DATA_REPORTING = 3, SERVICE_SUBTYPE: HK_PARAMETER_REPORT = 25, DESTINATION_ID: GROUND = 0, TIME=0x8000000248c0, PA_LFR_HK_REPORT_SID: LFR_HK_SID = 1, HK_LFR_MODE: STANDBY = 0, HK_LFR_DPU_SPW_ENABLED: ENABLED = 1, HK_LFR_DPU_SPW_LINK_STATE: RUN = 5, SPARE=0x0, HK_LFR_SC_POTENTIEL_FLAG: ON = 1, HK_LFR_MAG_FIELDS_FLAG: OFF = 0, SY_LFR_WATCHDOG_ENABLED: ENABLED = 1, HK_LFR_CALIB_ENABLED: DISABLED = 0, HK_LFR_RESET_CAUSE: POWER_ON = 1, SY_LFR_SW_VERSION_N1=3, SY_LFR_SW_VERSION_N2=0, SY_LFR_SW_VERSION_N3=0, SY_LFR_SW_VERSION_N4=22, SY_LFR_FPGA_VERSION_N1=1, SY_LFR_FPGA_VERSION_N2=1, SY_LFR_FPGA_VERSION_N3=89, HK_LFR_CPU_LOAD=3.5294117647, HK_LFR_CPU_LOAD_MAX=3.5294117647, HK_LFR_CPU_LOAD_AVE=0.0, HK_LFR_Q_SD_FIFO_SIZE_MAX=0, HK_LFR_Q_SD_FIFO_SIZE=50, HK_LFR_Q_RV_FIFO_SIZE_MAX=0, HK_LFR_Q_RV_FIFO_SIZE=10, HK_LFR_Q_P0_FIFO_SIZE_MAX=0, HK_LFR_Q_P0_FIFO_SIZE=10, HK_LFR_Q_P1_FIFO_SIZE_MAX=0, HK_LFR_Q_P1_FIFO_SIZE=10, HK_LFR_Q_P2_FIFO_SIZE_MAX=0, HK_LFR_Q_P2_FIFO_SIZE=5, HK_LFR_UPDATE_INFO_TC_CNT=0, HK_LFR_UPDATE_TIME_TC_CNT=0, HK_LFR_EXE_TC_CNT=0, HK_LFR_REJ_TC_CNT=0, HK_LFR_LAST_EXE_TC_ID=0x0, HK_LFR_LAST_EXE_TC_TYPE=0, HK_LFR_LAST_EXE_TC_SUBTYPE=0, HK_LFR_LAST_EXE_TC_TIME=0x000000000000, HK_LFR_LAST_REJ_TC_ID=0x0, HK_LFR_LAST_REJ_TC_TYPE=0, HK_LFR_LAST_REJ_TC_SUBTYPE=0, HK_LFR_LAST_REJ_TC_TIME=0x000000000000, HK_LFR_LE_CNT=1, HK_LFR_ME_CNT=0, HK_LFR_HE_CNT=0, HK_LFR_LAST_ER_RID: LE_LFR_TIMEC = 42129, HK_LFR_LAST_ER_CODE: MISSING = 21, HK_LFR_LAST_ER_TIME=0x800000022f17, HK_LFR_VHDL_AA=0, HK_LFR_VHDL_SM=0, HK_LFR_VHDL_FFT=0, HK_LFR_VHDL_SR=0, HK_LFR_VHDL_CIC=0, HK_LFR_VHDL_HK=0, HK_LFR_VHDL_IIR=0, HK_LFR_VHDL_CAL=0, HK_LFR_DPU_SPW_PKT_RCV_CNT=0, HK_LFR_DPU_SPW_PKT_SENT_CNT=0, HK_LFR_DPU_SPW_TICK_OUT_CNT=0, HK_LFR_DPU_SPW_LAST_TIMC=0, HK_LFR_LAST_FAIL_ADDR=0x0, HK_LFR_TEMP_SCM=55.67degC, HK_LFR_TEMP_PCB=16.54degC, HK_LFR_TEMP_FPGA=18.24degC, HK_LFR_SC_V_F3=982, HK_LFR_SC_E1_F3=499, HK_LFR_SC_E2_F3=780, SPARE=0x0, SY_LFR_BW=1, SY_LFR_SP0=0, SY_LFR_SP1=0, SY_LFR_R0=0, SY_LFR_R1=0, SY_LFR_R2=0, HK_LFR_DPU_SPW_PARITY=0, HK_LFR_DPU_SPW_DISCONNECT=0, HK_LFR_DPU_SPW_ESCAPE=0, HK_LFR_DPU_SPW_CREDIT=0, HK_LFR_DPU_SPW_WRITE_SYNC=0, HK_LFR_DPU_SPW_RX_AHB=0, HK_LFR_DPU_SPW_TX_AHB=0, HK_LFR_DPU_SPW_EARLY_EOP=0, HK_LFR_DPU_SPW_INVALID_ADDR=0, HK_LFR_DPU_SPW_EEP=0, HK_LFR_DPU_SPW_RX_TOO_BIG=0, HK_LFR_TIMECODE_ERRONEOUS=0, HK_LFR_TIMECODE_MISSING=1, HK_LFR_TIMECODE_INVALID=0, HK_LFR_TIME_TIMECODE_IT=0, HK_LFR_TIME_NOT_SYNCHRO=0, HK_LFR_TIME_TIMECODE_CTR=0, HK_LFR_BUFFER_DPU_TC_FIFO=0, HK_LFR_BUFFER_DPU_TM_FIFO=0, HK_LFR_AHB_CORRECTABLE=0, HK_LFR_AHB_UNCORRECTABLE=0, SPARE=0x0

Les champs en gras sont ceux qui ont été générés depuis les dernieres versions > 3.0.0.10, excepté pour HK_LFR_RESET_CAUSE.
On voit bien que l'absence de reception de TIMECODE est correctement détectée et reportée dans les paramètres adéquats. Cette erreur n'est comptabilisée qu'une seule fois et non à chaque HK reçu.

La dermère HK
8:07:55.864038, TM_LFR_HK, CCSDS_VERSION_NUMBER = 0, PACKET_TYPE: TM_PACKET = 0, DATA_FIELD_HEADER_FLAG: WITH_HEADER = 1, PROCESS_ID: RPW_PID_2 = 76, PACKET_CATEGORY: HK_ROUTINE = 4, (PACKET_ID=0xcc4), SEGMENTATION_GROUPING_FLAG: STANDALONE_PACKET = 3, SEQUENCE_CNT=27, (PACKET_SEQUENCE_CONTROL=0xc01b), PACKET_LENGTH=129, SPARE_1=0, PUS_VERSION = 1, SPARE_2=0, SERVICE_TYPE: HOUSEKEEPING_AND_DIAGNOSTIC_DATA_REPORTING = 3, SERVICE_SUBTYPE: HK_PARAMETER_REPORT = 25, DESTINATION_ID: GROUND = 0, TIME=0x8000001d48bf, PA_LFR_HK_REPORT_SID: LFR_HK_SID = 1, HK_LFR_MODE: STANDBY = 0, HK_LFR_DPU_SPW_ENABLED: ENABLED = 1, HK_LFR_DPU_SPW_LINK_STATE: RUN = 5, SPARE=0x0, HK_LFR_SC_POTENTIEL_FLAG: ON = 1, HK_LFR_MAG_FIELDS_FLAG: OFF = 0, SY_LFR_WATCHDOG_ENABLED: ENABLED = 1, HK_LFR_CALIB_ENABLED: DISABLED = 0, HK_LFR_RESET_CAUSE: POWER_ON = 1, SY_LFR_SW_VERSION_N1=3, SY_LFR_SW_VERSION_N2=0, SY_LFR_SW_VERSION_N3=0, SY_LFR_SW_VERSION_N4=22, SY_LFR_FPGA_VERSION_N1=1, SY_LFR_FPGA_VERSION_N2=1, SY_LFR_FPGA_VERSION_N3=89, HK_LFR_CPU_LOAD=0.392156862745, HK_LFR_CPU_LOAD_MAX=3.5294117647, HK_LFR_CPU_LOAD_AVE=0.0, HK_LFR_Q_SD_FIFO_SIZE_MAX=1, HK_LFR_Q_SD_FIFO_SIZE=50, HK_LFR_Q_RV_FIFO_SIZE_MAX=0, HK_LFR_Q_RV_FIFO_SIZE=10, HK_LFR_Q_P0_FIFO_SIZE_MAX=0, HK_LFR_Q_P0_FIFO_SIZE=10, HK_LFR_Q_P1_FIFO_SIZE_MAX=0, HK_LFR_Q_P1_FIFO_SIZE=10, HK_LFR_Q_P2_FIFO_SIZE_MAX=0, HK_LFR_Q_P2_FIFO_SIZE=5, HK_LFR_UPDATE_INFO_TC_CNT=0, HK_LFR_UPDATE_TIME_TC_CNT=0, HK_LFR_EXE_TC_CNT=0, HK_LFR_REJ_TC_CNT=0, HK_LFR_LAST_EXE_TC_ID=0x0, HK_LFR_LAST_EXE_TC_TYPE=0, HK_LFR_LAST_EXE_TC_SUBTYPE=0, HK_LFR_LAST_EXE_TC_TIME=0x000000000000, HK_LFR_LAST_REJ_TC_ID=0x0, HK_LFR_LAST_REJ_TC_TYPE=0, HK_LFR_LAST_REJ_TC_SUBTYPE=0, HK_LFR_LAST_REJ_TC_TIME=0x000000000000, HK_LFR_LE_CNT=1, HK_LFR_ME_CNT=0, HK_LFR_HE_CNT=0, HK_LFR_LAST_ER_RID: LE_LFR_TIMEC = 42129, HK_LFR_LAST_ER_CODE: MISSING = 21, HK_LFR_LAST_ER_TIME=0x800000022f17, HK_LFR_VHDL_AA=0, HK_LFR_VHDL_SM=0, HK_LFR_VHDL_FFT=0, HK_LFR_VHDL_SR=0, HK_LFR_VHDL_CIC=0, HK_LFR_VHDL_HK=0, HK_LFR_VHDL_IIR=0, HK_LFR_VHDL_CAL=0, HK_LFR_DPU_SPW_PKT_RCV_CNT=0, HK_LFR_DPU_SPW_PKT_SENT_CNT=27, HK_LFR_DPU_SPW_TICK_OUT_CNT=0, HK_LFR_DPU_SPW_LAST_TIMC=0, HK_LFR_LAST_FAIL_ADDR=0x0, HK_LFR_TEMP_SCM=55.58degC, HK_LFR_TEMP_PCB=16.52degC, HK_LFR_TEMP_FPGA=18.36degC, HK_LFR_SC_V_F3=977, HK_LFR_SC_E1_F3=499, HK_LFR_SC_E2_F3=777, SPARE=0x0, SY_LFR_BW=1, SY_LFR_SP0=0, SY_LFR_SP1=0, SY_LFR_R0=0, SY_LFR_R1=0, SY_LFR_R2=0, HK_LFR_DPU_SPW_PARITY=0, HK_LFR_DPU_SPW_DISCONNECT=0, HK_LFR_DPU_SPW_ESCAPE=0, HK_LFR_DPU_SPW_CREDIT=0, HK_LFR_DPU_SPW_WRITE_SYNC=0, HK_LFR_DPU_SPW_RX_AHB=0, HK_LFR_DPU_SPW_TX_AHB=0, HK_LFR_DPU_SPW_EARLY_EOP=0, HK_LFR_DPU_SPW_INVALID_ADDR=0, HK_LFR_DPU_SPW_EEP=0, HK_LFR_DPU_SPW_RX_TOO_BIG=0, HK_LFR_TIMECODE_ERRONEOUS=0,* HK_LFR_TIMECODE_MISSING=1*, HK_LFR_TIMECODE_INVALID=0, HK_LFR_TIME_TIMECODE_IT=0, HK_LFR_TIME_NOT_SYNCHRO=0, HK_LFR_TIME_TIMECODE_CTR=0, HK_LFR_BUFFER_DPU_TC_FIFO=0, HK_LFR_BUFFER_DPU_TM_FIFO=0, HK_LFR_AHB_CORRECTABLE=0, HK_LFR_AHB_UNCORRECTABLE=0, SPARE=0x0

les fichiers de test (2016_02_12-08_07_56*) se trouvent dans /home/validation/data/R3/3.0.0.22/TESTS-UNITAIRES/just_hk.

Lancement du script /home/validation/just_normal_mode_swf_inconsistent.py pour tester SWP < 22 (#617) : OK
------------------------------------------------------------------------------------------------------------------------------------------------

Lancement du script /opt/VALIDATION/_R3/test_modes-noTimegen_normal+sbm1+sbm2+normal_22s.py
- 1800s de Normal mode
- 900s de SBM1
- 900s de SBM2
- 600s de NORMAL
- 600s de BURST
- 600s de NORMAL
- Fin en STANDBY

#2 Updated by Veronique bouzid over 5 years ago

  • Assignee set to thomas chust
  • Priority changed from Normal to High

Les fichiers (2016_02_12_08_23_12_packet*) se trouvent sur pc-instru Weekly Erased/Thomas/run-2016-02-12-3.0.0.22-1.1.89.
Les fichiers sont egelement sur pc-faust9 dans /home/validation/data/R3/3.0.0.22/TESTS-UNITAIRES/all-modes.

#3 Updated by Veronique bouzid over 5 years ago

  • Related to Task #624: Long test with SBM1 and SBM2 FSW 3.0.0.22 added

#5 Updated by Veronique bouzid over 5 years ago

#6 Updated by Veronique bouzid over 5 years ago

#7 Updated by bruno katra over 5 years ago

  • Status changed from New to In Progress
  • % Done changed from 0 to 100

Bonjour à tous.

Nous venons de livrer le FSW 3.0.0.22 via l'issue JIRA dédiée :
https://jira-lesia.obspm.fr/browse/RPWSSS-197

Il y a un résumé des nouvelles modifications et fonctionnalités dans le commentaire du JIRA.

C'est la version que nous utiliserons pour la calibration/validation du PFM LFR.

Bonne journée

Bruno

#8 Updated by thomas chust over 5 years ago

  • Related to Task #630: Long Test in normal mode in 3.0.0.22 added

#9 Updated by Veronique bouzid over 5 years ago

  • Status changed from In Progress to Closed

#10 Updated by paul leroy over 5 years ago

Fichiers sources et headers de la version 3.0.0.22.

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