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Bug #125
closedLFR ADC data justification
Start date:
17/04/2014
Due date:
% Done:
0%
Estimated time:
revision:
r342
Description
It seems that LFR ADC data are right justified, normally it should be right justified.
When we inject 1Vpp in LFR the data read is 4540pp instead of 1*6/65536.
It seems to be due to the 14 to 16 bit conversion.
Updated by Jean-Christophe Pellion over 10 years ago
- Status changed from New to Resolved
- Assignee changed from Jean-Christophe Pellion to paul leroy
LFR-EM - 0.1.11
- INFOS
Update Sample transformation between ADC and iir_filter
For ALL_SAMPLE :
SAMPLE_IIR(15 downto 0) <= SAMPLE_ADC(13 downto 0) & '0' & '0';
- PDB
https://hephaistos.lpp.polytechnique.fr/redmine/attachments/download/261/LFR-em-WFP_MS-0.1.11.pdb
----------------------------------------------------------------------------- - Revision
r353
https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/VHD_Lib/changeset/883154c0e96fc25b6db6ff74e82d5c6c6265d472
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Updated by paul leroy almost 10 years ago
- Status changed from Resolved to Closed
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