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SD card Library started, SDCARD init and detection OK
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1 \relax
2 \@setckpt{../../latex/header}{
3 \setcounter{page}{1}
4 \setcounter{equation}{0}
5 \setcounter{enumi}{0}
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18 \setcounter{figure}{0}
19 \setcounter{table}{0}
20 \setcounter{lstlisting}{0}
21 \setcounter{lstnumber}{1}
22 }
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1 \relax
2 \@setckpt{../../latex/header}{
3 \setcounter{page}{1}
4 \setcounter{equation}{0}
5 \setcounter{enumi}{0}
6 \setcounter{enumii}{0}
7 \setcounter{enumiii}{0}
8 \setcounter{enumiv}{0}
9 \setcounter{footnote}{0}
10 \setcounter{mpfootnote}{0}
11 \setcounter{part}{0}
12 \setcounter{chapter}{0}
13 \setcounter{section}{0}
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17 \setcounter{subparagraph}{0}
18 \setcounter{figure}{0}
19 \setcounter{table}{0}
20 \setcounter{lstlisting}{0}
21 \setcounter{lstnumber}{1}
22 }
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERSINSTALLPATH = $(LIBUC_BSP_INC_DIR)/BlueBoard
6 HEADERS += bsp.h
7 LIBSOURCES += bsp.c
8 OBJECTFILES = $(LIBSOURCES:.c=.o)
9 ARCH = lpc21XX-arm-noabi-gcc
10 ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
11 TARGET=libbsp
12 LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD)
13 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE)
14 TARGETINSTALLPATH=$(LIBUC_BSP_BIN_DIR)/BlueBoard
15 HEADERSINSTALLPATH=$(LIBUC_BSP_INC_DIR)/BlueBoard
16 BSP=generic
17 include $(ARCHFOLDER)/rules.mk
18
19 all:lib
20 @echo Code compiled
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1 TEMPLATE = lib
2 ARCH = lpc21XX-arm-noabi-gcc
3 TARGET = libbsp
4 TARGETINSTALLPATH = $(LIBUC_BSP_BIN_DIR)/BlueBoard
5 HEADERSINSTALLPATH = $(LIBUC_BSP_INC_DIR)/BlueBoard
6
7 LIBS += UART CORE
8
9 SOURCES += bsp.c
10
11
12 HEADERS += bsp.h
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "bsp.h"
23 #include "core.h"
24
25
26 unsigned int OSC0 =12000000;
27 unsigned int INTOSC =4000000;
28 unsigned int RTCOSC =32768;
29 unsigned int currentCpuFreq=0;
30 float VREF0 =(float)3.3;
31 uartDev* UART0=(uartDev*)0;
32 uartDev* UART1=(uartDev*)0;
33 uartDev* UART2=(uartDev*)0;
34 uartDev* UART3=(uartDev*)0;
35
36 i2cDev* IIC0=(i2cDev*)0;
37 i2cDev* IIC1=(i2cDev*)0;
38 i2cDev* IIC2=(i2cDev*)0;
39
40 sspDev* SSP0=(sspDev*)0;
41 sspDev* SSP1=(sspDev*)0;
42
43 eeprom24lc0xDev eeprom0;
44
45 int bsp_init()
46 {
47 bsp_GPIO_init();
48 coresetCpuFreq(20000000);
49 currentCpuFreq=coregetCpuFreq();
50 coresetCpuFreq(60000000);
51 currentCpuFreq=coregetCpuFreq();
52 bsp_uart_init();
53 bsp_iic_init();
54 bsp_ssp_init();
55 return 0;
56 }
57
58 void bsp_GPIO_init()
59 {
60 LPC_SC->PCONP |= ( 1 << 15 ); // power up GPIO
61 LPC_GPIO2->FIODIR |=255;
62 LEDS_OFF;
63 }
64
65 void bsp_uart_init()
66 {
67 LPC_SC->PCONP |= ( 1 << 24 ); // power up UART3
68 LPC_SC->PCONP |= ( 1 << 4 ); // power up UART1
69 LPC_PINCON->PINSEL0 |= (1<<4);
70 LPC_PINCON->PINSEL0 &= ~(1<<5);
71 LPC_PINCON->PINSEL0 |= (1<<6);
72 LPC_PINCON->PINSEL0 &= ~(1<<7);
73 LPC_PINCON->PINSEL0 |= (1<<20);
74 LPC_PINCON->PINSEL0 &= ~(1<<21);
75 LPC_PINCON->PINSEL0 |= (1<<22);
76 LPC_PINCON->PINSEL0 &= ~(1<<23);
77 UART0= uartopen(0);
78 uartsetup(UART0,38400,8,1,uartNoParity);
79 UART2= uartopen(2);
80 uartsetup(UART2,38400,8,1,uartNoParity);
81 }
82
83 void bsp_ssp_init()
84 {
85 SSP0 = sspopen(0); // power up SSP0
86 ssppowerup(SSP0);
87 sspsetpclkfactor(SSP0,1);
88 LPC_PINCON->PINSEL3 |= (3<<14); //MISO0 on P1.23
89 LPC_PINCON->PINSEL3 |= (3<<16); //MOSI0 on P1.24
90 LPC_PINCON->PINSEL3 |= (3<<8); //SCK0 on P1.24
91 LPC_PINCON->PINSEL3 |= (3<<10); //SSEL0 on P1.21
92 sspsetup(SSP0,8,FFSPI|CLKINHLOW|CKfirstEdge,loopbackOFF|MASTERMODE, 250000);
93 enableSSP(SSP0);
94 }
95
96
97 void bsp_iic_init()
98 {
99 LPC_SC->PCONP |= ( 1 << 7 ); // power up IIC0
100 LPC_PINCON->PINSEL1 |= (1<<22);
101 LPC_PINCON->PINSEL1 &= ~(1<<23);
102 LPC_PINCON->PINSEL1 |= (1<<24);
103 LPC_PINCON->PINSEL1 &= ~(1<<25);
104 IIC0 = i2copen(0);
105 i2csetdatarate(IIC0,100000);
106 eeprom24lc0xopen(&eeprom0,IIC0,0,2048);
107 }
108
109 void consoleputc(char c)
110 {
111 uartputc(UART0,c);
112 }
113
114
115 char consolegetc()
116 {
117 return uartgetc(UART0);
118 }
119
120
121
122 void vs10XXclearXCS(){}
123 void vs10XXsetXCS(){}
124 int vs10XXDREQ()
125 {
126 return 1;
127 }
128
129
130
131
132
133
134
135
136
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef BSP_H
23 #define BSP_H
24 #include "LPC23xx.h"
25 #include <uart.h>
26
27
28 extern uartDev* UART0;
29 extern uartDev* UART1;
30 extern uartDev* UART2;
31 extern uartDev* UART3;
32
33 extern i2cDev* IIC0;
34 extern i2cDev* IIC1;
35 extern i2cDev* IIC2;
36
37 extern sspDev* SSP0;
38 extern sspDev* SSP1;
39
40 extern eeprom24lc0xDev eeprom0;
41
42 extern float VREF0;
43
44 extern unsigned int currentCpuFreq;
45
46 #define pll0useInternal 0
47 #define pll0useMainOsc 1
48 #define pll0useRTC 2
49
50
51 #define pll0setClksrc(src) if((unsigned int)(src)<3) LPC_SC->CLKSRCSEL=(src)
52 #define pll0getClksrc (LPC_SC->CLKSRCSEL & 3)
53
54 #define LEDS_ON LPC_GPIO2->FIOSET = 255
55
56 #define LED1_ON LPC_GPIO2->FIOSET = (1<<0)
57 #define LED2_ON LPC_GPIO2->FIOSET = (1<<1)
58 #define LED3_ON LPC_GPIO2->FIOSET = (1<<2)
59 #define LED4_ON LPC_GPIO2->FIOSET = (1<<3)
60 #define LED5_ON LPC_GPIO2->FIOSET = (1<<4)
61 #define LED6_ON LPC_GPIO2->FIOSET = (1<<5)
62 #define LED7_ON LPC_GPIO2->FIOSET = (1<<6)
63 #define LED8_ON LPC_GPIO2->FIOSET = (1<<7)
64
65 #define LEDS_OFF LPC_GPIO2->FIOCLR = ~(255)
66
67 #define LED1_OFF LPC_GPIO2->FIOCLR = (1<<0)
68 #define LED2_OFF LPC_GPIO2->FIOCLR = (1<<1)
69 #define LED3_OFF LPC_GPIO2->FIOCLR = (1<<2)
70 #define LED4_OFF LPC_GPIO2->FIOCLR = (1<<3)
71 #define LED5_OFF LPC_GPIO2->FIOCLR = (1<<4)
72 #define LED6_OFF LPC_GPIO2->FIOCLR = (1<<5)
73 #define LED7_OFF LPC_GPIO2->FIOCLR = (1<<6)
74 #define LED8_OFF LPC_GPIO2->FIOCLR = (1<<7)
75
76 extern int bsp_init();
77
78 extern void bsp_GPIO_init();
79 extern void bsp_uart_init();
80 extern void bsp_iic_init();
81 extern void bsp_ssp_init();
82 extern void consoleputc(char);
83 extern char consolegetc();
84
85 /* VS1053 */
86 extern void clearXCS();
87 extern void setXCS();
88 extern int vs10XXDREQ();
89
90
91 #endif
92
93
94
95
96
97
98
99
100
101
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_SDCARD
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=LandTiger
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #include "uart.h"
27 #include "libucstrings.h"
28 #define __delay(t) for(volatile int i=0;i<t;i++);
29 #define ledspos1 LED1_OFF;LED2_ON;LED3_OFF;LED4_ON;LED5_OFF;LED6_ON;LED7_OFF;LED8_ON
30 #define ledspos2 LED1_ON;LED2_OFF;LED3_ON;LED4_OFF;LED5_ON;LED6_OFF;LED7_ON;LED8_OFF
31
32 void checkforsdcard();
33 void senddummyclocks(int n);
34 int sendCMD0();
35 int sendCMD8();
36 int sendACMD41(int arg);
37 int sendCMD55();
38 int sendCMD1();
39 int sendCMD58();
40
41 int main (void)
42 {
43 int i;
44 bsp_init();
45 uartsetbaudrate(UART0,38400);
46 checkforsdcard();
47 while(!bspsdcardpresent());
48 checkforsdcard();
49 __delay(1024*10);
50 senddummyclocks(74);
51 __delay(1024*100);
52 if(sendCMD0())
53 {
54 //__delay(1024*10);
55 if(sendCMD8())
56 {
57 // __delay(1024*10);
58 libucprintf("Maybe SD card V2 \n\r");
59 if(sendACMD41(1))
60 {
61 // __delay(1024*10);
62 i = sendCMD58();
63 if(0x40== (i & 0x40))
64 {
65 libucprintf("SD HC card \n\r");
66 }
67 else
68 {
69 libucprintf("SD card V2 \n\r");
70 }
71 }
72 else
73 {
74 libucprintf("Unknow card\n\r");
75 }
76 }
77 else
78 {
79 //libucprintf("Maybe SD card V1 \n\r");
80 if(sendACMD41(0))
81 {
82 libucprintf("SD card V1 \n\r");
83 }
84 else
85 {
86 if(sendCMD1())
87 {
88 libucprintf("MMC V3 card \n\r");
89 }
90 else
91 {
92 libucprintf("Unknow card\n\r");
93 }
94 }
95 }
96 }
97 __delay(1024);
98 while(1)
99 {
100 ledspos1;
101
102 __delay(1024*1024);
103 ledspos2;
104
105 __delay(1024*1024);
106 }
107 return 0;
108
109 }
110
111 int sendCMD0()
112 {
113 //libucprintf("Send CMD0\n\r");
114 int n=10;
115 char resp[8];
116 bspsdcardselect(1);
117 sspputc(SSP0,0x40);
118 sspputc(SSP0,0);
119 sspputc(SSP0,0);
120 sspputc(SSP0,0);
121 sspputc(SSP0,0);
122 sspputc(SSP0,0x95);
123 do
124 {sspgetnc(SSP0,resp,1);}
125 while(resp[0]!=1 && n--);
126
127 if(resp[0]==1)
128 {
129 //sspgetnc(SSP0,resp,8);
130 bspsdcardselect(0);
131 return 1;
132 }
133 else
134 {
135 //sspgetnc(SSP0,resp,8);
136 bspsdcardselect(0);
137 return 0;
138 }
139 }
140
141 int sendCMD1()
142 {
143 //libucprintf("Send CMD1\n\r");
144 int n=10;
145 char resp[8];
146 do{
147 bspsdcardselect(1);
148 sspputc(SSP0,0x41);
149 sspputc(SSP0,0);
150 sspputc(SSP0,0);
151 sspputc(SSP0,0);
152 sspputc(SSP0,0);
153 sspputc(SSP0,0x1);
154 do
155 {
156 sspgetnc(SSP0,resp,1);
157 }while((resp[0] &0x80) && n--);
158
159 n=10;
160 resp[0]=0xff;
161 }while(resp[0]>1);
162 if(resp[0]==0)
163 {
164 //sspgetnc(SSP0,resp,8);
165 bspsdcardselect(0);
166 return 1;
167 }
168 else
169 {
170 //sspgetnc(SSP0,resp,8);
171 bspsdcardselect(0);
172 return 0;
173 }
174 }
175
176
177 int sendCMD8()
178 {
179 //libucprintf("Send CMD8\n\r");
180 int n=10;
181 char resp[8];
182 bspsdcardselect(1);
183 sspputc(SSP0,0x48);
184 sspputc(SSP0,0);
185 sspputc(SSP0,0);
186 sspputc(SSP0,0x1);
187 sspputc(SSP0,0xAA);
188 sspputc(SSP0,0x87);
189 do
190 {sspgetnc(SSP0,resp,1);}
191 while(resp[0]!=1 && n--);
192
193 if(resp[0]==1)
194 {
195 //sspgetnc(SSP0,resp,8);
196 bspsdcardselect(0);
197 return 1;
198 }
199 else
200 {
201 //sspgetnc(SSP0,resp,8);
202 bspsdcardselect(0);
203 return 0;
204 }
205 }
206
207 int sendCMD55()
208 {
209 //libucprintf("Send CMD55\n\r");
210 int n=10;
211 char resp[8];
212 bspsdcardselect(1);
213 sspputc(SSP0,0x40|55);
214 sspputc(SSP0,0);
215 sspputc(SSP0,0);
216 sspputc(SSP0,0);
217 sspputc(SSP0,0);
218 sspputc(SSP0,0x63);
219 do
220 {sspgetnc(SSP0,resp,1);}
221 while(resp[0]!=1 && n--);
222
223 if(resp[0]==1)
224 {
225 //sspgetnc(SSP0,resp,8);
226 bspsdcardselect(0);
227 return 1;
228 }
229 else
230 {
231 //sspgetnc(SSP0,resp,8);
232 bspsdcardselect(0);
233 return 0;
234 }
235 }
236
237 int sendCMD58()
238 {
239 int n=10;
240 char resp[4];
241 //libucprintf("Send CMD58\n\r");
242 bspsdcardselect(1);
243 sspputc(SSP0,0x58);
244 sspputc(SSP0,0);
245 sspputc(SSP0,0);
246 sspputc(SSP0,0x0);
247 sspputc(SSP0,0x0);
248 sspputc(SSP0,0x1);
249 sspgetnc(SSP0,resp,4);
250 bspsdcardselect(0);
251 int a = resp[0]+(resp[1]<<8)+(resp[1]<<16)+(resp[1]<<24);
252 return a;
253 }
254
255
256
257 int sendACMD41(int arg)
258 {
259 //libucprintf("Send ACMD41\n\r");
260 int n=10;
261 char resp[10];
262 do{
263 sendCMD55();
264 __delay(1024);
265 n=10;
266 resp[0]=0xff;
267 bspsdcardselect(1);
268 sspputc(SSP0,0x80+0x41);
269 sspputc(SSP0,(char)(arg>>24));
270 sspputc(SSP0,(char)(arg>>16));
271 sspputc(SSP0,(char)(arg>>8));
272 sspputc(SSP0,(char)(arg));
273 sspputc(SSP0,0x1);
274 do
275 {
276 sspgetnc(SSP0,resp,1);
277 }while((resp[0] & 0x80) && n--);
278
279 }while(resp[0]>1);
280 if(resp[0]==0)
281 {
282 //sspgetnc(SSP0,resp,8);
283 bspsdcardselect(0);
284 return 1;
285 }
286 else
287 {
288 //sspgetnc(SSP0,resp,8);
289 bspsdcardselect(0);
290 return 0;
291 }
292 }
293
294
295
296
297 void senddummyclocks(int n)
298 {
299 libucprintf("Send dummy clocks\n\r");
300 while(n--)
301 {sspputc(SSP0,0xFF);}
302 }
303
304 void checkforsdcard()
305 {
306 if(bspsdcardpresent())libucprintf("SD card detected\n\r");
307 else libucprintf("NO SD card detected\n\r");
308 }
309
310
311
312
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1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_SDCARD
4 BSP = LandTiger
5
6 LIBS += SDCARD BLKDEVICE UART 24LC0X SSP IIC CORE UCSTRINGS
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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@@ -0,0 +1,20
1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_SDCARD
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=LandTiger
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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@@ -0,0 +1,97
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #include "uart.h"
27 #include "libucstrings.h"
28 #define __delay(t) for(volatile int i=0;i<t;i++);
29 #define ledspos1 LED1_OFF;LED2_ON;LED3_OFF;LED4_ON;LED5_OFF;LED6_ON;LED7_OFF;LED8_ON
30 #define ledspos2 LED1_ON;LED2_OFF;LED3_ON;LED4_OFF;LED5_ON;LED6_OFF;LED7_ON;LED8_OFF
31
32 int main (void)
33 {
34 int i,n;
35 char a[10];
36 bsp_init();
37 uartsetbaudrate(UART0,38400);
38 libucprintf("hello\n\r");
39 BLKDEVSDCARD0.initialize(&BLKDEVSDCARD0,0);
40 switch(SDCARD0.Stat)
41 {
42 case 0:
43 libucprintf("Card initialized\n\r");
44 break;
45 case STA_NOINIT :
46 libucprintf("Card NOT initialized\n\r");
47 break;
48 case STA_NODISK :
49 libucprintf("NO Card\n\r");
50 break;
51 case STA_PROTECT :
52 libucprintf("Card protected\n\r");
53 break;
54 default:
55 break;
56 }
57
58 switch(SDCARD0.CardType)
59 {
60 case CT_MMC:
61 libucprintf("Card is MMC\n\r");
62 break;
63 case CT_SD1:
64 libucprintf("Card is SD V1\n\r");
65 break;
66 case CT_SD2:
67 libucprintf("Card is SD V2\n\r");
68 break;
69 case CT_BLOCK|CT_SD2:
70 libucprintf("Card is SDHC\n\r");
71 break;
72 default:
73 break;
74 }
75 while(1)
76 {
77 ledspos1;
78
79 __delay(1024*1024);
80 ledspos2;
81
82 __delay(1024*1024);
83 }
84 return 0;
85
86 }
87
88
89
90
91
92
93
94
95
96
97
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1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_SDCARD
4 BSP = LandTiger
5
6 LIBS += SDCARD BLKDEVICE UART 24LC0X SSP IIC CORE UCSTRINGS
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4 include $(LIBUC)/rules/common/rules.mk
5
6 all:subdir
7 make -C lpc1768_iic_LandTiger
8 make -C lpc1768_led_blink
9 make -C lpc1768_led_blink_Clk_api
10 make -C lpc1768_ssp_LandTiger
11 make -C lpc1768_uart
12 make -C lpc1768_uart_LandTiger
13 @echo Code compiled
14
15 clean:
16 make clean -C lpc1768_iic_LandTiger
17 make clean -C lpc1768_led_blink
18 make clean -C lpc1768_led_blink_Clk_api
19 make clean -C lpc1768_ssp_LandTiger
20 make clean -C lpc1768_uart
21 make clean -C lpc1768_uart_LandTiger
22 @echo Code compiled
23
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_iic
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=LandTiger
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_iic
4 BSP = LandTiger
5
6 LIBS += SDCARD BLKDEVICE UART 24LC0X SSP IIC CORE UCSTRINGS
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #include "uart.h"
27 #include "libucstrings.h"
28 #define __delay(t) for(volatile int i=0;i<t;i++);
29 #define ledspos1 LED1_OFF;LED2_ON;LED3_OFF;LED4_ON;LED5_OFF;LED6_ON;LED7_OFF;LED8_ON
30 #define ledspos2 LED1_ON;LED2_OFF;LED3_ON;LED4_OFF;LED5_ON;LED6_OFF;LED7_ON;LED8_OFF
31 #define tableSize 256
32
33
34 void eepromTest();
35
36 int main (void)
37 {
38 bsp_init();
39 uartsetbaudrate(UART0,38400);
40 eepromTest();
41 libucprintf("CPU Freq =%dMHz\n\r",currentCpuFreq/1000000);
42 libucprintf("IIC Freq =%dKHz\n\r",i2cgetdatarate(IIC0)/1000);
43 while(1)
44 {
45 ledspos1;
46
47 __delay(1024*1024);
48 ledspos2;
49
50 __delay(1024*1024);
51
52 }
53 return 0;
54
55 }
56
57
58
59
60
61 void eepromTest()
62 {
63 unsigned char val1,val2;
64 unsigned char table1[256];
65 unsigned char table2[256];
66 int i=0;
67 for(i=0;i<tableSize;i++)table1[i]=i;
68 libucprintf("Writing 0x56 @ 0x10...");
69 eeprom24lc0xbytewrite(eeprom0,0x10,0x56);
70 libucprintf("\tdone\n\r");
71 libucprintf("Writing 0xF1 @ 0x39...");
72 eeprom24lc0xbytewrite(eeprom0,0x39,0xF1);
73 libucprintf("\tdone\n\r");
74 libucprintf("Reading @ 0x10 ...");
75 val1=eeprom24lc0xbyteread(eeprom0,0x10);
76 libucprintf("\tdone result = 0x%X\n\r",val1);
77 libucprintf("Reading @ 0x39 ...");
78 val2=eeprom24lc0xbyteread(eeprom0,0x39);
79 libucprintf("\tdone result = 0x%X\n\r",val2);
80
81
82 libucprintf("Writing folowing table @ 0x00");
83 libucprintchartable(table1,tableSize,"0x%X"," ");
84 libucprintf("...");
85 eeprom24lc0xwriten(eeprom0,0,table1, tableSize);
86 libucprintf("\tdone\n\r");
87 libucprintf("Reading table @ 0x00 ...");
88 eeprom24lc0xreadn(eeprom0,0,table2, tableSize);
89 libucprintf("\tdone\n\r");
90 libucprintf("result = ");
91 libucprintchartable(table2,tableSize,"0x%X"," ");
92 libucprintf("\n\r");
93 }
94
95
96
97
98
99
100
101
102
103
104
105
106
107
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_led_blink
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=mbed
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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@@ -0,0 +1,12
1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_led_blink
4 BSP = mbed
5
6 LIBS += UART
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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1 /* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
2 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
3 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
4 * THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
5 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */
6
7 #include "LPC17xx.h"
8
9 volatile uint32_t temp;
10
11 void _delay(uint32_t del);
12
13 int main (void)
14 {
15 LPC_SC->PCONP |= ( 1 << 15 ); // power up GPIO
16 LPC_GPIO1->FIODIR |= (1<<18); // puts P1.29 into output mode.
17 while(1)
18 {
19 LPC_GPIO1->FIOPIN |= (1<<18); // make P1.29 high
20 _delay( 1 << 24 );
21 LPC_GPIO1->FIOPIN &= ~(1<<18); // make P1.29 low
22 _delay( 1 << 24 );
23 }
24 return 0;
25
26 }
27 void _delay(uint32_t del)
28 {
29 uint32_t i;
30 for(i=0;i<del;i++)
31 temp = i;
32 }
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_led_blink
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=mbed
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_led_blink
4 BSP = mbed
5
6 LIBS += UART CORE
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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@@ -0,0 +1,63
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #define __delay(t) for(volatile int i=0;i<t;i++);
27
28 volatile uint32_t temp;
29
30 void _delay(uint32_t del);
31
32 int main (void)
33 {
34 int cpufreq=100000000;
35 bsp_init();
36 while(1)
37 {
38 if(cpufreq<1000000)
39 cpufreq=100000000;
40 else
41 {
42 if(cpufreq<30*1000*1000)
43 cpufreq-=20000;
44 else
45 cpufreq-=200000;
46 }
47 coresetCpuFreq(cpufreq);
48 LED1_ON;
49 __delay( 1 << 14 );
50 LED1_OFF;
51 __delay( 1 << 14 );
52 }
53 return 0;
54
55 }
56
57
58 void _delay(uint32_t del)
59 {
60 uint32_t i;
61 for(i=0;i<del;i++)
62 temp = i;
63 }
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_ssp
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=LandTiger
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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@@ -0,0 +1,12
1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_ssp
4 BSP = LandTiger
5
6 LIBS += 24LC0X UART SSP IIC CORE UCSTRINGS
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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@@ -0,0 +1,68
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #include "uart.h"
27 #include "libucstrings.h"
28 #define __delay(t) for(volatile int i=0;i<t;i++);
29
30
31 int main (void)
32 {
33 bsp_init();
34 uartsetbaudrate(UART0,38400);
35 int i = 0;
36 currentCpuFreq=coregetCpuFreq();
37 libucprintf("Current CPU Freq = %dHz \n\r",currentCpuFreq);
38 libucprintf("Current SSP0 PCLK Freq = %dHz \n\r",currentCpuFreq/sspgetpclkfactor(SSP0));
39 while(1)
40 {
41 LED1_OFF;
42 LED2_ON;
43 LED3_OFF;
44 LED4_ON;
45 LED5_OFF;
46 LED6_ON;
47 LED7_OFF;
48 LED8_ON;
49 //uartputs(UART2,"Hello World\n\r");
50 libucprintf("test %d \n\r",i++);
51 __delay(1024*1024);
52 sspputw(SSP0,0xA5);
53 LED1_ON;
54 LED2_OFF;
55 LED3_ON;
56 LED4_OFF;
57 LED5_ON;
58 LED6_OFF;
59 LED7_ON;
60 LED8_OFF;
61 //uartputs(UART0,"Hello World\n\r");
62 libucprintf("test %d \n\r",i++);
63 __delay(1024*1024);
64 }
65 return 0;
66
67 }
68
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@@ -0,0 +1,20
1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_uart
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=mbed
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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@@ -0,0 +1,12
1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_uart
4 BSP = mbed
5
6 LIBS += UART CORE UCSTRINGS
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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@@ -0,0 +1,49
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #include "uart.h"
27 #include "libucstrings.h"
28 #define __delay(t) for(volatile int i=0;i<t;i++);
29
30
31 int main (void)
32 {
33 bsp_init();
34 uartsetbaudrate(UART3,115200);
35 int i = 0;
36 while(1)
37 {
38 LED1_ON;
39 uartputs(UART3,"Hello World\n\r");
40 __delay(1024*1024);
41 LED1_OFF;
42 //uartputs(UART1,"Hello World\n\r");
43 libucprintf("test %d \n\r",i++);
44 __delay(1024*1024);
45 }
46 return 0;
47
48 }
49
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@@ -0,0 +1,20
1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERS +=
6 APPSOURCES += main.c
7 OBJECTFILES = $(APPSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lpc1768_uart
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=
14 HEADERSINSTALLPATH=
15 BSP=LandTiger
16 include $(ARCHFOLDER)/rules.mk
17
18 all:bin
19 @echo Code compiled
20
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@@ -0,0 +1,12
1 TEMPLATE = app
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = lpc1768_uart
4 BSP = LandTiger
5
6 LIBS += UART CORE UCSTRINGS
7
8 SOURCES += main.c
9
10
11 HEADERS +=
12
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@@ -0,0 +1,64
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "LPC17xx.h"
24 #include "bsp.h"
25 #include "core.h"
26 #include "uart.h"
27 #include "libucstrings.h"
28 #define __delay(t) for(volatile int i=0;i<t;i++);
29
30
31 int main (void)
32 {
33 bsp_init();
34 uartsetbaudrate(UART0,38400);
35 int i = 0;
36 while(1)
37 {
38 LED1_OFF;
39 LED2_ON;
40 LED3_OFF;
41 LED4_ON;
42 LED5_OFF;
43 LED6_ON;
44 LED7_OFF;
45 LED8_ON;
46 //uartputs(UART2,"Hello World\n\r");
47 libucprintf("test %d \n\r",i++);
48 __delay(1024*1024);
49 LED1_ON;
50 LED2_OFF;
51 LED3_ON;
52 LED4_OFF;
53 LED5_ON;
54 LED6_OFF;
55 LED7_ON;
56 LED8_OFF;
57 //uartputs(UART0,"Hello World\n\r");
58 libucprintf("test %d \n\r",i++);
59 __delay(1024*1024);
60 }
61 return 0;
62
63 }
64
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1 TEMPLATE = dir
2 SUBDIRS += lpc1768_iic_LandTiger \
3 lpc1768_led_blink \
4 lpc1768_led_blink_Clk_api \
5 lpc1768_ssp_LandTiger \
6 lpc1768_uart \
7 lpc1768_uart_LandTiger
8
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef B24LC0X_H
23 #define B24LC0X_H
24
25 #include "iic.h"
26
27 struct eeprom24LC0X_str
28 {
29 i2cDev* iicdev;
30 unsigned char devAddress;
31 unsigned char size;
32 };
33
34 typedef struct eeprom24LC0X_str eeprom24lc0xDev;
35
36
37 extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev* iicdev,unsigned char A0_A1_A2_val,unsigned int size);
38
39 extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
40 extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
41 extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data);
42 extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address);
43 extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
44 extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
45
46
47
48
49 #endif
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef BLKDEVICE_H
23 #define BLKDEVICE_H
24 /* Disk Status Bits (DSTATUS) */
25
26 #define STA_NOINIT 0x01 /* Drive not initialized */
27 #define STA_NODISK 0x02 /* No medium in the drive */
28 #define STA_PROTECT 0x04 /* Write protected */
29
30
31 /* Command code for disk_ioctrl fucntion */
32 /* Generic ioctl command (defined for FatFs) */
33 #define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
34 #define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
35 #define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
36 #define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
37 #define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
38
39 /* Generic ioctl command */
40 #define CTRL_POWER 5 /* Get/Set power status */
41 #define CTRL_LOCK 6 /* Lock/Unlock media removal */
42 #define CTRL_EJECT 7 /* Eject media */
43
44 /* MMC/SDC specific ioctl command */
45 #define MMC_GET_TYPE 10 /* Get card type */
46 #define MMC_GET_CSD 11 /* Get CSD */
47 #define MMC_GET_CID 12 /* Get CID */
48 #define MMC_GET_OCR 13 /* Get OCR */
49 #define MMC_GET_SDSTAT 14 /* Get SD status */
50
51 /* ATA/CF specific ioctl command */
52 #define ATA_GET_REV 20 /* Get F/W revision */
53 #define ATA_GET_MODEL 21 /* Get model name */
54 #define ATA_GET_SN 22 /* Get serial number */
55
56 /* NAND specific ioctl command */
57 #define NAND_FORMAT 30 /* Create physical format */
58
59 /* Status of Disk Functions */
60 typedef unsigned char DSTATUS;
61
62 /* Results of Disk Functions */
63 typedef enum {
64 RES_OK = 0, /* 0: Successful */
65 RES_ERROR, /* 1: R/W Error */
66 RES_WRPRT, /* 2: Write Protected */
67 RES_NOTRDY, /* 3: Not Ready */
68 RES_PARERR /* 4: Invalid Parameter */
69 } DRESULT;
70
71 typedef volatile struct blkdevice_str blkdevice;
72
73 typedef void (*blkdevselect_t)(char);
74 typedef void (*blkdevpower_t)(char) ;
75 typedef char (*blkdevdetect_t)() ;
76 typedef char (*blkdevwriteprotected_t)() ;
77 typedef DRESULT (*blkdevwrite_t)(blkdevice* _this,char drv,const char *buff,unsigned long sector,char count) ;
78 typedef DRESULT (*blkdevread_t)(blkdevice* _this,char drv,char *buff,unsigned long sector,char count) ;
79 typedef DRESULT (*blkdevioctl_t)(blkdevice* _this,char drv,char ctrl,void *buff) ;
80 typedef DSTATUS (*blkdevinitialize_t)(blkdevice* _this,char drv) ;
81 typedef DSTATUS (*blkdevstatus_t) (blkdevice* _this,char drv) ;
82
83 struct blkdevice_str
84 {
85 void* phy;
86 unsigned int size;
87 unsigned int MaxSpeed;
88 unsigned char Version;
89 blkdevselect_t select;
90 blkdevpower_t power;
91 blkdevdetect_t detect;
92 blkdevwriteprotected_t writeprotected;
93 blkdevwrite_t write;
94 blkdevread_t read;
95 blkdevioctl_t ioctl;
96 blkdevinitialize_t initialize;
97 blkdevstatus_t status;
98 };
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105 #endif
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef SDCARD_H
23 #define SDCARD_H
24 #include "blkdevice.h"
25 #include <libucstrings.h>
26
27 /* MMC/SD command */
28 #define CMD0 (0) /* GO_IDLE_STATE */
29 #define CMD1 (1) /* SEND_OP_COND (MMC) */
30 #define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
31 #define CMD8 (8) /* SEND_IF_COND */
32 #define CMD9 (9) /* SEND_CSD */
33 #define CMD10 (10) /* SEND_CID */
34 #define CMD12 (12) /* STOP_TRANSMISSION */
35 #define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
36 #define CMD16 (16) /* SET_BLOCKLEN */
37 #define CMD17 (17) /* READ_SINGLE_BLOCK */
38 #define CMD18 (18) /* READ_MULTIPLE_BLOCK */
39 #define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
40 #define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
41 #define CMD24 (24) /* WRITE_BLOCK */
42 #define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
43 #define CMD32 (32) /* ERASE_ER_BLK_START */
44 #define CMD33 (33) /* ERASE_ER_BLK_END */
45 #define CMD38 (38) /* ERASE */
46 #define CMD55 (55) /* APP_CMD */
47 #define CMD58 (58) /* READ_OCR */
48
49 /* Card type flags (CardType) */
50 #define CT_MMC 0x01 /* MMC ver 3 */
51 #define CT_SD1 0x02 /* SD ver 1 */
52 #define CT_SD2 0x04 /* SD ver 2 */
53 #define CT_SDC (CT_SD1|CT_SD2) /* SD */
54 #define CT_BLOCK 0x08 /* Block addressing */
55
56 struct sdcard_str
57 {
58 void* phy;
59 void (*rcvr_mmc) (void* phy,char *buff,unsigned int bc);
60 void (*xmit_mmc) (void* phy,const char *buff,unsigned int bc);
61 void (*setspeed) (void* phy,unsigned int speed);
62 DSTATUS Stat;
63 char CardType;
64 };
65
66 typedef volatile struct sdcard_str sdcardDev;
67
68 extern void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed));
69 extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected);
70
71 extern int sdcardselect (blkdevice* _this);
72 extern void sdcarddeselect (blkdevice* _this);
73 extern int sdcardwait_ready (sdcardDev* sdcard);
74 extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token);
75 extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr);
76 extern char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg);
77
78 extern DSTATUS sdcarddisk_status (blkdevice* _this,char drv);
79 extern DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv);
80 extern DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count);
81 extern DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count);
82 extern DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff);
83
84 #endif
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "LPC17xx.h"
23 #ifndef SSP_H
24 #define SSP_H
25
26 #define l4bits ((1<<1)+(1)) //0011 4 bit transfer
27 #define l5bits ((1<<2)) //0100 5 bit transfer
28 #define l6bits ((1<<2)+(1)) //0101 6 bit transfer
29 #define l7bits ((1<<1)+(1<<1)) //0110 7 bit transfer
30 #define l8bits ((1<<2)+(1<<1)+(1)) //0111 8 bit transfer
31 #define l9bits ((1<<3)) //1000 9 bit transfer
32 #define l10bits ((1<<3)+(1)) //1001 10 bit transfer
33 #define l11bits ((1<<3)+(1<<1)) //1010 11 bit transfer
34 #define l12bits ((1<<3)+(1<<1)+1) //1011 12 bit transfer
35 #define l13bits ((1<<3)+(1<<2)) //1100 13 bit transfer
36 #define l14bits ((1<<3)+(1<<2)+1) //1101 14 bit transfer
37 #define l15bits ((1<<3)+(1<<2)+(1<<1)) //1110 15 bit transfer
38 #define l16bits ((1<<3)+(1<<2)+(1<<1)+1) //1111 16 bit transfer
39
40 #define FFSPI 0
41 #define FFTI (1<<4)
42 #define FFMICROWIRE (1<<5)
43
44 #define CLKINHLOW 0
45 #define CLKINHHIGH (1<<6)
46
47 #define CKfirstEdge 0
48 #define CKsecondEdge (1<<7)
49
50
51
52 #define loopbackOFF 0
53 #define loopbackON 1
54
55 #define MASTERMODE 0
56 #define SLAVEMODE (1<<2)
57
58 #define SLAVEOUTPUTDISABLEMODE (1<<3)
59
60 #define sspisslave(dev) ((((dev)->SSPCtrlReg1>>2) & 1)==1)
61
62 struct sspRegs
63 {
64 unsigned long SSPCtrlReg0;
65 unsigned long SSPCtrlReg1;
66 unsigned long SSPDataReg;
67 unsigned long SSPStatReg;
68 unsigned long SSPClkPrescReg;
69 unsigned long SSPIntMaskReg;
70 unsigned long SSPRawIntStatReg;
71 unsigned long SSPMaskedIntStatReg;
72 unsigned long SSPIntClearReg;
73 unsigned long SSPDMACtrlReg;
74 };
75
76 typedef volatile struct sspRegs sspDev;
77
78 extern sspDev* sspopen(int count);
79 extern void sspputc(sspDev* dev,char c);
80 extern void sspputnc(sspDev* dev,const char *c,unsigned int n);
81 extern void sspputw(sspDev* dev,int c);
82 extern void sspputs(sspDev* dev,char *s);
83 extern void sspgets(sspDev* dev,char *s);
84 extern char sspgetc(sspDev* dev);
85 extern void sspgetnc(sspDev* dev,char *c,unsigned int n);
86 extern int sspgetw(sspDev* dev);
87 extern void enableSSP(sspDev* dev);
88 extern void disableSSP(sspDev* dev);
89 extern void sspsetup(sspDev* dev,unsigned char bitscount,int sspCtrlRegValue0,int sspCtrlRegValue1, unsigned int dataRate);
90 extern void sspsetupTRsize(sspDev* dev,unsigned char value);
91 extern unsigned char sspgetpclkfactor(sspDev* dev);
92 extern void sspsetpclkfactor(sspDev* dev,unsigned char pclkfactor);
93 extern void sspsetdatarate(sspDev* dev,unsigned int dataRate);
94
95 #endif
96
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1 #/*------------------------------------------------------------------------------
2 #-- This file is a part of the libuc, microcontroler library
3 #-- Copyright (C) 2011, Alexis Jeandet
4 #--
5 #-- This program is free software; you can redistribute it and/or modify
6 #-- it under the terms of the GNU General Public License as published by
7 #-- the Free Software Foundation; either version 3 of the License, or
8 #-- (at your option) any later version.
9 #--
10 #-- This program is distributed in the hope that it will be useful,
11 #-- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 #-- GNU General Public License for more details.
14 #--
15 #-- You should have received a copy of the GNU General Public License
16 #-- along with this program; if not, write to the Free Software
17 #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #-------------------------------------------------------------------------------
19 #-- Author : Alexis Jeandet
20 #-- Mail : alexis.jeandet@gmail.com
21 #-------------------------------------------------------------------------------*/
22
23
24 #define VSMODE 0
25 #define VSSTATUS 1
26 #define VSBASS 2
27 #define VSCLOCKF 3
28 #define VSDECODE_TIME 4
29 #define VSAUDATA 5
30 #define VSWRAM 6
31 #define VSWRAMADDR 7
32 #define VSHDAT0 8
33 #define VSHDAT1 9
34 #define VSAIADDR 0xA
35 #define VSVOL 0xB
36 #define VSAICTRL0 0xC
37 #define VSAICTRL1 0xD
38 #define VSAICTRL2 0xE
39 #define VSAICTRL3 0xF
40
41 struct vs1053Regs
42 {
43 sspDev* SSP_device;
44 int a;
45 };
46
47 typedef struct vs1053Regs vs1053Dev;
48
49 void vs1053open(vs1053Dev* codec,sspDev* dev);
50 void vs1053softreset(vs1053Dev* dev);
51 int vs1053cmdread(vs1053Dev* dev,char address);
52 void vs1053cmdwrite(vs1053Dev* dev,char address,int value);
53
54 extern void vs10XXclearXCS();
55 extern void vs10XXsetXCS();
56 extern int vs10XXDREQ();
57
58
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef BLKDEVICE_H
23 #define BLKDEVICE_H
24 /* Disk Status Bits (DSTATUS) */
25
26 #define STA_NOINIT 0x01 /* Drive not initialized */
27 #define STA_NODISK 0x02 /* No medium in the drive */
28 #define STA_PROTECT 0x04 /* Write protected */
29
30
31 /* Command code for disk_ioctrl fucntion */
32 /* Generic ioctl command (defined for FatFs) */
33 #define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
34 #define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
35 #define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
36 #define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
37 #define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
38
39 /* Generic ioctl command */
40 #define CTRL_POWER 5 /* Get/Set power status */
41 #define CTRL_LOCK 6 /* Lock/Unlock media removal */
42 #define CTRL_EJECT 7 /* Eject media */
43
44 /* MMC/SDC specific ioctl command */
45 #define MMC_GET_TYPE 10 /* Get card type */
46 #define MMC_GET_CSD 11 /* Get CSD */
47 #define MMC_GET_CID 12 /* Get CID */
48 #define MMC_GET_OCR 13 /* Get OCR */
49 #define MMC_GET_SDSTAT 14 /* Get SD status */
50
51 /* ATA/CF specific ioctl command */
52 #define ATA_GET_REV 20 /* Get F/W revision */
53 #define ATA_GET_MODEL 21 /* Get model name */
54 #define ATA_GET_SN 22 /* Get serial number */
55
56 /* NAND specific ioctl command */
57 #define NAND_FORMAT 30 /* Create physical format */
58
59 /* Status of Disk Functions */
60 typedef unsigned char DSTATUS;
61
62 /* Results of Disk Functions */
63 typedef enum {
64 RES_OK = 0, /* 0: Successful */
65 RES_ERROR, /* 1: R/W Error */
66 RES_WRPRT, /* 2: Write Protected */
67 RES_NOTRDY, /* 3: Not Ready */
68 RES_PARERR /* 4: Invalid Parameter */
69 } DRESULT;
70
71 typedef volatile struct blkdevice_str blkdevice;
72
73 typedef void (*blkdevselect_t)(char);
74 typedef void (*blkdevpower_t)(char) ;
75 typedef char (*blkdevdetect_t)() ;
76 typedef char (*blkdevwriteprotected_t)() ;
77 typedef DRESULT (*blkdevwrite_t)(blkdevice* _this,char drv,const char *buff,unsigned long sector,char count) ;
78 typedef DRESULT (*blkdevread_t)(blkdevice* _this,char drv,char *buff,unsigned long sector,char count) ;
79 typedef DRESULT (*blkdevioctl_t)(blkdevice* _this,char drv,char ctrl,void *buff) ;
80 typedef DSTATUS (*blkdevinitialize_t)(blkdevice* _this,char drv) ;
81 typedef DSTATUS (*blkdevstatus_t) (blkdevice* _this,char drv) ;
82
83 struct blkdevice_str
84 {
85 void* phy;
86 unsigned int size;
87 unsigned int MaxSpeed;
88 unsigned char Version;
89 blkdevselect_t select;
90 blkdevpower_t power;
91 blkdevdetect_t detect;
92 blkdevwriteprotected_t writeprotected;
93 blkdevwrite_t write;
94 blkdevread_t read;
95 blkdevioctl_t ioctl;
96 blkdevinitialize_t initialize;
97 blkdevstatus_t status;
98 };
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "LPC23xx.h"
23
24
25 #define pll0useInternal 0
26 #define pll0useMainOsc 1
27 #define pll0useRTC 2
28
29
30 #define pll0setClksrc(src) if((unsigned int)(src)<3) CLKSRCSEL=(src)
31 #define pll0getClksrc (CLKSRCSEL & 3)
32
33
34 extern void coresetCpuFreq(unsigned int freq);
35 extern unsigned int coregetCpuFreq();
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef SDCARD_H
23 #define SDCARD_H
24 #include "blkdevice.h"
25 #include <libucstrings.h>
26
27 /* MMC/SD command */
28 #define CMD0 (0) /* GO_IDLE_STATE */
29 #define CMD1 (1) /* SEND_OP_COND (MMC) */
30 #define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
31 #define CMD8 (8) /* SEND_IF_COND */
32 #define CMD9 (9) /* SEND_CSD */
33 #define CMD10 (10) /* SEND_CID */
34 #define CMD12 (12) /* STOP_TRANSMISSION */
35 #define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
36 #define CMD16 (16) /* SET_BLOCKLEN */
37 #define CMD17 (17) /* READ_SINGLE_BLOCK */
38 #define CMD18 (18) /* READ_MULTIPLE_BLOCK */
39 #define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
40 #define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
41 #define CMD24 (24) /* WRITE_BLOCK */
42 #define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
43 #define CMD32 (32) /* ERASE_ER_BLK_START */
44 #define CMD33 (33) /* ERASE_ER_BLK_END */
45 #define CMD38 (38) /* ERASE */
46 #define CMD55 (55) /* APP_CMD */
47 #define CMD58 (58) /* READ_OCR */
48
49 /* Card type flags (CardType) */
50 #define CT_MMC 0x01 /* MMC ver 3 */
51 #define CT_SD1 0x02 /* SD ver 1 */
52 #define CT_SD2 0x04 /* SD ver 2 */
53 #define CT_SDC (CT_SD1|CT_SD2) /* SD */
54 #define CT_BLOCK 0x08 /* Block addressing */
55
56 struct sdcard_str
57 {
58 void* phy;
59 void (*rcvr_mmc) (void* phy,char *buff,unsigned int bc);
60 void (*xmit_mmc) (void* phy,const char *buff,unsigned int bc);
61 void (*setspeed) (void* phy,unsigned int speed);
62 DSTATUS Stat;
63 char CardType;
64 };
65
66 typedef volatile struct sdcard_str sdcardDev;
67
68 extern void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed));
69 extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected);
70
71 extern int sdcardselect (blkdevice* _this);
72 extern void sdcarddeselect (blkdevice* _this);
73 extern int sdcardwait_ready (sdcardDev* sdcard);
74 extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token);
75 extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr);
76 extern char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg);
77
78 extern DSTATUS sdcarddisk_status (blkdevice* _this,char drv);
79 extern DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv);
80 extern DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count);
81 extern DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count);
82 extern DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff);
83
84 #endif
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1 #/*------------------------------------------------------------------------------
2 #-- This file is a part of the libuc, microcontroler library
3 #-- Copyright (C) 2011, Alexis Jeandet
4 #--
5 #-- This program is free software; you can redistribute it and/or modify
6 #-- it under the terms of the GNU General Public License as published by
7 #-- the Free Software Foundation; either version 3 of the License, or
8 #-- (at your option) any later version.
9 #--
10 #-- This program is distributed in the hope that it will be useful,
11 #-- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 #-- GNU General Public License for more details.
14 #--
15 #-- You should have received a copy of the GNU General Public License
16 #-- along with this program; if not, write to the Free Software
17 #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #-------------------------------------------------------------------------------
19 #-- Author : Alexis Jeandet
20 #-- Mail : alexis.jeandet@gmail.com
21 #-------------------------------------------------------------------------------*/
22
23
24
25 void clearstr(char* a);
26 void int2hex(unsigned long a,char*b);
27 int libucprintf(const char*,...);
28 int libucscanf(const char*,...);
29 void libucprintchartable(char* table,int size,const char* format,const char* separator);
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef UART_H
23 #define UART_H
24 #include "LPC23xx.h"
25
26
27 #define uartNoParity 0
28 #define uartOddParity 1
29 #define uartEvenParity 3
30 #define uartTrueParity 5
31 #define uartFalseParity 7
32
33 struct uartRegs
34 {
35 unsigned long RWreg;
36 unsigned long IntEN;
37 unsigned long IntIdFIFOctrlr;
38 unsigned long LineCtrl;
39 unsigned long dummy;
40 unsigned long LineStat;
41 unsigned long ScratchPad;
42 };
43
44 typedef volatile struct uartRegs uartDev;
45
46 extern uartDev* uartopen(int count);
47 extern void uarton(int count);
48 extern void uartoff(int count);
49 extern void uartputc(uartDev* dev,char c);
50 extern void uartputs(uartDev* dev,char *s);
51 extern void uartgets(uartDev* dev,char *s);
52 extern char uartgetc(uartDev* dev);
53 extern void uartsetbaudrate(uartDev* dev,unsigned int baudRate);
54 extern unsigned char uartgetpclkfactor(uartDev* dev);
55 extern void uartsetpclkfactor(uartDev* dev,unsigned char pclkfactor);
56 extern void uartsetup(uartDev* dev,unsigned int baudRate,unsigned char WordLength,unsigned char StopBitCnt,unsigned char Parity);
57
58 #endif
59
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "24LC0X.h"
23 #include "iic.h"
24 #include "core.h"
25 /*
26 struct 24LC0X_str
27 {
28 i2cDev* iicdev;
29 unsigned char devAddress;
30 unsigned char size;
31 };
32 */
33
34
35 void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev* iicdev,unsigned char A0_A1_A2_val,unsigned int size)
36 {
37 dev->iicdev = iicdev;
38 dev->devAddress = 0x50 | (A0_A1_A2_val & 0x7);
39 if(size == 2048) dev->size = 2;
40 if(size == 1024) dev->size = 1;
41 }
42
43 void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page)
44 {
45 int cmdcnt=1,datacnt=8;
46 i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,page,&datacnt);
47 }
48
49
50 void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page)
51 {
52 int cmdcnt=1,datacnt=8;
53 i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt);
54 i2cread(dev.iicdev,dev.devAddress,page,&datacnt);
55 }
56
57 void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data)
58 {
59 int cmdcnt=1,datacnt=1;
60 i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,&data,&datacnt);
61 }
62
63
64 unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address)
65 {
66 int cmdcnt=1,datacnt=1;
67 unsigned char data = 0;
68 i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt);
69 i2cread(dev.iicdev,dev.devAddress,&data,&datacnt);
70 return data;
71 }
72
73
74 void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count)
75 {
76 int cmdcnt=1,datacnt=count;
77 i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt);
78 i2cread(dev.iicdev,dev.devAddress,data,&datacnt);
79
80 }
81
82 void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count)
83 {
84 int cmdcnt=1,datacnt=8;
85 while(count >8)
86 {
87 cmdcnt=1;datacnt=8;
88 while(i2noerr!=i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,data,&datacnt)){cmdcnt=1;datacnt=8;}
89 count-=8;
90 address+=8;
91 data+=8;
92 }
93 cmdcnt=1;datacnt=count;
94 while(i2noerr!=i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,data,&datacnt)){cmdcnt=1;datacnt=count;}
95 }
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef B24LC0X_H
23 #define B24LC0X_H
24
25 #include "iic.h"
26
27 struct eeprom24LC0X_str
28 {
29 i2cDev* iicdev;
30 unsigned char devAddress;
31 unsigned char size;
32 };
33
34 typedef struct eeprom24LC0X_str eeprom24lc0xDev;
35
36
37 extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev* iicdev,unsigned char A0_A1_A2_val,unsigned int size);
38
39 extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
40 extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
41 extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data);
42 extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address);
43 extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
44 extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
45
46
47
48
49 #endif
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1 TEMPLATE = lib
2
3 lpc17XX.ARCH = lpc17XX-arm-noabi-gcc
4 lpc17XX.TARGET = lib24lc0X
5 lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_24LC0X)
6 lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_24LC0X)
7
8 lpc17XX.LIBS += CORE IIC
9
10 lpc17XX.SOURCES += 24LC0X.c
11
12
13 lpc17XX.HEADERS += 24LC0X.h
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 all:
6 make -f lpc17XX.mk
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_24LC0X)
5 HEADERS += 24LC0X.h
6 LIBSOURCES += 24LC0X.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=lib24lc0X
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_IIC_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC)
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_24LC0X)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_24LC0X)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1 TEMPLATE = dir
2 SUBDIRS += 24LC0X
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4 include $(LIBUC)/rules/common/rules.mk
5
6 all:subdir
7 make -C 24LC0X
8 @echo Code compiled
9
10 clean:
11 make clean -C 24LC0X
12 @echo Code compiled
13
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 all:
6 make -f lpc17XX.mk
7 make -f lpc21XX.mk
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22
23 #include "blkdevice.h"
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef BLKDEVICE_H
23 #define BLKDEVICE_H
24 /* Disk Status Bits (DSTATUS) */
25
26 #define STA_NOINIT 0x01 /* Drive not initialized */
27 #define STA_NODISK 0x02 /* No medium in the drive */
28 #define STA_PROTECT 0x04 /* Write protected */
29
30
31 /* Command code for disk_ioctrl fucntion */
32 /* Generic ioctl command (defined for FatFs) */
33 #define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
34 #define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
35 #define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
36 #define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
37 #define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
38
39 /* Generic ioctl command */
40 #define CTRL_POWER 5 /* Get/Set power status */
41 #define CTRL_LOCK 6 /* Lock/Unlock media removal */
42 #define CTRL_EJECT 7 /* Eject media */
43
44 /* MMC/SDC specific ioctl command */
45 #define MMC_GET_TYPE 10 /* Get card type */
46 #define MMC_GET_CSD 11 /* Get CSD */
47 #define MMC_GET_CID 12 /* Get CID */
48 #define MMC_GET_OCR 13 /* Get OCR */
49 #define MMC_GET_SDSTAT 14 /* Get SD status */
50
51 /* ATA/CF specific ioctl command */
52 #define ATA_GET_REV 20 /* Get F/W revision */
53 #define ATA_GET_MODEL 21 /* Get model name */
54 #define ATA_GET_SN 22 /* Get serial number */
55
56 /* NAND specific ioctl command */
57 #define NAND_FORMAT 30 /* Create physical format */
58
59 /* Status of Disk Functions */
60 typedef unsigned char DSTATUS;
61
62 /* Results of Disk Functions */
63 typedef enum {
64 RES_OK = 0, /* 0: Successful */
65 RES_ERROR, /* 1: R/W Error */
66 RES_WRPRT, /* 2: Write Protected */
67 RES_NOTRDY, /* 3: Not Ready */
68 RES_PARERR /* 4: Invalid Parameter */
69 } DRESULT;
70
71 typedef volatile struct blkdevice_str blkdevice;
72
73 typedef void (*blkdevselect_t)(char);
74 typedef void (*blkdevpower_t)(char) ;
75 typedef char (*blkdevdetect_t)() ;
76 typedef char (*blkdevwriteprotected_t)() ;
77 typedef DRESULT (*blkdevwrite_t)(blkdevice* _this,char drv,const char *buff,unsigned long sector,char count) ;
78 typedef DRESULT (*blkdevread_t)(blkdevice* _this,char drv,char *buff,unsigned long sector,char count) ;
79 typedef DRESULT (*blkdevioctl_t)(blkdevice* _this,char drv,char ctrl,void *buff) ;
80 typedef DSTATUS (*blkdevinitialize_t)(blkdevice* _this,char drv) ;
81 typedef DSTATUS (*blkdevstatus_t) (blkdevice* _this,char drv) ;
82
83 struct blkdevice_str
84 {
85 void* phy;
86 unsigned int size;
87 unsigned int MaxSpeed;
88 unsigned char Version;
89 blkdevselect_t select;
90 blkdevpower_t power;
91 blkdevdetect_t detect;
92 blkdevwriteprotected_t writeprotected;
93 blkdevwrite_t write;
94 blkdevread_t read;
95 blkdevioctl_t ioctl;
96 blkdevinitialize_t initialize;
97 blkdevstatus_t status;
98 };
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105 #endif
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1 TEMPLATE = lib
2 lpc17XX.ARCH = lpc17XX-arm-noabi-gcc
3 lpc17XX.TARGET = libblkdevice
4 lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_BLKDEVICE)
5 lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE)
6
7 lpc17XX.LIBS +=
8
9 lpc17XX.SOURCES += blkdevice.c
10
11
12 lpc17XX.HEADERS += blkdevice.h
13
14
15
16 lpc21XX.ARCH = lpc21XX-arm-noabi-gcc
17 lpc21XX.TARGET = libblkdevice
18 lpc21XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_BLKDEVICE)
19 lpc21XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE)
20
21 lpc21XX.LIBS +=
22
23 lpc21XX.SOURCES += blkdevice.c
24
25
26 lpc21XX.HEADERS += blkdevice.h
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE)
5 HEADERS += blkdevice.h
6 LIBSOURCES += blkdevice.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=libblkdevice
11 LIBUC_INCLUDES=
12 LIBUC_LIBRARIES=
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_BLKDEVICE)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_BLKDEVICE)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE)
5 HEADERS += blkdevice.h
6 LIBSOURCES += blkdevice.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc21XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
10 TARGET=libblkdevice
11 LIBUC_INCLUDES=
12 LIBUC_LIBRARIES=
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_BLKDEVICE)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_BLKDEVICE)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4 include $(LIBUC)/rules/common/rules.mk
5
6 all:subdir
7 make -C 24LCXX
8 make -C STRINGS
9 make -C VS10XX
10 make -C SDCARD
11 make -C BLOCKDEVICES
12 @echo Code compiled
13
14 clean:
15 make clean -C 24LCXX
16 make clean -C STRINGS
17 make clean -C VS10XX
18 make clean -C SDCARD
19 make clean -C BLOCKDEVICES
20 @echo Code compiled
21
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 all:
6 make -f lpc17XX.mk
7 make -f lpc21XX.mk
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD)
5 HEADERS += sdcard.h
6 LIBSOURCES += sdcard.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=libsdcard
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS)
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_SDCARD)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_SDCARD)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD)
5 HEADERS += sdcard.h
6 LIBSOURCES += sdcard.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc21XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
10 TARGET=libsdcard
11 LIBUC_INCLUDES=$(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD)
12 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE)
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_SDCARD)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_SDCARD)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "sdcard.h"
23 static volatile
24 unsigned int Timer1, Timer2; /* 1kHz decrement timer stopped at zero (disk_timerproc()) */
25
26 void sdcarddeselect (blkdevice* _this)
27 {
28 char d;
29 _this->select(0);
30 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1); /* Dummy clock (force DO hi-z for multiple slave SPI) */
31 }
32
33 int sdcardselect (blkdevice* _this) /* 1:OK, 0:Timeout */
34 {
35 char d;
36 _this->select(1);
37 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1); /* Dummy clock (force DO enabled) */
38
39 if (sdcardwait_ready(((sdcardDev*)_this->phy))) return 1; /* OK */
40 _this->select(0);
41 return 0; /* Timeout */
42 }
43
44 int sdcardwait_ready (sdcardDev* sdcard) /* 1:OK, 0:Timeout */
45 {
46 char d;
47 unsigned int tmr;
48 volatile unsigned int i=0;
49
50 for (tmr = 5000; tmr; tmr--) { /* Wait for ready in timeout of 500ms */
51 sdcard->rcvr_mmc(sdcard->phy,&d, 1);
52 if (d == 0xFF) break;
53 for(i=0;i<1024*128;i++);
54 }
55
56 return tmr ? 1 : 0;
57 }
58
59 int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr)
60 {
61 char d[2];
62 unsigned int tmr;
63 volatile unsigned int i=0;
64 for (tmr = 1000; tmr; tmr--) { /* Wait for data packet in timeout of 100ms */
65 sdcard->rcvr_mmc(sdcard->phy,d, 1);
66 if (d[0] != 0xFF) break;
67 for(i=0;i<1024*128;i++);
68 }
69 if (d[0] != 0xFE) return 0; /* If not valid data token, return with error */
70
71 sdcard->rcvr_mmc(sdcard->phy,buff, btr); /* Receive the data block into buffer */
72 sdcard->rcvr_mmc(sdcard->phy,d, 2); /* Discard CRC */
73
74 return 1; /* Return with success */
75 }
76
77
78 int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token)
79 {
80 char d[2];
81
82
83 if (!sdcardwait_ready(sdcard)) return 0;
84
85 d[0] = token;
86 sdcard->xmit_mmc(sdcard->phy,d, 1); /* Xmit a token */
87 if (token != 0xFD) { /* Is it data token? */
88 sdcard->xmit_mmc(sdcard->phy,buff, 512); /* Xmit the 512 byte data block to MMC */
89 sdcard->rcvr_mmc(sdcard->phy,d, 2); /* Xmit dummy CRC (0xFF,0xFF) */
90 sdcard->rcvr_mmc(sdcard->phy,d, 1); /* Receive data response */
91 if ((d[0] & 0x1F) != 0x05) /* If not accepted, return with error */
92 return 0;
93 }
94
95 return 1;
96 }
97
98
99 char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg)
100 {
101 char n, d, buf[6];
102
103
104 if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
105 cmd &= 0x7F;
106 n = sdcardsend_cmd(_this,CMD55, 0);
107 if (n > 1) return n;
108 }
109 /* Select the card and wait for ready */
110 sdcarddeselect(_this);
111 if (!sdcardselect(_this)) return 0xFF;
112 /* Send a command packet */
113 buf[0] = 0x40 | cmd; /* Start + Command index */
114 buf[1] = (char)(arg >> 24); /* Argument[31..24] */
115 buf[2] = (char)(arg >> 16); /* Argument[23..16] */
116 buf[3] = (char)(arg >> 8); /* Argument[15..8] */
117 buf[4] = (char)arg; /* Argument[7..0] */
118 n = 0x01; /* Dummy CRC + Stop */
119 if (cmd == CMD0) n = 0x95; /* (valid CRC for CMD0(0)) */
120 if (cmd == CMD8) n = 0x87; /* (valid CRC for CMD8(0x1AA)) */
121 if (cmd == CMD55) n = 0x63;
122 buf[5] = n;
123 ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,buf, 6);
124 /* Receive command response */
125 if (cmd == CMD12) {((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1);} /* Skip a stuff byte when stop reading */
126 n = 10; /* Wait for a valid response in timeout of 10 attempts */
127 do
128 {
129 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1);
130 //libucprintf("resp=%d\n\r",d);
131 }
132 while ((d & 0x80) && --n);
133
134 return d; /* Return with the response value */
135 }
136
137
138
139
140 DSTATUS sdcarddisk_status (blkdevice* _this,char drv)
141 {
142 DSTATUS s = ((sdcardDev*)_this->phy)->Stat;
143 char ocr[4];
144
145
146 if (drv || !_this->detect()) {
147 s = STA_NODISK | STA_NOINIT;
148 } else {
149 s &= ~STA_NODISK;
150 if (_this->writeprotected()) /* Check card write protection */
151 s |= STA_PROTECT;
152 else
153 s &= ~STA_PROTECT;
154 if (!(s & STA_NOINIT)) {
155 if (sdcardsend_cmd(_this,CMD58, 0)) /* Check if the card is kept initialized */
156 s |= STA_NOINIT;
157 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ocr, 4);
158 _this->select(0);
159 }
160 }
161 ((sdcardDev*)_this->phy)->Stat = s;
162
163 return s;
164 }
165
166
167
168
169 DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv)
170 {
171 char n, cmd, ty, ocr[4];
172 const unsigned char dummy=0xff;
173
174 ((sdcardDev*)_this->phy)->setspeed(((sdcardDev*)_this->phy)->phy,350000);
175 if (drv) return STA_NOINIT; /* Supports only drive 0 */
176 if (((sdcardDev*)_this->phy)->Stat & STA_NODISK) return ((sdcardDev*)_this->phy)->Stat; /* Is card existing in the soket? */
177
178 for (n = 10; n; n--) ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1); /* Send 80 dummy clocks */
179
180 ty = 0;
181 if (sdcardsend_cmd(_this,CMD0, 0) == 1) { /* Put the card SPI/Idle state */
182 Timer1 = 1000; /* Initialization timeout = 1 sec */
183 if (sdcardsend_cmd(_this,CMD8, 0x1AA) == 1) { /* SDv2? */
184 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ocr, 4);
185 //for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get 32 bit return value of R7 resp */
186 if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* Is the card supports vcc of 2.7-3.6V? */
187 while (Timer1 && sdcardsend_cmd(_this,ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
188 if (Timer1 && sdcardsend_cmd(_this,CMD58, 0) == 0) { /* Check CCS bit in the OCR */
189 //for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
190 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ocr, 4);
191 ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Card id SDv2 */
192 }
193 }
194 } else { /* Not SDv2 card */
195 if (sdcardsend_cmd(_this,ACMD41, 0) <= 1) { /* SDv1 or MMC? */
196 ty = CT_SD1; cmd = ACMD41; /* SDv1 (ACMD41(0)) */
197 } else {
198 ty = CT_MMC; cmd = CMD1; /* MMCv3 (CMD1(0)) */
199 }
200 while (Timer1 && sdcardsend_cmd(_this,cmd, 0)) ; /* Wait for end of initialization */
201 if (!Timer1 || sdcardsend_cmd(_this,CMD16, 512) != 0) /* Set block length: 512 */
202 ty = 0;
203 }
204 }
205 ((sdcardDev*)_this->phy)->CardType = ty; /* Card type */
206 sdcarddeselect (_this);
207
208 if (ty) { /* OK */
209 ((sdcardDev*)_this->phy)->setspeed(((sdcardDev*)_this->phy)->phy,10000000);
210 ((sdcardDev*)_this->phy)->Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
211 } else { /* Failed */
212 //power_off();
213 ((sdcardDev*)_this->phy)->Stat = STA_NOINIT;
214 }
215
216 return ((sdcardDev*)_this->phy)->Stat;
217 }
218
219
220
221
222
223
224
225
226
227
228 DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count)
229 {
230 DSTATUS s;
231
232
233 s = sdcarddisk_status(_this,drv);
234 if (s & STA_NOINIT) return RES_NOTRDY;
235 if (!count) return RES_PARERR;
236 if (!(((sdcardDev*)_this->phy)->CardType & CT_BLOCK)) sector *= 512; /* Convert LBA to byte address if needed */
237
238 if (count == 1) { /* Single block read */
239 if ((sdcardsend_cmd(_this,CMD17, sector) == 0) && sdcardrcvr_datablock((sdcardDev*)(_this->phy),buff, 512))
240 count = 0;
241 }
242 else { /* Multiple block read */
243 if (sdcardsend_cmd(_this,CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
244 do {
245 if (!sdcardrcvr_datablock (((sdcardDev*)_this->phy),buff, 512)) break;
246 buff += 512;
247 } while (--count);
248 sdcardsend_cmd(_this,CMD12, 0); /* STOP_TRANSMISSION */
249 }
250 }
251 sdcarddeselect (_this);
252
253 return count ? RES_ERROR : RES_OK;
254 }
255
256
257
258
259
260 DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count)
261 {
262 DSTATUS s;
263
264
265 s = sdcarddisk_status(_this,drv);
266 if (s & STA_NOINIT) return RES_NOTRDY;
267 if (s & STA_PROTECT) return RES_WRPRT;
268 if (!count) return RES_PARERR;
269 if (!(((sdcardDev*)_this->phy)->CardType & CT_BLOCK)) sector *= 512; /* Convert LBA to byte address if needed */
270
271 if (count == 1) { /* Single block write */
272 if ((sdcardsend_cmd(_this,CMD24, sector) == 0) /* WRITE_BLOCK */
273 && sdcardxmit_datablock (((sdcardDev*)_this->phy),buff, 0xFE))
274 count = 0;
275 }
276 else { /* Multiple block write */
277 if (((sdcardDev*)_this->phy)->CardType & CT_SDC) sdcardsend_cmd(_this,ACMD23, count);
278 if (sdcardsend_cmd(_this,CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
279 do {
280 if (!sdcardxmit_datablock (((sdcardDev*)_this->phy),buff, 0xFC)) break;
281 buff += 512;
282 } while (--count);
283 if (!sdcardxmit_datablock (((sdcardDev*)_this->phy),0, 0xFD)) /* STOP_TRAN token */
284 count = 1;
285 }
286 }
287 sdcarddeselect (_this);
288
289 return count ? RES_ERROR : RES_OK;
290 }
291
292
293 DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff)
294 {
295 DRESULT res;
296 const unsigned char dummy=0xff;
297 char n, csd[16], *ptr = buff;
298 unsigned short csize;
299 unsigned long *dp, st, ed;
300
301
302 if (drv) return RES_PARERR; /* Check parameter */
303 if (((sdcardDev*)_this->phy)->Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
304
305 res = RES_ERROR;
306
307 switch (ctrl) {
308 case CTRL_SYNC : /* Wait for end of internal write process of the drive */
309 if (sdcardselect (_this)) {
310 sdcarddeselect (_this);
311 res = RES_OK;
312 }
313 break;
314
315 case GET_SECTOR_COUNT : /* Get drive capacity in unit of sector (DWORD) */
316 if ((sdcardsend_cmd(_this,CMD9, 0) == 0) && sdcardrcvr_datablock (((sdcardDev*)_this->phy),csd, 16)) {
317 if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
318 csize = csd[9] + ((unsigned short)csd[8] << 8) + 1;
319 *(unsigned long*)buff = (unsigned long)csize << 10;
320 } else { /* SDC ver 1.XX or MMC ver 3 */
321 n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
322 csize = (csd[8] >> 6) + ((unsigned short)csd[7] << 2) + ((unsigned short)(csd[6] & 3) << 10) + 1;
323 *(unsigned long*)buff = (unsigned long)csize << (n - 9);
324 }
325 res = RES_OK;
326 }
327 break;
328
329 case GET_SECTOR_SIZE : /* Get sector size in unit of byte (WORD) */
330 *(unsigned short*)buff = 512;
331 res = RES_OK;
332 break;
333
334 case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
335 if (((sdcardDev*)_this->phy)->CardType & CT_SD2) { /* SDC ver 2.00 */
336 if (sdcardsend_cmd(_this,ACMD13, 0) == 0) { /* Read SD status */
337 ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);
338 if (sdcardrcvr_datablock (((sdcardDev*)_this->phy),csd, 16)) { /* Read partial block */
339 for (n = 64 - 16; n; n--) ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1); /* Purge trailing data */
340 *(unsigned long*)buff = 16UL << (csd[10] >> 4);
341 res = RES_OK;
342 ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);
343 }
344 }
345 } else { /* SDC ver 1.XX or MMC */
346 if ((sdcardsend_cmd(_this,CMD9, 0) == 0) && sdcardrcvr_datablock (((sdcardDev*)_this->phy),csd, 16)) { /* Read CSD */
347 if (((sdcardDev*)_this->phy)->CardType & CT_SD1) { /* SDC ver 1.XX */
348 *(unsigned long*)buff = (((csd[10] & 63) << 1) + ((unsigned short)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
349 } else { /* MMC */
350 *(unsigned long*)buff = ((unsigned short)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
351 }
352 res = RES_OK;
353 }
354 }
355 break;
356
357 case CTRL_ERASE_SECTOR : /* Erase a block of sectors (used when _USE_ERASE == 1) */
358 if (!(((sdcardDev*)_this->phy)->CardType & CT_SDC)) break; /* Check if the card is SDC */
359 if (sdcarddisk_ioctl(_this,drv, MMC_GET_CSD, csd)) break; /* Get CSD */
360 if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
361 dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
362 if (!(((sdcardDev*)_this->phy)->CardType & CT_BLOCK)) {
363 st *= 512; ed *= 512;
364 }
365 if (sdcardsend_cmd(_this,CMD32, st) == 0 && sdcardsend_cmd(_this,CMD33, ed) == 0 && sdcardsend_cmd(_this,CMD38, 0) == 0 && sdcardwait_ready(((sdcardDev*)_this->phy))) /* Erase sector block */
366 res = RES_OK; /* FatFs does not check result of this command */
367 break;
368
369 /* Following command are not used by FatFs module */
370
371 case MMC_GET_TYPE : /* Get MMC/SDC type (BYTE) */
372 *ptr = ((sdcardDev*)_this->phy)->CardType;
373 res = RES_OK;
374 break;
375
376 case MMC_GET_CSD : /* Read CSD (16 bytes) */
377 if (sdcardsend_cmd(_this,CMD9, 0) == 0 /* READ_CSD */
378 && sdcardrcvr_datablock (((sdcardDev*)_this->phy),ptr, 16))
379 res = RES_OK;
380 break;
381
382 case MMC_GET_CID : /* Read CID (16 bytes) */
383 if (sdcardsend_cmd(_this,CMD10, 0) == 0 /* READ_CID */
384 && sdcardrcvr_datablock (((sdcardDev*)_this->phy),ptr, 16))
385 res = RES_OK;
386 break;
387
388 case MMC_GET_OCR : /* Read OCR (4 bytes) */
389 if (sdcardsend_cmd(_this,CMD58, 0) == 0) { /* READ_OCR */
390 //for (n = 4; n; n--) *ptr++ =
391 ((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ptr, 4);
392 res = RES_OK;
393 }
394 break;
395
396 case MMC_GET_SDSTAT : /* Read SD status (64 bytes) */
397 if (sdcardsend_cmd(_this,ACMD13, 0) == 0) { /* SD_STATUS */
398 ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);
399 if (sdcardrcvr_datablock (((sdcardDev*)_this->phy),ptr, 64))
400 res = RES_OK;
401 }
402 break;
403
404 default:
405 res = RES_PARERR;
406 }
407
408 sdcarddeselect (_this);
409
410 return res;
411 }
412
413
414
415 void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed))
416 {
417 sdcard->phy = phy;
418 sdcard->rcvr_mmc = rcvr_mmc;
419 sdcard->xmit_mmc = xmit_mmc;
420 sdcard->setspeed = setspeed;
421 }
422
423 void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected)
424 {
425 dev->phy=sdcard;
426 dev->select=select;
427 dev->power = power;
428 dev->detect = detect;
429 dev->writeprotected = writeprotected;
430 dev->write = sdcarddisk_write;
431 dev->read = sdcarddisk_read;
432 dev->ioctl = sdcarddisk_ioctl;
433 dev->initialize = sdcarddisk_initialize;
434 dev->status = sdcarddisk_status;
435
436 }
437
438
439
440
441
442
443
444
445
446
447
448
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef SDCARD_H
23 #define SDCARD_H
24 #include "blkdevice.h"
25 #include <libucstrings.h>
26
27 /* MMC/SD command */
28 #define CMD0 (0) /* GO_IDLE_STATE */
29 #define CMD1 (1) /* SEND_OP_COND (MMC) */
30 #define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
31 #define CMD8 (8) /* SEND_IF_COND */
32 #define CMD9 (9) /* SEND_CSD */
33 #define CMD10 (10) /* SEND_CID */
34 #define CMD12 (12) /* STOP_TRANSMISSION */
35 #define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
36 #define CMD16 (16) /* SET_BLOCKLEN */
37 #define CMD17 (17) /* READ_SINGLE_BLOCK */
38 #define CMD18 (18) /* READ_MULTIPLE_BLOCK */
39 #define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
40 #define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
41 #define CMD24 (24) /* WRITE_BLOCK */
42 #define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
43 #define CMD32 (32) /* ERASE_ER_BLK_START */
44 #define CMD33 (33) /* ERASE_ER_BLK_END */
45 #define CMD38 (38) /* ERASE */
46 #define CMD55 (55) /* APP_CMD */
47 #define CMD58 (58) /* READ_OCR */
48
49 /* Card type flags (CardType) */
50 #define CT_MMC 0x01 /* MMC ver 3 */
51 #define CT_SD1 0x02 /* SD ver 1 */
52 #define CT_SD2 0x04 /* SD ver 2 */
53 #define CT_SDC (CT_SD1|CT_SD2) /* SD */
54 #define CT_BLOCK 0x08 /* Block addressing */
55
56 struct sdcard_str
57 {
58 void* phy;
59 void (*rcvr_mmc) (void* phy,char *buff,unsigned int bc);
60 void (*xmit_mmc) (void* phy,const char *buff,unsigned int bc);
61 void (*setspeed) (void* phy,unsigned int speed);
62 DSTATUS Stat;
63 char CardType;
64 };
65
66 typedef volatile struct sdcard_str sdcardDev;
67
68 extern void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed));
69 extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected);
70
71 extern int sdcardselect (blkdevice* _this);
72 extern void sdcarddeselect (blkdevice* _this);
73 extern int sdcardwait_ready (sdcardDev* sdcard);
74 extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token);
75 extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr);
76 extern char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg);
77
78 extern DSTATUS sdcarddisk_status (blkdevice* _this,char drv);
79 extern DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv);
80 extern DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count);
81 extern DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count);
82 extern DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff);
83
84 #endif
85
86
87
88
89
90
91
92
93
94
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1 TEMPLATE = lib
2 lpc17XX.ARCH = lpc17XX-arm-noabi-gcc
3 lpc17XX.TARGET = libsdcard
4 lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_SDCARD)
5 lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD)
6
7 lpc17XX.LIBS += SSP BLKDEVICE UCSTRINGS
8
9 lpc17XX.SOURCES += sdcard.c
10
11
12 lpc17XX.HEADERS += sdcard.h
13
14
15
16 lpc21XX.ARCH = lpc21XX-arm-noabi-gcc
17 lpc21XX.TARGET = libsdcard
18 lpc21XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_SDCARD)
19 lpc21XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD)
20
21 lpc21XX.LIBS += SSP BLKDEVICE
22
23 lpc21XX.SOURCES += sdcard.c
24
25
26 lpc21XX.HEADERS += sdcard.h
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_UCSTRINGS)
5 HEADERS += libucstrings.h
6 LIBSOURCES += libucstrings.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc17XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
10 TARGET=libucstrings
11 LIBUC_INCLUDES=
12 LIBUC_LIBRARIES=
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_UCSTRINGS)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_UCSTRINGS)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1 PROJECTDIR = `pwd`
2 LIBUC = /opt/libuc2
3
4 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_UCSTRINGS)
5 HEADERS += libucstrings.h
6 LIBSOURCES += libucstrings.c
7 OBJECTFILES = $(LIBSOURCES:.c=.o)
8 ARCH = lpc21XX-arm-noabi-gcc
9 ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
10 TARGET=libucstrings
11 LIBUC_INCLUDES=
12 LIBUC_LIBRARIES=
13 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_UCSTRINGS)
14 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_UCSTRINGS)
15 BSP=generic
16 include $(ARCHFOLDER)/rules.mk
17
18 all:lib
19 @echo Code compiled
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_VS10XX)
6 HEADERS += vs1053.h
7 LIBSOURCES += vs1053.c
8 OBJECTFILES = $(LIBSOURCES:.c=.o)
9 ARCH = lpc17XX-arm-noabi-gcc
10 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
11 TARGET=libvs10XX
12 LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_SSP_CMD)
13 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP)
14 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_VS10XX)
15 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_VS10XX)
16 BSP=generic
17 include $(ARCHFOLDER)/rules.mk
18
19 all:lib
20 @echo Code compiled
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@@ -0,0 +1,56
1 #/*------------------------------------------------------------------------------
2 #-- This file is a part of the libuc, microcontroler library
3 #-- Copyright (C) 2011, Alexis Jeandet
4 #--
5 #-- This program is free software; you can redistribute it and/or modify
6 #-- it under the terms of the GNU General Public License as published by
7 #-- the Free Software Foundation; either version 3 of the License, or
8 #-- (at your option) any later version.
9 #--
10 #-- This program is distributed in the hope that it will be useful,
11 #-- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 #-- GNU General Public License for more details.
14 #--
15 #-- You should have received a copy of the GNU General Public License
16 #-- along with this program; if not, write to the Free Software
17 #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #-------------------------------------------------------------------------------
19 #-- Author : Alexis Jeandet
20 #-- Mail : alexis.jeandet@gmail.com
21 #-------------------------------------------------------------------------------*/
22 #include "ssp.h"
23 #include "vs1053.h"
24 //#include <bsp.h>
25
26 void vs1053open(vs1053Dev* codec,sspDev* dev){
27 codec->SSP_device = dev;
28
29 }
30
31 void vs1053softreset(vs1053Dev* dev)
32 {
33 vs1053cmdwrite(dev,VSMODE,(1<<2));
34 }
35
36 int vs1053cmdread(vs1053Dev* dev,char address)
37 {
38 int result;
39 while(!vs10XXDREQ());
40 vs10XXclearXCS();
41 sspputw(dev->SSP_device,(3<<8)+address);
42 result = sspgetw(dev->SSP_device);
43 vs10XXsetXCS();
44 return result;
45 }
46
47
48 void vs1053cmdwrite(vs1053Dev* dev,char address,int value)
49 {
50 while(!vs10XXDREQ());
51 vs10XXclearXCS();
52 sspputw(dev->SSP_device,(2<<8)+address);
53 sspputw(dev->SSP_device,value);
54 vs10XXsetXCS();
55 }
56
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1 #/*------------------------------------------------------------------------------
2 #-- This file is a part of the libuc, microcontroler library
3 #-- Copyright (C) 2011, Alexis Jeandet
4 #--
5 #-- This program is free software; you can redistribute it and/or modify
6 #-- it under the terms of the GNU General Public License as published by
7 #-- the Free Software Foundation; either version 3 of the License, or
8 #-- (at your option) any later version.
9 #--
10 #-- This program is distributed in the hope that it will be useful,
11 #-- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 #-- GNU General Public License for more details.
14 #--
15 #-- You should have received a copy of the GNU General Public License
16 #-- along with this program; if not, write to the Free Software
17 #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #-------------------------------------------------------------------------------
19 #-- Author : Alexis Jeandet
20 #-- Mail : alexis.jeandet@gmail.com
21 #-------------------------------------------------------------------------------*/
22
23
24 #define VSMODE 0
25 #define VSSTATUS 1
26 #define VSBASS 2
27 #define VSCLOCKF 3
28 #define VSDECODE_TIME 4
29 #define VSAUDATA 5
30 #define VSWRAM 6
31 #define VSWRAMADDR 7
32 #define VSHDAT0 8
33 #define VSHDAT1 9
34 #define VSAIADDR 0xA
35 #define VSVOL 0xB
36 #define VSAICTRL0 0xC
37 #define VSAICTRL1 0xD
38 #define VSAICTRL2 0xE
39 #define VSAICTRL3 0xF
40
41 struct vs1053Regs
42 {
43 sspDev* SSP_device;
44 int a;
45 };
46
47 typedef struct vs1053Regs vs1053Dev;
48
49 void vs1053open(vs1053Dev* codec,sspDev* dev);
50 void vs1053softreset(vs1053Dev* dev);
51 int vs1053cmdread(vs1053Dev* dev,char address);
52 void vs1053cmdwrite(vs1053Dev* dev,char address,int value);
53
54 extern void vs10XXclearXCS();
55 extern void vs10XXsetXCS();
56 extern int vs10XXDREQ();
57
58
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1 TEMPLATE = lib
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = libvs10XX
4 TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_VS10XX)
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_VS10XX)
6
7 LIBS += CORE SSP
8
9 SOURCES += vs1053.c
10
11
12 HEADERS += vs1053.h
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@@ -0,0 +1,6
1 TEMPLATE = dir
2 SUBDIRS += 24LCXX \
3 STRINGS \
4 VS10XX \
5 SDCARD \
6 BLOCKDEVICES
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@@ -0,0 +1,20
1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SSP)
6 HEADERS += ssp.h
7 LIBSOURCES += ssp.c
8 OBJECTFILES = $(LIBSOURCES:.c=.o)
9 ARCH = lpc17XX-arm-noabi-gcc
10 ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
11 TARGET=libssp
12 LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD)
13 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE)
14 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_SSP)
15 HEADERSINSTALLPATH=$(LIBUC_INC_DIR_SSP)
16 BSP=generic
17 include $(ARCHFOLDER)/rules.mk
18
19 all:lib
20 @echo Code compiled
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@@ -0,0 +1,240
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "ssp.h"
23 #include "core.h"
24
25
26 void sspputw(sspDev* dev,int c) {
27 volatile int a;
28 dev->SSPDataReg = c;
29 while (((dev->SSPStatReg & (1<<4))));
30 a=dev->SSPDataReg;
31 }
32
33 void sspputc(sspDev* dev,char c) {
34 volatile char a;
35 dev->SSPDataReg = c;
36 while (((dev->SSPStatReg & (1<<4))));
37 a=dev->SSPDataReg;
38 }
39
40 void sspputnc(sspDev* dev,const char *c,unsigned int n)
41 {
42 volatile char a;
43 while(n--)
44 {
45 dev->SSPDataReg = *c++;
46 while (((dev->SSPStatReg & (1<<4))));
47 a=dev->SSPDataReg;
48 }
49 }
50
51 char sspgetc(sspDev* dev) {
52 dev->SSPDataReg = 0xffff;
53 while ((dev->SSPStatReg & (0x10)));
54 return ((char)dev->SSPDataReg);
55 }
56
57 void sspgetnc(sspDev* dev,char *c,unsigned int n)
58 {
59 volatile char a;
60 while (((dev->SSPStatReg & (1<<2)))) a=dev->SSPDataReg;
61 while(n)
62 {
63 dev->SSPDataReg = 0xff;
64 while (((dev->SSPStatReg & (1<<4))));
65 *c= (char)dev->SSPDataReg;
66 c++;
67 n--;
68 }
69 }
70
71 int sspgetw(sspDev* dev) {
72 int dummy;
73 while(((dev->SSPStatReg & (1<<2))))
74 dummy = dev->SSPDataReg;
75 dev->SSPDataReg = 0xFFFF;
76 while (((dev->SSPStatReg & (1<<4))));
77 return (dev->SSPDataReg);
78 }
79
80
81 void sspputs(sspDev* dev,char *s) {
82 while (*s) sspputc(dev,*s++);
83 }
84
85
86 void sspgets(sspDev* dev,char *s) {
87 while (*s && (*s!=0xd)) *s++ = sspgetc(dev);
88 }
89
90 void sspsetup(sspDev* dev,unsigned char bitscount,int sspCtrlRegValue0,int sspCtrlRegValue1, unsigned int dataRate)
91 {
92 dev->SSPCtrlReg0 = sspCtrlRegValue0;
93 dev->SSPCtrlReg1 = sspCtrlRegValue1;
94 sspsetupTRsize(dev,bitscount);
95 sspsetdatarate(dev,dataRate);
96 }
97
98 void sspsetupTRsize(sspDev* dev,unsigned char value)
99 {
100 disableSSP(dev);
101 if(value < 4)value =4;
102 value--;
103 dev->SSPCtrlReg0 |= value;
104 dev->SSPCtrlReg0 &= 0xFFFFFFF0 | value;
105 enableSSP(dev);
106 }
107
108 void enableSSP(sspDev* dev)
109 {
110 dev->SSPCtrlReg1 |= 1<<1;
111 }
112
113 void disableSSP(sspDev* dev)
114 {
115 dev->SSPCtrlReg1 &= -1 - (1<<1);
116 }
117
118 void ssppowerup(sspDev* dev)
119 {
120 switch((int)dev)
121 {
122 case (int)LPC_SSP0_BASE:
123 LPC_SC->PCONP |= ( 1 << 21 );
124 break;
125 case (int)LPC_SSP1_BASE:
126 LPC_SC->PCONP |= ( 1 << 10 );
127 break;
128 default:
129 break;
130 }
131 }
132
133 void ssppowerdown(sspDev* dev)
134 {
135 switch((int)dev)
136 {
137 case (int)LPC_SSP0_BASE:
138 LPC_SC->PCONP &= ~( 1 << 21 );
139 break;
140 case (int)LPC_SSP1_BASE:
141 LPC_SC->PCONP &= ~( 1 << 10 );
142 break;
143 default:
144 break;
145 }
146 }
147
148
149 sspDev* sspopen(int count){
150 sspDev* dev;
151 switch(count)
152 {
153 case 0:
154 dev = (sspDev*)((unsigned long)LPC_SSP0_BASE);
155 break;
156 case 1:
157 dev = (sspDev*)((unsigned long)LPC_SSP1_BASE);
158 break;
159 default:
160 dev = (sspDev*)0;
161 break;
162 }
163 return dev;
164 }
165
166
167
168
169
170
171
172
173 unsigned char sspgetpclkfactor(sspDev* dev)
174 {
175 unsigned int clksel=0;
176 const char clkselDec[]={4,1,2,8};
177 switch((int)dev)
178 {
179 case (int)LPC_SSP0_BASE:
180 clksel = (LPC_SC->PCLKSEL1>>10) & 3;
181 break;
182 case (int)LPC_SSP1_BASE:
183 clksel = (LPC_SC->PCLKSEL0>>20) & 3;
184 break;
185 default:
186 break;
187 }
188 return clkselDec[clksel];
189 }
190
191
192 void sspsetpclkfactor(sspDev* dev,unsigned char pclkfactor)
193 {
194 const char clkselDec[]={1,1,2,2,0,0,0,0,3};
195 unsigned int clksel=0;
196 switch((int)dev)
197 {
198 case (int)LPC_SSP0_BASE:
199 LPC_SC->PCLKSEL1 |= clkselDec[pclkfactor]<<10;
200 LPC_SC->PCLKSEL1 &= clkselDec[pclkfactor]<<10;
201 break;
202 case (int)LPC_SSP1_BASE:
203 LPC_SC->PCLKSEL0 |= clkselDec[pclkfactor]<<20;
204 LPC_SC->PCLKSEL0 &= clkselDec[pclkfactor]<<20;
205 break;
206 default:
207 break;
208 }
209
210 }
211
212
213
214
215 void sspsetdatarate(sspDev* dev,unsigned int dataRate)
216 {
217 unsigned int pclk = 0;
218 unsigned int cpuclk=0;
219 unsigned int sspsclkl=0;
220 unsigned char error;
221 if(dev==0)return;
222 cpuclk = coregetCpuFreq();
223 pclk = (cpuclk) / sspgetpclkfactor(dev);
224 sspsclkl = ((pclk*32) / (dataRate));
225 error = (unsigned char)(sspsclkl & 0x3F);
226 if(error >= 0x1F) sspsclkl = sspsclkl + 0x1F;
227 sspsclkl = sspsclkl / 32;
228 if(sspisslave(dev))
229 {
230 if(sspsclkl<12) sspsclkl = 12;
231 }
232 else
233 {
234 if(sspsclkl<2) sspsclkl = 2;
235 }
236 sspsclkl &= 0xFE;
237 dev->SSPClkPrescReg = sspsclkl;
238 }
239
240
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@@ -0,0 +1,96
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "LPC17xx.h"
23 #ifndef SSP_H
24 #define SSP_H
25
26 #define l4bits ((1<<1)+(1)) //0011 4 bit transfer
27 #define l5bits ((1<<2)) //0100 5 bit transfer
28 #define l6bits ((1<<2)+(1)) //0101 6 bit transfer
29 #define l7bits ((1<<1)+(1<<1)) //0110 7 bit transfer
30 #define l8bits ((1<<2)+(1<<1)+(1)) //0111 8 bit transfer
31 #define l9bits ((1<<3)) //1000 9 bit transfer
32 #define l10bits ((1<<3)+(1)) //1001 10 bit transfer
33 #define l11bits ((1<<3)+(1<<1)) //1010 11 bit transfer
34 #define l12bits ((1<<3)+(1<<1)+1) //1011 12 bit transfer
35 #define l13bits ((1<<3)+(1<<2)) //1100 13 bit transfer
36 #define l14bits ((1<<3)+(1<<2)+1) //1101 14 bit transfer
37 #define l15bits ((1<<3)+(1<<2)+(1<<1)) //1110 15 bit transfer
38 #define l16bits ((1<<3)+(1<<2)+(1<<1)+1) //1111 16 bit transfer
39
40 #define FFSPI 0
41 #define FFTI (1<<4)
42 #define FFMICROWIRE (1<<5)
43
44 #define CLKINHLOW 0
45 #define CLKINHHIGH (1<<6)
46
47 #define CKfirstEdge 0
48 #define CKsecondEdge (1<<7)
49
50
51
52 #define loopbackOFF 0
53 #define loopbackON 1
54
55 #define MASTERMODE 0
56 #define SLAVEMODE (1<<2)
57
58 #define SLAVEOUTPUTDISABLEMODE (1<<3)
59
60 #define sspisslave(dev) ((((dev)->SSPCtrlReg1>>2) & 1)==1)
61
62 struct sspRegs
63 {
64 unsigned long SSPCtrlReg0;
65 unsigned long SSPCtrlReg1;
66 unsigned long SSPDataReg;
67 unsigned long SSPStatReg;
68 unsigned long SSPClkPrescReg;
69 unsigned long SSPIntMaskReg;
70 unsigned long SSPRawIntStatReg;
71 unsigned long SSPMaskedIntStatReg;
72 unsigned long SSPIntClearReg;
73 unsigned long SSPDMACtrlReg;
74 };
75
76 typedef volatile struct sspRegs sspDev;
77
78 extern sspDev* sspopen(int count);
79 extern void sspputc(sspDev* dev,char c);
80 extern void sspputnc(sspDev* dev,const char *c,unsigned int n);
81 extern void sspputw(sspDev* dev,int c);
82 extern void sspputs(sspDev* dev,char *s);
83 extern void sspgets(sspDev* dev,char *s);
84 extern char sspgetc(sspDev* dev);
85 extern void sspgetnc(sspDev* dev,char *c,unsigned int n);
86 extern int sspgetw(sspDev* dev);
87 extern void enableSSP(sspDev* dev);
88 extern void disableSSP(sspDev* dev);
89 extern void sspsetup(sspDev* dev,unsigned char bitscount,int sspCtrlRegValue0,int sspCtrlRegValue1, unsigned int dataRate);
90 extern void sspsetupTRsize(sspDev* dev,unsigned char value);
91 extern unsigned char sspgetpclkfactor(sspDev* dev);
92 extern void sspsetpclkfactor(sspDev* dev,unsigned char pclkfactor);
93 extern void sspsetdatarate(sspDev* dev,unsigned int dataRate);
94
95 #endif
96
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1 TEMPLATE = lib
2 ARCH = lpc17XX-arm-noabi-gcc
3 TARGET = libssp
4 TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_SSP)
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SSP)
6
7 LIBS += CORE
8
9 SOURCES += ssp.c
10
11
12 HEADERS += ssp.h
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@@ -0,0 +1,20
1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/CORE
6 HEADERS += core.h
7 LIBSOURCES += core.c
8 OBJECTFILES = $(LIBSOURCES:.c=.o)
9 ARCH = lpc21XX-arm-noabi-gcc
10 ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
11 TARGET=libcore
12 LIBUC_INCLUDES=
13 LIBUC_LIBRARIES=
14 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR)/CORE
15 HEADERSINSTALLPATH=$(LIBUC_INC_DIR)/CORE
16 BSP=generic
17 include $(ARCHFOLDER)/rules.mk
18
19 all:lib
20 @echo Code compiled
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@@ -0,0 +1,87
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "core.h"
23 extern unsigned int OSC0;
24 extern unsigned int INTOSC;
25 extern unsigned int RTCOSC;
26
27 void coresetCpuFreq(unsigned int freq)
28 {
29 unsigned int inputFreq = 10000,PLLFREQ=300000000;
30 unsigned int M0=6,N0=1;
31 if(pll0getClksrc==pll0useInternal)
32 {
33 inputFreq=INTOSC;
34 }
35 if(pll0getClksrc==pll0useMainOsc)
36 {
37 inputFreq=OSC0;
38 }
39 if(pll0getClksrc==pll0useRTC)
40 {
41 inputFreq=RTCOSC;
42 }
43 CCLKCFG = (PLLFREQ/freq)-1;
44 while(N0<33)
45 {
46 M0=(PLLFREQ*N0)/(2*inputFreq);
47 if((6<M0)&&(M0<512))
48 {
49 PLLCFG = (M0-1)+((N0-1)<<16);
50 PLLFEED = 0xAA;
51 PLLFEED = 0x55;
52 PLLCON = 1;
53 PLLFEED = 0xAA;
54 PLLFEED = 0x55;
55 while (!(PLLSTAT & (1<<26)));
56 PLLCON = 3;
57 PLLFEED = 0xAA;
58 PLLFEED = 0x55;
59 while (!(PLLSTAT & ((1<<25) | (1<<24))));
60 break;
61 }
62 N0++;
63 }
64
65 }
66
67
68
69
70 unsigned int coregetCpuFreq()
71 {
72 unsigned int inputFreq;
73 unsigned int M0,N0,CPUDIV;
74 M0 = (PLLCFG & 0x3FFF) + 1;
75 N0 = ((PLLCFG>>16) & 0xFF) + 1;
76 CPUDIV = CCLKCFG + 1;
77 if(pll0getClksrc==pll0useInternal){ inputFreq=INTOSC;}
78 if(pll0getClksrc==pll0useMainOsc) {inputFreq=OSC0;}
79 if(pll0getClksrc==pll0useRTC) {inputFreq=RTCOSC;}
80 if((PLLCON & 2)==2) {return ((inputFreq*M0*2)/(N0*CPUDIV));}
81 return inputFreq;
82 }
83
84
85
86
87
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "LPC23xx.h"
23
24
25 #define pll0useInternal 0
26 #define pll0useMainOsc 1
27 #define pll0useRTC 2
28
29
30 #define pll0setClksrc(src) if((unsigned int)(src)<3) CLKSRCSEL=(src)
31 #define pll0getClksrc (CLKSRCSEL & 3)
32
33
34 extern void coresetCpuFreq(unsigned int freq);
35 extern unsigned int coregetCpuFreq();
36
37
38
39
40
41
42
43
44
45
46
47
48
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1 TEMPLATE = lib
2 ARCH = lpc21XX-arm-noabi-gcc
3 TARGET = libcore
4 TARGETINSTALLPATH = $(LIBUC_LIBS_DIR)/CORE
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/CORE
6
7 LIBS +=
8
9 SOURCES += core.c
10
11
12 HEADERS += core.h
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4 include $(LIBUC)/rules/common/rules.mk
5
6 all:subdir
7 make -C CORE
8 make -C UART
9 @echo Code compiled
10
11 clean:
12 make clean -C CORE
13 make clean -C UART
14 @echo Code compiled
15
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1
2 PROJECTDIR = `pwd`
3 LIBUC = /opt/libuc2
4
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/UART
6 HEADERS += uart.h
7 LIBSOURCES += uart.c
8 OBJECTFILES = $(LIBSOURCES:.c=.o)
9 ARCH = lpc21XX-arm-noabi-gcc
10 ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
11 TARGET=libuart
12 LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD)
13 LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE)
14 TARGETINSTALLPATH=$(LIBUC_LIBS_DIR)/UART
15 HEADERSINSTALLPATH=$(LIBUC_INC_DIR)/UART
16 BSP=generic
17 include $(ARCHFOLDER)/rules.mk
18
19 all:lib
20 @echo Code compiled
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@@ -0,0 +1,191
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #include "core.h"
23 #include "uart.h"
24
25
26 void uartputc(uartDev* dev,char c) {
27 while (!((dev->LineStat & (1<<5))));
28 dev->RWreg = c;
29 }
30
31 char uartgetc(uartDev* dev) {
32 while (!((dev->LineStat & 1)));
33 return (char)dev->RWreg;
34 }
35
36
37 void uartputs(uartDev* dev,char *s) {
38 while (*s) uartputc(dev,*s++);
39 }
40
41
42 void uartgets(uartDev* dev,char *s) {
43 while (*s && (*s!=0xd)) *s++ = uartgetc(dev);
44 }
45
46 void uartoff(int count)
47 {
48 switch(count)
49 {
50 case 0:
51 PCONP &= ~( 1 << 3 );
52 break;
53 case 1:
54 PCONP &= ~( 1 << 4 );
55 break;
56 case 2:
57 PCONP &= ~( 1 << 24 );
58 break;
59 case 3:
60 PCONP &= ~( 1 << 25 );
61 break;
62 default:
63 break;
64 }
65 }
66
67 void uarton(int count)
68 {
69 switch(count)
70 {
71 case 0:
72 PCONP |= ( 1 << 3 );
73 break;
74 case 1:
75 PCONP |= ( 1 << 4 );
76 break;
77 case 2:
78 PCONP |= ( 1 << 24 );
79 break;
80 case 3:
81 PCONP |= ( 1 << 25 );
82 break;
83 default:
84 break;
85 }
86 }
87
88
89
90 void uartsetup(uartDev* dev,unsigned int baudRate,unsigned char WordLength,unsigned char StopBitCnt,unsigned char Parity)
91 {
92 if(WordLength>9)WordLength=8;
93 if((StopBitCnt>2)||(StopBitCnt==0))StopBitCnt=1;
94 if(Parity>7)Parity=0;
95 dev->LineCtrl = (WordLength-5) + ((StopBitCnt-1)<<2) + (Parity<<3);
96 uartsetbaudrate(dev,baudRate);
97 }
98
99 unsigned char uartgetpclkfactor(uartDev* dev)
100 {
101 unsigned int clksel=0;
102 const char clkselDec[]={4,1,2,8};
103 switch((int)dev)
104 {
105 case (int)UART0_BASE_ADDR:
106 clksel = (PCLKSEL0>>6) & 3;
107 break;
108 case (int)UART1_BASE_ADDR:
109 clksel = (PCLKSEL0>>8) & 3;
110 break;
111 case (int)UART2_BASE_ADDR:
112 clksel = (PCLKSEL1>>16) & 3;
113 break;
114 case (int)UART3_BASE_ADDR:
115 clksel = (PCLKSEL1>>18) & 3;
116 break;
117 default:
118 break;
119 }
120 return clkselDec[clksel];
121 }
122
123 void uartsetpclkfactor(uartDev* dev,unsigned char pclkfactor)
124 {
125 const char clkselDec[]={1,1,2,2,0,0,0,0,3};
126 unsigned int clksel=0;
127 switch((int)dev)
128 {
129 case (int)UART0_BASE_ADDR:
130 PCLKSEL0 |= clkselDec[pclkfactor]<<6;
131 PCLKSEL0 &= clkselDec[pclkfactor]<<6;
132 break;
133 case (int)UART1_BASE_ADDR:
134 PCLKSEL0 |= clkselDec[pclkfactor]<<8;
135 PCLKSEL0 &= clkselDec[pclkfactor]<<8;
136 break;
137 case (int)UART2_BASE_ADDR:
138 PCLKSEL1 |= clkselDec[pclkfactor]<<16;
139 PCLKSEL1 &= clkselDec[pclkfactor]<<16;
140 break;
141 case (int)UART3_BASE_ADDR:
142 PCLKSEL1 |= clkselDec[pclkfactor]<<18;
143 PCLKSEL1 &= clkselDec[pclkfactor]<<18;
144 break;
145 default:
146 break;
147 }
148 }
149
150 void uartsetbaudrate(uartDev* dev,unsigned int baudRate)
151 {
152 unsigned int pclk = 0;
153 unsigned int clksel=0;
154 unsigned int cpuclk=0;
155 if(dev==0)return;
156 cpuclk = coregetCpuFreq();
157 pclk = cpuclk / uartgetpclkfactor(dev);
158 while((baudRate*16)>pclk)
159 {
160 unsigned char pclkfact= uartgetpclkfactor(dev);
161 if(pclkfact==1)return;
162 uartsetpclkfactor(dev,pclkfact/2);
163 pclk = cpuclk / uartgetpclkfactor(dev);
164 }
165 dev->LineCtrl |= 128;
166 dev->RWreg = pclk/(baudRate*16);
167 dev->LineCtrl &= ~(128);
168 }
169
170 uartDev* uartopen(int count){
171 uartDev* dev;
172 switch(count)
173 {
174 case 0:
175 dev = (uartDev*)((unsigned long)UART0_BASE_ADDR);
176 break;
177 case 1:
178 dev = (uartDev*)((unsigned long)UART1_BASE_ADDR);
179 break;
180 case 2:
181 dev = (uartDev*)((unsigned long)UART2_BASE_ADDR);
182 break;
183 case 3:
184 dev = (uartDev*)((unsigned long)UART3_BASE_ADDR);
185 break;
186 default:
187 dev = (uartDev*)0;
188 break;
189 }
190 return dev;
191 }
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@@ -0,0 +1,66
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef UART_H
23 #define UART_H
24 #include "LPC23xx.h"
25
26
27 #define uartNoParity 0
28 #define uartOddParity 1
29 #define uartEvenParity 3
30 #define uartTrueParity 5
31 #define uartFalseParity 7
32
33 struct uartRegs
34 {
35 unsigned long RWreg;
36 unsigned long IntEN;
37 unsigned long IntIdFIFOctrlr;
38 unsigned long LineCtrl;
39 unsigned long dummy;
40 unsigned long LineStat;
41 unsigned long ScratchPad;
42 };
43
44 typedef volatile struct uartRegs uartDev;
45
46 extern uartDev* uartopen(int count);
47 extern void uarton(int count);
48 extern void uartoff(int count);
49 extern void uartputc(uartDev* dev,char c);
50 extern void uartputs(uartDev* dev,char *s);
51 extern void uartgets(uartDev* dev,char *s);
52 extern char uartgetc(uartDev* dev);
53 extern void uartsetbaudrate(uartDev* dev,unsigned int baudRate);
54 extern unsigned char uartgetpclkfactor(uartDev* dev);
55 extern void uartsetpclkfactor(uartDev* dev,unsigned char pclkfactor);
56 extern void uartsetup(uartDev* dev,unsigned int baudRate,unsigned char WordLength,unsigned char StopBitCnt,unsigned char Parity);
57
58 #endif
59
60
61
62
63
64
65
66
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1 TEMPLATE = lib
2 ARCH = lpc21XX-arm-noabi-gcc
3 TARGET = libuart
4 TARGETINSTALLPATH = $(LIBUC_LIBS_DIR)/UART
5 HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/UART
6
7 LIBS += CORE
8
9 SOURCES += uart.c
10
11
12 HEADERS += uart.h
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@@ -0,0 +1,3
1 TEMPLATE = dir
2 SUBDIRS += CORE \
3 UART
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1 /*****************************************************************************
2 *
3 * Project : lwIP Web
4 * Subproject :
5 * Name : LPC23xx.h
6 * Function : register definitions
7 * Designer : K. Sterckx
8 * Creation date : 22/01/2007
9 * Compiler : GNU ARM
10 * Processor : LPC23xx
11 * Last update :
12 * Last updated by :
13 * History :
14 *
15 *****************************************************************************
16 *
17 * Hardware specific macro's and defines
18 *
19 ****************************************************************************/
20
21 #ifndef __LPC23xx_H
22 #define __LPC23xx_H
23
24 /* Vectored Interrupt Controller (VIC) */
25 #define VIC_BASE_ADDR 0xFFFFF000
26 #define VICIRQStatus (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x000))
27 #define VICFIQStatus (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x004))
28 #define VICRawIntr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x008))
29 #define VICIntSelect (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x00C))
30 #define VICIntEnable (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x010))
31 #define VICIntEnClr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x014))
32 #define VICSoftInt (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x018))
33 #define VICSoftIntClr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x01C))
34 #define VICProtection (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x020))
35 #define VICSWPrioMask (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x024))
36
37 #define VICVectAddr0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x100))
38 #define VICVectAddr1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x104))
39 #define VICVectAddr2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x108))
40 #define VICVectAddr3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x10C))
41 #define VICVectAddr4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x110))
42 #define VICVectAddr5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x114))
43 #define VICVectAddr6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x118))
44 #define VICVectAddr7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x11C))
45 #define VICVectAddr8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x120))
46 #define VICVectAddr9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x124))
47 #define VICVectAddr10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x128))
48 #define VICVectAddr11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x12C))
49 #define VICVectAddr12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x130))
50 #define VICVectAddr13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x134))
51 #define VICVectAddr14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x138))
52 #define VICVectAddr15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x13C))
53 #define VICVectAddr16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x140))
54 #define VICVectAddr17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x144))
55 #define VICVectAddr18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x148))
56 #define VICVectAddr19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x14C))
57 #define VICVectAddr20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x150))
58 #define VICVectAddr21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x154))
59 #define VICVectAddr22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x158))
60 #define VICVectAddr23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x15C))
61 #define VICVectAddr24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x160))
62 #define VICVectAddr25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x164))
63 #define VICVectAddr26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x168))
64 #define VICVectAddr27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x16C))
65 #define VICVectAddr28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x170))
66 #define VICVectAddr29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x174))
67 #define VICVectAddr30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x178))
68 #define VICVectAddr31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x17C))
69
70 /* The name convention below is from previous LPC2000 family MCUs, in LPC230x,
71 these registers are known as "VICVectPriority(x)". */
72 #define VICVectCntl0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x200))
73 #define VICVectCntl1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x204))
74 #define VICVectCntl2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x208))
75 #define VICVectCntl3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x20C))
76 #define VICVectCntl4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x210))
77 #define VICVectCntl5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x214))
78 #define VICVectCntl6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x218))
79 #define VICVectCntl7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x21C))
80 #define VICVectCntl8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x220))
81 #define VICVectCntl9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x224))
82 #define VICVectCntl10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x228))
83 #define VICVectCntl11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x22C))
84 #define VICVectCntl12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x230))
85 #define VICVectCntl13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x234))
86 #define VICVectCntl14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x238))
87 #define VICVectCntl15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x23C))
88 #define VICVectCntl16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x240))
89 #define VICVectCntl17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x244))
90 #define VICVectCntl18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x248))
91 #define VICVectCntl19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x24C))
92 #define VICVectCntl20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x250))
93 #define VICVectCntl21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x254))
94 #define VICVectCntl22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x258))
95 #define VICVectCntl23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x25C))
96 #define VICVectCntl24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x260))
97 #define VICVectCntl25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x264))
98 #define VICVectCntl26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x268))
99 #define VICVectCntl27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x26C))
100 #define VICVectCntl28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x270))
101 #define VICVectCntl29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x274))
102 #define VICVectCntl30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x278))
103 #define VICVectCntl31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x27C))
104
105 #define VICVectAddr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0xF00))
106
107
108 /* Pin Connect Block */
109 #define PINSEL_BASE_ADDR 0xE002C000
110 #define PINSEL0 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x00))
111 #define PINSEL1 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x04))
112 #define PINSEL2 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x08))
113 #define PINSEL3 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x0C))
114 #define PINSEL4 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x10))
115 #define PINSEL5 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x14))
116 #define PINSEL6 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x18))
117 #define PINSEL7 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x1C))
118 #define PINSEL8 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x20))
119 #define PINSEL9 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x24))
120 #define PINSEL10 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x28))
121
122 #define PINMODE0 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x40))
123 #define PINMODE1 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x44))
124 #define PINMODE2 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x48))
125 #define PINMODE3 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x4C))
126 #define PINMODE4 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x50))
127 #define PINMODE5 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x54))
128 #define PINMODE6 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x58))
129 #define PINMODE7 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x5C))
130 #define PINMODE8 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x60))
131 #define PINMODE9 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x64))
132
133 /* General Purpose Input/Output (GPIO) */
134 #define GPIO_BASE_ADDR 0xE0028000
135 #define IOPIN0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x00))
136 #define IOSET0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x04))
137 #define IODIR0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x08))
138 #define IOCLR0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x0C))
139 #define IOPIN1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x10))
140 #define IOSET1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x14))
141 #define IODIR1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x18))
142 #define IOCLR1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x1C))
143
144 /* GPIO Interrupt Registers */
145 #define IO0_INT_EN_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x90))
146 #define IO0_INT_EN_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x94))
147 #define IO0_INT_STAT_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x84))
148 #define IO0_INT_STAT_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x88))
149 #define IO0_INT_CLR (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x8C))
150
151 #define IO2_INT_EN_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB0))
152 #define IO2_INT_EN_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB4))
153 #define IO2_INT_STAT_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA4))
154 #define IO2_INT_STAT_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA8))
155 #define IO2_INT_CLR (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xAC))
156
157 #define IO_INT_STAT (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x80))
158
159 #define PARTCFG_BASE_ADDR 0x3FFF8000
160 #define PARTCFG (*(volatile unsigned int *)(PARTCFG_BASE_ADDR + 0x00))
161
162 /* Fast I/O setup */
163 #define FIO_BASE_ADDR 0x3FFFC000
164 #define FIO0DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x00))
165 #define FIO0MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x10))
166 #define FIO0PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x14))
167 #define FIO0SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x18))
168 #define FIO0CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x1C))
169
170 #define FIO1DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x20))
171 #define FIO1MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x30))
172 #define FIO1PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x34))
173 #define FIO1SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x38))
174 #define FIO1CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x3C))
175
176 #define FIO2DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x40))
177 #define FIO2MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x50))
178 #define FIO2PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x54))
179 #define FIO2SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x58))
180 #define FIO2CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x5C))
181
182 #define FIO3DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x60))
183 #define FIO3MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x70))
184 #define FIO3PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x74))
185 #define FIO3SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x78))
186 #define FIO3CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x7C))
187
188 #define FIO4DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x80))
189 #define FIO4MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x90))
190 #define FIO4PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x94))
191 #define FIO4SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x98))
192 #define FIO4CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x9C))
193
194 /* FIOs can be accessed through WORD, HALF-WORD or BYTE. */
195 #define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01))
196 #define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
197 #define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41))
198 #define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61))
199 #define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81))
200
201 #define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02))
202 #define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22))
203 #define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42))
204 #define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62))
205 #define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82))
206
207 #define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03))
208 #define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23))
209 #define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43))
210 #define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63))
211 #define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83))
212
213 #define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x04))
214 #define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x24))
215 #define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x44))
216 #define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x64))
217 #define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x84))
218
219 #define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00))
220 #define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20))
221 #define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40))
222 #define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60))
223 #define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80))
224
225 #define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02))
226 #define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22))
227 #define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42))
228 #define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62))
229 #define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82))
230
231 #define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10))
232 #define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30))
233 #define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50))
234 #define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70))
235 #define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90))
236
237 #define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11))
238 #define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
239 #define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51))
240 #define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71))
241 #define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91))
242
243 #define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12))
244 #define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32))
245 #define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52))
246 #define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72))
247 #define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92))
248
249 #define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13))
250 #define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33))
251 #define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53))
252 #define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73))
253 #define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93))
254
255 #define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10))
256 #define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30))
257 #define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50))
258 #define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70))
259 #define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90))
260
261 #define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12))
262 #define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32))
263 #define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52))
264 #define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72))
265 #define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92))
266
267 #define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14))
268 #define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34))
269 #define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54))
270 #define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74))
271 #define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94))
272
273 #define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15))
274 #define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25))
275 #define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55))
276 #define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75))
277 #define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95))
278
279 #define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16))
280 #define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36))
281 #define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56))
282 #define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76))
283 #define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96))
284
285 #define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17))
286 #define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37))
287 #define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57))
288 #define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77))
289 #define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97))
290
291 #define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14))
292 #define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34))
293 #define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54))
294 #define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74))
295 #define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94))
296
297 #define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16))
298 #define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36))
299 #define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56))
300 #define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76))
301 #define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96))
302
303 #define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18))
304 #define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38))
305 #define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58))
306 #define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78))
307 #define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98))
308
309 #define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19))
310 #define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29))
311 #define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59))
312 #define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79))
313 #define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99))
314
315 #define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A))
316 #define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A))
317 #define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A))
318 #define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A))
319 #define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A))
320
321 #define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B))
322 #define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B))
323 #define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B))
324 #define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B))
325 #define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B))
326
327 #define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18))
328 #define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38))
329 #define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58))
330 #define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78))
331 #define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98))
332
333 #define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A))
334 #define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A))
335 #define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A))
336 #define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A))
337 #define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A))
338
339 #define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C))
340 #define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C))
341 #define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C))
342 #define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C))
343 #define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C))
344
345 #define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D))
346 #define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D))
347 #define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D))
348 #define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D))
349 #define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D))
350
351 #define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E))
352 #define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E))
353 #define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E))
354 #define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E))
355 #define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E))
356
357 #define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F))
358 #define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F))
359 #define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F))
360 #define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F))
361 #define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F))
362
363 #define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C))
364 #define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C))
365 #define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C))
366 #define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C))
367 #define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C))
368
369 #define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E))
370 #define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E))
371 #define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E))
372 #define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E))
373 #define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E))
374
375
376 /* System Control Block(SCB) modules include Memory Accelerator Module,
377 Phase Locked Loop, VPB divider, Power Control, External Interrupt,
378 Reset, and Code Security/Debugging */
379 #define SCB_BASE_ADDR 0xE01FC000
380
381 /* Memory Accelerator Module (MAM) */
382 #define MAMCR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x000))
383 #define MAMTIM (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x004))
384 #define MEMMAP (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x040))
385
386 /* Phase Locked Loop (PLL) */
387 #define PLLCON (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x080))
388 #define PLLCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x084))
389 #define PLLSTAT (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x088))
390 #define PLLFEED (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x08C))
391
392 /* Power Control */
393 #define PCON (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C0))
394 #define PCONP (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C4))
395
396 /* Clock Divider */
397 #define APBDIV (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x100))
398 #define CCLKCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x104))
399 #define USBCLKCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x108))
400 #define CLKSRCSEL (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x10C))
401 #define PCLKSEL0 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A8))
402 #define PCLKSEL1 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1AC))
403
404 /* External Interrupts */
405 #define EXTINT (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x140))
406 #define INTWAKE (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x144))
407 #define EXTMODE (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x148))
408 #define EXTPOLAR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x14C))
409
410 /* Reset, reset source identification */
411 #define RSIR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x180))
412
413 /* RSID, code security protection */
414 #define CSPR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x184))
415
416 /* AHB configuration */
417 #define AHBCFG1 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x188))
418 #define AHBCFG2 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x18C))
419
420 /* System Controls and Status */
421 #define SCS (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A0))
422
423 /*MPMC(EMC) registers*/
424 #define STATIC_MEM0_BASE 0x80000000
425 #define STATIC_MEM1_BASE 0x81000000
426 #define STATIC_MEM2_BASE 0x82000000
427 #define STATIC_MEM3_BASE 0x83000000
428
429 #define DYNAMIC_MEM0_BASE 0xA0000000
430 #define DYNAMIC_MEM1_BASE 0xB0000000
431 #define DYNAMIC_MEM2_BASE 0xC0000000
432 #define DYNAMIC_MEM3_BASE 0xD0000000
433
434 /* External Memory Controller (EMC) */
435 #define EMC_BASE_ADDR 0xFFE08000
436 #define EMC_CTRL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x000))
437 #define EMC_STAT (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x004))
438 #define EMC_CONFIG (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x008))
439
440 /* Dynamic RAM access registers */
441 #define EMC_DYN_CTRL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x020))
442 #define EMC_DYN_RFSH (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x024))
443 #define EMC_DYN_RD_CFG (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x028))
444 #define EMC_DYN_RP (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x030))
445 #define EMC_DYN_RAS (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x034))
446 #define EMC_DYN_SREX (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x038))
447 #define EMC_DYN_APR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x03C))
448 #define EMC_DYN_DAL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x040))
449 #define EMC_DYN_WR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x044))
450 #define EMC_DYN_RC (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x048))
451 #define EMC_DYN_RFC (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x04C))
452 #define EMC_DYN_XSR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x050))
453 #define EMC_DYN_RRD (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x054))
454 #define EMC_DYN_MRD (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x058))
455
456 #define EMC_DYN_CFG0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x100))
457 #define EMC_DYN_RASCAS0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x104))
458 #define EMC_DYN_CFG1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x140))
459 #define EMC_DYN_RASCAS1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x144))
460 #define EMC_DYN_CFG2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x160))
461 #define EMC_DYN_RASCAS2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x164))
462 #define EMC_DYN_CFG3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x180))
463 #define EMC_DYN_RASCAS3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x184))
464
465 /* static RAM access registers */
466 #define EMC_STA_CFG0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x200))
467 #define EMC_STA_WAITWEN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x204))
468 #define EMC_STA_WAITOEN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x208))
469 #define EMC_STA_WAITRD0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x20C))
470 #define EMC_STA_WAITPAGE0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x210))
471 #define EMC_STA_WAITWR0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x214))
472 #define EMC_STA_WAITTURN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x218))
473
474 #define EMC_STA_CFG1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x220))
475 #define EMC_STA_WAITWEN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x224))
476 #define EMC_STA_WAITOEN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x228))
477 #define EMC_STA_WAITRD1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x22C))
478 #define EMC_STA_WAITPAGE1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x230))
479 #define EMC_STA_WAITWR1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x234))
480 #define EMC_STA_WAITTURN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x238))
481
482 #define EMC_STA_CFG2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x240))
483 #define EMC_STA_WAITWEN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x244))
484 #define EMC_STA_WAITOEN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x248))
485 #define EMC_STA_WAITRD2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x24C))
486 #define EMC_STA_WAITPAGE2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x250))
487 #define EMC_STA_WAITWR2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x254))
488 #define EMC_STA_WAITTURN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x258))
489
490 #define EMC_STA_CFG3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x260))
491 #define EMC_STA_WAITWEN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x264))
492 #define EMC_STA_WAITOEN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x268))
493 #define EMC_STA_WAITRD3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x26C))
494 #define EMC_STA_WAITPAGE3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x270))
495 #define EMC_STA_WAITWR3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x274))
496 #define EMC_STA_WAITTURN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x278))
497
498 #define EMC_STA_EXT_WAIT (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x880))
499
500
501 /* Timer 0 */
502 #define TMR0_BASE_ADDR 0xE0004000
503 #define T0IR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x00))
504 #define T0TCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x04))
505 #define T0TC (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x08))
506 #define T0PR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x0C))
507 #define T0PC (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x10))
508 #define T0MCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x14))
509 #define T0MR0 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x18))
510 #define T0MR1 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x1C))
511 #define T0MR2 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x20))
512 #define T0MR3 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x24))
513 #define T0CCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x28))
514 #define T0CR0 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x2C))
515 #define T0CR1 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x30))
516 #define T0CR2 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x34))
517 #define T0CR3 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x38))
518 #define T0EMR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x3C))
519 #define T0CTCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x70))
520
521 /* Timer 1 */
522 #define TMR1_BASE_ADDR 0xE0008000
523 #define T1IR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x00))
524 #define T1TCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x04))
525 #define T1TC (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x08))
526 #define T1PR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x0C))
527 #define T1PC (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x10))
528 #define T1MCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x14))
529 #define T1MR0 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x18))
530 #define T1MR1 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x1C))
531 #define T1MR2 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x20))
532 #define T1MR3 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x24))
533 #define T1CCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x28))
534 #define T1CR0 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x2C))
535 #define T1CR1 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x30))
536 #define T1CR2 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x34))
537 #define T1CR3 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x38))
538 #define T1EMR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x3C))
539 #define T1CTCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x70))
540
541 /* Timer 2 */
542 #define TMR2_BASE_ADDR 0xE0070000
543 #define T2IR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x00))
544 #define T2TCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x04))
545 #define T2TC (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x08))
546 #define T2PR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x0C))
547 #define T2PC (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x10))
548 #define T2MCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x14))
549 #define T2MR0 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x18))
550 #define T2MR1 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x1C))
551 #define T2MR2 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x20))
552 #define T2MR3 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x24))
553 #define T2CCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x28))
554 #define T2CR0 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x2C))
555 #define T2CR1 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x30))
556 #define T2CR2 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x34))
557 #define T2CR3 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x38))
558 #define T2EMR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x3C))
559 #define T2CTCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x70))
560
561 /* Timer 3 */
562 #define TMR3_BASE_ADDR 0xE0074000
563 #define T3IR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x00))
564 #define T3TCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x04))
565 #define T3TC (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x08))
566 #define T3PR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x0C))
567 #define T3PC (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x10))
568 #define T3MCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x14))
569 #define T3MR0 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x18))
570 #define T3MR1 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x1C))
571 #define T3MR2 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x20))
572 #define T3MR3 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x24))
573 #define T3CCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x28))
574 #define T3CR0 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x2C))
575 #define T3CR1 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x30))
576 #define T3CR2 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x34))
577 #define T3CR3 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x38))
578 #define T3EMR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x3C))
579 #define T3CTCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x70))
580
581
582 /* Pulse Width Modulator (PWM) */
583 #define PWM0_BASE_ADDR 0xE0014000
584 #define PWM0IR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x00))
585 #define PWM0TCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x04))
586 #define PWM0TC (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x08))
587 #define PWM0PR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x0C))
588 #define PWM0PC (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x10))
589 #define PWM0MCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x14))
590 #define PWM0MR0 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x18))
591 #define PWM0MR1 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x1C))
592 #define PWM0MR2 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x20))
593 #define PWM0MR3 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x24))
594 #define PWM0CCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x28))
595 #define PWM0CR0 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x2C))
596 #define PWM0CR1 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x30))
597 #define PWM0CR2 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x34))
598 #define PWM0CR3 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x38))
599 #define PWM0EMR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x3C))
600 #define PWM0MR4 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x40))
601 #define PWM0MR5 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x44))
602 #define PWM0MR6 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x48))
603 #define PWM0PCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x4C))
604 #define PWM0LER (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x50))
605 #define PWM0CTCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x70))
606
607 #define PWM1_BASE_ADDR 0xE0018000
608 #define PWM1IR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x00))
609 #define PWM1TCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x04))
610 #define PWM1TC (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x08))
611 #define PWM1PR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x0C))
612 #define PWM1PC (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x10))
613 #define PWM1MCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x14))
614 #define PWM1MR0 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x18))
615 #define PWM1MR1 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x1C))
616 #define PWM1MR2 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x20))
617 #define PWM1MR3 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x24))
618 #define PWM1CCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x28))
619 #define PWM1CR0 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x2C))
620 #define PWM1CR1 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x30))
621 #define PWM1CR2 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x34))
622 #define PWM1CR3 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x38))
623 #define PWM1EMR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x3C))
624 #define PWM1MR4 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x40))
625 #define PWM1MR5 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x44))
626 #define PWM1MR6 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x48))
627 #define PWM1PCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x4C))
628 #define PWM1LER (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x50))
629 #define PWM1CTCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x70))
630
631
632 /* Universal Asynchronous Receiver Transmitter 0 (UART0) */
633 #define UART0_BASE_ADDR 0xE000C000
634 #define U0RBR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
635 #define U0THR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
636 #define U0DLL (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
637 #define U0DLM (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))
638 #define U0IER (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))
639 #define U0IIR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))
640 #define U0FCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))
641 #define U0LCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x0C))
642 #define U0LSR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x14))
643 #define U0SCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x1C))
644 #define U0ACR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x20))
645 #define U0ICR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x24))
646 #define U0FDR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x28))
647 #define U0TER (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x30))
648
649 /* Universal Asynchronous Receiver Transmitter 1 (UART1) */
650 #define UART1_BASE_ADDR 0xE0010000
651 #define U1RBR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
652 #define U1THR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
653 #define U1DLL (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
654 #define U1DLM (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))
655 #define U1IER (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))
656 #define U1IIR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))
657 #define U1FCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))
658 #define U1LCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x0C))
659 #define U1MCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x10))
660 #define U1LSR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x14))
661 #define U1MSR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x18))
662 #define U1SCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x1C))
663 #define U1ACR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x20))
664 #define U1FDR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x28))
665 #define U1TER (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x30))
666
667 /* Universal Asynchronous Receiver Transmitter 2 (UART2) */
668 #define UART2_BASE_ADDR 0xE0078000
669 #define U2RBR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
670 #define U2THR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
671 #define U2DLL (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
672 #define U2DLM (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))
673 #define U2IER (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))
674 #define U2IIR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))
675 #define U2FCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))
676 #define U2LCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x0C))
677 #define U2LSR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x14))
678 #define U2SCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x1C))
679 #define U2ACR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x20))
680 #define U2ICR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x24))
681 #define U2FDR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x28))
682 #define U2TER (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x30))
683
684 /* Universal Asynchronous Receiver Transmitter 3 (UART3) */
685 #define UART3_BASE_ADDR 0xE007C000
686 #define U3RBR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
687 #define U3THR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
688 #define U3DLL (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
689 #define U3DLM (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))
690 #define U3IER (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))
691 #define U3IIR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))
692 #define U3FCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))
693 #define U3LCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x0C))
694 #define U3LSR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x14))
695 #define U3SCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x1C))
696 #define U3ACR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x20))
697 #define U3ICR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x24))
698 #define U3FDR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x28))
699 #define U3TER (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x30))
700
701 /* I2C Interface 0 */
702 #define I2C0_BASE_ADDR 0xE001C000
703 #define I20CONSET (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))
704 #define I20STAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))
705 #define I20DAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))
706 #define I20ADR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))
707 #define I20SCLH (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))
708 #define I20SCLL (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))
709 #define I20CONCLR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))
710 //Slightly different naming
711 #define I2C0CONSET (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))
712 #define I2C0STAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))
713 #define I2C0DAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))
714 #define I2C0ADR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))
715 #define I2C0SCLH (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))
716 #define I2C0SCLL (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))
717 #define I2C0CONCLR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))
718
719
720 /* I2C Interface 1 */
721 #define I2C1_BASE_ADDR 0xE005C000
722 #define I21CONSET (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x00))
723 #define I21STAT (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x04))
724 #define I21DAT (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x08))
725 #define I21ADR (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x0C))
726 #define I21SCLH (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x10))
727 #define I21SCLL (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x14))
728 #define I21CONCLR (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x18))
729
730 /* I2C Interface 2 */
731 #define I2C2_BASE_ADDR 0xE0080000
732 #define I22CONSET (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x00))
733 #define I22STAT (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x04))
734 #define I22DAT (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x08))
735 #define I22ADR (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x0C))
736 #define I22SCLH (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x10))
737 #define I22SCLL (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x14))
738 #define I22CONCLR (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x18))
739
740 /* SPI0 (Serial Peripheral Interface 0) */
741 #define SPI0_BASE_ADDR 0xE0020000
742 #define S0SPCR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x00))
743 #define S0SPSR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x04))
744 #define S0SPDR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x08))
745 #define S0SPCCR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x0C))
746 #define S0SPINT (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x1C))
747
748 /* SSP0 Controller */
749 #define SSP0_BASE_ADDR 0xE0068000
750 #define SSP0CR0 (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x00))
751 #define SSP0CR1 (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x04))
752 #define SSP0DR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x08))
753 #define SSP0SR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x0C))
754 #define SSP0CPSR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x10))
755 #define SSP0IMSC (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x14))
756 #define SSP0RIS (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x18))
757 #define SSP0MIS (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x1C))
758 #define SSP0ICR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x20))
759 #define SSP0DMACR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x24))
760
761 /* SSP1 Controller */
762 #define SSP1_BASE_ADDR 0xE0030000
763 #define SSP1CR0 (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x00))
764 #define SSP1CR1 (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x04))
765 #define SSP1DR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x08))
766 #define SSP1SR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x0C))
767 #define SSP1CPSR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x10))
768 #define SSP1IMSC (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x14))
769 #define SSP1RIS (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x18))
770 #define SSP1MIS (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x1C))
771 #define SSP1ICR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x20))
772 #define SSP1DMACR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x24))
773
774
775 /* Real Time Clock */
776 #define RTC_BASE_ADDR 0xE0024000
777 #define RTC_ILR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x00))
778 #define RTC_CTC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x04))
779 #define RTC_CCR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x08))
780 #define RTC_CIIR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x0C))
781 #define RTC_AMR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x10))
782 #define RTC_CTIME0 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x14))
783 #define RTC_CTIME1 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x18))
784 #define RTC_CTIME2 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x1C))
785 #define RTC_SEC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x20))
786 #define RTC_MIN (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x24))
787 #define RTC_HOUR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x28))
788 #define RTC_DOM (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x2C))
789 #define RTC_DOW (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x30))
790 #define RTC_DOY (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x34))
791 #define RTC_MONTH (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x38))
792 #define RTC_YEAR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x3C))
793 #define RTC_CISS (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x40))
794 #define RTC_ALSEC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x60))
795 #define RTC_ALMIN (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x64))
796 #define RTC_ALHOUR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x68))
797 #define RTC_ALDOM (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x6C))
798 #define RTC_ALDOW (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x70))
799 #define RTC_ALDOY (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x74))
800 #define RTC_ALMON (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x78))
801 #define RTC_ALYEAR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x7C))
802 #define RTC_PREINT (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x80))
803 #define RTC_PREFRAC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x84))
804
805
806 /* A/D Converter 0 (AD0) */
807 #define AD0_BASE_ADDR 0xE0034000
808 #define AD0CR (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x00))
809 #define AD0GDR (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x04))
810 #define AD0INTEN (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x0C))
811 #define AD0DR0 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x10))
812 #define AD0DR1 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x14))
813 #define AD0DR2 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x18))
814 #define AD0DR3 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x1C))
815 #define AD0DR4 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x20))
816 #define AD0DR5 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x24))
817 #define AD0DR6 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x28))
818 #define AD0DR7 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x2C))
819 #define AD0STAT (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x30))
820
821
822 /* D/A Converter */
823 #define DAC_BASE_ADDR 0xE006C000
824 #define DACR (*(volatile unsigned int *)(DAC_BASE_ADDR + 0x00))
825
826
827 /* Watchdog */
828 #define WDG_BASE_ADDR 0xE0000000
829 #define WDMOD (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x00))
830 #define WDTC (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x04))
831 #define WDFEED (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x08))
832 #define WDTV (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x0C))
833 #define WDCLKSEL (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x10))
834
835 /* CAN CONTROLLERS AND ACCEPTANCE FILTER */
836 #define CAN_ACCEPT_BASE_ADDR 0xE003C000
837 #define CAN_AFMR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x00))
838 #define CAN_SFF_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x04))
839 #define CAN_SFF_GRP_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x08))
840 #define CAN_EFF_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x0C))
841 #define CAN_EFF_GRP_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x10))
842 #define CAN_EOT (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x14))
843 #define CAN_LUT_ERR_ADR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x18))
844 #define CAN_LUT_ERR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x1C))
845
846 #define CAN_CENTRAL_BASE_ADDR 0xE0040000
847 #define CAN_TX_SR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x00))
848 #define CAN_RX_SR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x04))
849 #define CAN_MSR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x08))
850
851 #define CAN1_BASE_ADDR 0xE0044000
852 #define CAN1MOD (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x00))
853 #define CAN1CMR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x04))
854 #define CAN1GSR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x08))
855 #define CAN1ICR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x0C))
856 #define CAN1IER (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x10))
857 #define CAN1BTR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x14))
858 #define CAN1EWL (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x18))
859 #define CAN1SR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x1C))
860 #define CAN1RFS (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x20))
861 #define CAN1RID (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x24))
862 #define CAN1RDA (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x28))
863 #define CAN1RDB (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x2C))
864
865 #define CAN1TFI1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x30))
866 #define CAN1TID1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x34))
867 #define CAN1TDA1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x38))
868 #define CAN1TDB1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x3C))
869 #define CAN1TFI2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x40))
870 #define CAN1TID2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x44))
871 #define CAN1TDA2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x48))
872 #define CAN1TDB2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x4C))
873 #define CAN1TFI3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x50))
874 #define CAN1TID3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x54))
875 #define CAN1TDA3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x58))
876 #define CAN1TDB3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x5C))
877
878 #define CAN2_BASE_ADDR 0xE0048000
879 #define CAN2MOD (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x00))
880 #define CAN2CMR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x04))
881 #define CAN2GSR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x08))
882 #define CAN2ICR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x0C))
883 #define CAN2IER (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x10))
884 #define CAN2BTR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x14))
885 #define CAN2EWL (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x18))
886 #define CAN2SR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x1C))
887 #define CAN2RFS (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x20))
888 #define CAN2RID (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x24))
889 #define CAN2RDA (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x28))
890 #define CAN2RDB (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x2C))
891
892 #define CAN2TFI1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x30))
893 #define CAN2TID1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x34))
894 #define CAN2TDA1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x38))
895 #define CAN2TDB1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x3C))
896 #define CAN2TFI2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x40))
897 #define CAN2TID2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x44))
898 #define CAN2TDA2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x48))
899 #define CAN2TDB2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x4C))
900 #define CAN2TFI3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x50))
901 #define CAN2TID3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x54))
902 #define CAN2TDA3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x58))
903 #define CAN2TDB3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x5C))
904
905
906 /* MultiMedia Card Interface(MCI) Controller */
907 #define MCI_BASE_ADDR 0xE008C000
908 #define MCI_POWER (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x00))
909 #define MCI_CLOCK (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x04))
910 #define MCI_ARGUMENT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x08))
911 #define MCI_COMMAND (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x0C))
912 #define MCI_RESP_CMD (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x10))
913 #define MCI_RESP0 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x14))
914 #define MCI_RESP1 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x18))
915 #define MCI_RESP2 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x1C))
916 #define MCI_RESP3 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x20))
917 #define MCI_DATA_TMR (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x24))
918 #define MCI_DATA_LEN (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x28))
919 #define MCI_DATA_CTRL (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x2C))
920 #define MCI_DATA_CNT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x30))
921 #define MCI_STATUS (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x34))
922 #define MCI_CLEAR (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x38))
923 #define MCI_MASK0 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x3C))
924 #define MCI_MASK1 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x40))
925 #define MCI_FIFO_CNT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x48))
926 #define MCI_FIFO (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x80))
927
928
929 /* I2S Interface Controller (I2S) */
930 #define I2S_BASE_ADDR 0xE0088000
931 #define I2S_DAO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x00))
932 #define I2S_DAI (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x04))
933 #define I2S_TX_FIFO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x08))
934 #define I2S_RX_FIFO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x0C))
935 #define I2S_STATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x10))
936 #define I2S_DMA1 (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x14))
937 #define I2S_DMA2 (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x18))
938 #define I2S_IRQ (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x1C))
939 #define I2S_TXRATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x20))
940 #define I2S_RXRATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x24))
941
942
943 /* General-purpose DMA Controller */
944 #define DMA_BASE_ADDR 0xFFE04000
945 #define GPDMA_INT_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x000))
946 #define GPDMA_INT_TCSTAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x004))
947 #define GPDMA_INT_TCCLR (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x008))
948 #define GPDMA_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x00C))
949 #define GPDMA_INT_ERR_CLR (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x010))
950 #define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x014))
951 #define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x018))
952 #define GPDMA_ENABLED_CHNS (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x01C))
953 #define GPDMA_SOFT_BREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x020))
954 #define GPDMA_SOFT_SREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x024))
955 #define GPDMA_SOFT_LBREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x028))
956 #define GPDMA_SOFT_LSREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x02C))
957 #define GPDMA_CONFIG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x030))
958 #define GPDMA_SYNC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x034))
959
960 /* DMA channel 0 registers */
961 #define GPDMA_CH0_SRC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x100))
962 #define GPDMA_CH0_DEST (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x104))
963 #define GPDMA_CH0_LLI (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x108))
964 #define GPDMA_CH0_CTRL (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x10C))
965 #define GPDMA_CH0_CFG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x110))
966
967 /* DMA channel 1 registers */
968 #define GPDMA_CH1_SRC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x120))
969 #define GPDMA_CH1_DEST (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x124))
970 #define GPDMA_CH1_LLI (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x128))
971 #define GPDMA_CH1_CTRL (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x12C))
972 #define GPDMA_CH1_CFG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x130))
973
974
975 /* USB Controller */
976 #define USB_INT_BASE_ADDR 0xE01FC1C0
977 #define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */
978
979 #define USB_INT_STAT (*(volatile unsigned int *)(USB_INT_BASE_ADDR + 0x00))
980
981 /* USB Device Interrupt Registers */
982 #define DEV_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x00))
983 #define DEV_INT_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x04))
984 #define DEV_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0x08))
985 #define DEV_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0x0C))
986 #define DEV_INT_PRIO (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2C))
987
988 /* USB Device Endpoint Interrupt Registers */
989 #define EP_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x30))
990 #define EP_INT_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x34))
991 #define EP_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0x38))
992 #define EP_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0x3C))
993 #define EP_INT_PRIO (*(volatile unsigned int *)(USB_BASE_ADDR + 0x40))
994
995 /* USB Device Endpoint Realization Registers */
996 #define REALIZE_EP (*(volatile unsigned int *)(USB_BASE_ADDR + 0x44))
997 #define EP_INDEX (*(volatile unsigned int *)(USB_BASE_ADDR + 0x48))
998 #define MAXPACKET_SIZE (*(volatile unsigned int *)(USB_BASE_ADDR + 0x4C))
999
1000 /* USB Device Command Reagisters */
1001 #define CMD_CODE (*(volatile unsigned int *)(USB_BASE_ADDR + 0x10))
1002 #define CMD_DATA (*(volatile unsigned int *)(USB_BASE_ADDR + 0x14))
1003
1004 /* USB Device Data Transfer Registers */
1005 #define RX_DATA (*(volatile unsigned int *)(USB_BASE_ADDR + 0x18))
1006 #define TX_DATA (*(volatile unsigned int *)(USB_BASE_ADDR + 0x1C))
1007 #define RX_PLENGTH (*(volatile unsigned int *)(USB_BASE_ADDR + 0x20))
1008 #define TX_PLENGTH (*(volatile unsigned int *)(USB_BASE_ADDR + 0x24))
1009 #define USB_CTRL (*(volatile unsigned int *)(USB_BASE_ADDR + 0x28))
1010
1011 /* USB Device DMA Registers */
1012 #define DMA_REQ_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x50))
1013 #define DMA_REQ_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0x54))
1014 #define DMA_REQ_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0x58))
1015 #define UDCA_HEAD (*(volatile unsigned int *)(USB_BASE_ADDR + 0x80))
1016 #define EP_DMA_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x84))
1017 #define EP_DMA_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x88))
1018 #define EP_DMA_DIS (*(volatile unsigned int *)(USB_BASE_ADDR + 0x8C))
1019 #define DMA_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x90))
1020 #define DMA_INT_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x94))
1021 #define EOT_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA0))
1022 #define EOT_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA4))
1023 #define EOT_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA8))
1024 #define NDD_REQ_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0xAC))
1025 #define NDD_REQ_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB0))
1026 #define NDD_REQ_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB4))
1027 #define SYS_ERR_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB8))
1028 #define SYS_ERR_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0xBC))
1029 #define SYS_ERR_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0xC0))
1030
1031
1032 /* USB Host Controller */
1033 #define USBHC_BASE_ADDR 0xFFE0C000
1034 #define HC_REVISION (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x00))
1035 #define HC_CONTROL (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x04))
1036 #define HC_CMD_STAT (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x08))
1037 #define HC_INT_STAT (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x0C))
1038 #define HC_INT_EN (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x10))
1039 #define HC_INT_DIS (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x14))
1040 #define HC_HCCA (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x18))
1041 #define HC_PERIOD_CUR_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x1C))
1042 #define HC_CTRL_HEAD_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x20))
1043 #define HC_CTRL_CUR_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x24))
1044 #define HC_BULK_HEAD_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x28))
1045 #define HC_BULK_CUR_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x2C))
1046 #define HC_DONE_HEAD (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x30))
1047 #define HC_FM_INTERVAL (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x34))
1048 #define HC_FM_REMAINING (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x38))
1049 #define HC_FM_NUMBER (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x3C))
1050 #define HC_PERIOD_START (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x40))
1051 #define HC_LS_THRHLD (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x44))
1052 #define HC_RH_DESCA (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x48))
1053 #define HC_RH_DESCB (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x4C))
1054 #define HC_RH_STAT (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x50))
1055 #define HC_RH_PORT_STAT1 (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x54))
1056 #define HC_RH_PORT_STAT2 (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x58))
1057
1058 /* USB OTG Controller */
1059 #define USBOTG_BASE_ADDR 0xFFE0C100
1060 #define OTG_INT_STAT (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x00))
1061 #define OTG_INT_EN (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x04))
1062 #define OTG_INT_SET (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x08))
1063 #define OTG_INT_CLR (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x0C))
1064 #define OTG_STAT_CTRL (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x10))
1065 #define OTG_TIMER (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x14))
1066
1067 #define USBOTG_I2C_BASE_ADDR 0xFFE0C300
1068 #define OTG_I2C_RX (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00))
1069 #define OTG_I2C_TX (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00))
1070 #define OTG_I2C_STS (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x04))
1071 #define OTG_I2C_CTL (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x08))
1072 #define OTG_I2C_CLKHI (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x0C))
1073 #define OTG_I2C_CLKLO (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x10))
1074
1075 #define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0
1076 #define OTG_CLK_CTRL (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x04))
1077 #define OTG_CLK_STAT (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x08))
1078
1079
1080 /* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */
1081 #define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */
1082 #define MAC_MAC1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */
1083 #define MAC_MAC2 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */
1084 #define MAC_IPGT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */
1085 #define MAC_IPGR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */
1086 #define MAC_CLRT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */
1087 #define MAC_MAXF (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */
1088 #define MAC_SUPP (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */
1089 #define MAC_TEST (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */
1090 #define MAC_MCFG (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */
1091 #define MAC_MCMD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */
1092 #define MAC_MADR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */
1093 #define MAC_MWTD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */
1094 #define MAC_MRDD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */
1095 #define MAC_MIND (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */
1096
1097 #define MAC_SA0 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */
1098 #define MAC_SA1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */
1099 #define MAC_SA2 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */
1100
1101 #define MAC_COMMAND (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x100)) /* Command reg */
1102 #define MAC_STATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */
1103 #define MAC_RXDESCRIPTOR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */
1104 #define MAC_RXSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */
1105 #define MAC_RXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */
1106 #define MAC_RXPRODUCEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */
1107 #define MAC_RXCONSUMEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */
1108 #define MAC_TXDESCRIPTOR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */
1109 #define MAC_TXSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */
1110 #define MAC_TXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */
1111 #define MAC_TXPRODUCEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */
1112 #define MAC_TXCONSUMEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */
1113
1114 #define MAC_TSV0 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */
1115 #define MAC_TSV1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */
1116 #define MAC_RSV (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */
1117
1118 #define MAC_FLOWCONTROLCNT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */
1119 #define MAC_FLOWCONTROLSTS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */
1120
1121 #define MAC_RXFILTERCTRL (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */
1122 #define MAC_RXFILTERWOLSTS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */
1123 #define MAC_RXFILTERWOLCLR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */
1124
1125 #define MAC_HASHFILTERL (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */
1126 #define MAC_HASHFILTERH (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */
1127
1128 #define MAC_INTSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */
1129 #define MAC_INTENABLE (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */
1130 #define MAC_INTCLEAR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */
1131 #define MAC_INTSET (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */
1132
1133 #define MAC_POWERDOWN (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */
1134 #define MAC_MODULEID (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */
1135
1136
1137 #endif /* __LPC23xx_H */
1138
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@@ -0,0 +1,49
1 ENTRY(_startup)
2
3 MEMORY
4 {
5 RAM (rw) : ORIGIN = 0x40000200, LENGTH = (0x00010000 - 0x00000200 - 0x20 - 0x100)
6 }
7
8 SECTIONS
9 {
10 .text :
11 {
12 _text = .;
13 *startup.o (.text)
14 *(.text)
15 *(.glue_7)
16 *(.glue_7t)
17 } > RAM
18
19 . = ALIGN(4);
20 _etext = .;
21
22 .rodata :
23 {
24 _rodata = . ;
25 *(.rodata)
26 } > RAM
27
28 . = ALIGN(4);
29 _erodata = .;
30
31 .data :
32 {
33 _data = . ;
34 *(.data)
35 } > RAM
36
37 . = ALIGN(4);
38 _edata = .;
39
40 .bss :
41 {
42 __bss_start = .;
43 *(.bss)
44 } > RAM
45
46 . = ALIGN(4);
47 __bss_end = . ;
48 }
49 _end = .;
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@@ -0,0 +1,12
1 .text
2 .global _startup
3 .func _startup
4 _startup:
5 mov r0, #0
6 mov r1, #0
7 ldr lr, =__back
8 b main
9 __back:
10 b __back
11 .endfunc
12 .end
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@@ -0,0 +1,211
1 #/*------------------------------------------------------------------------------
2 #-- This file is a part of the libuc, microcontroler library
3 #-- Copyright (C) 2011, Alexis Jeandet
4 #--
5 #-- This program is free software; you can redistribute it and/or modify
6 #-- it under the terms of the GNU General Public License as published by
7 #-- the Free Software Foundation; either version 3 of the License, or
8 #-- (at your option) any later version.
9 #--
10 #-- This program is distributed in the hope that it will be useful,
11 #-- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 #-- GNU General Public License for more details.
14 #--
15 #-- You should have received a copy of the GNU General Public License
16 #-- along with this program; if not, write to the Free Software
17 #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #-------------------------------------------------------------------------------
19 #-- Author : Alexis Jeandet
20 #-- Mail : alexis.jeandet@gmail.com
21 #-------------------------------------------------------------------------------*/
22
23 #---------------------------------------------------------------------------------
24 # GCC EXECUTABLES
25 #---------------------------------------------------------------------------------
26 LIBUC_PREFIX = arm-none-eabi-
27 LIBUC_CC = $(LIBUC_PREFIX)gcc
28 LIBUC_CXX = $(LIBUC_PREFIX)g++
29 LIBUC_AR = $(LIBUC_PREFIX)ar
30 LIBUC_AS = $(LIBUC_PREFIX)as
31 LIBUC_LD = $(LIBUC_PREFIX)ld
32 LIBUC_SIZE = $(LIBUC_PREFIX)size
33 LIBUC_STRIP = $(LIBUC_PREFIX)strip -s
34 LIBUC_READELF = $(LIBUC_PREFIX)readelf
35 LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy
36 LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump
37
38
39
40 #---------------------------------------------------------------------------------
41 # GCC FLAGS
42 #---------------------------------------------------------------------------------
43 LIBUC_FMCU = -mcpu=arm7tdmi
44 LIBUC_CFLAGS = $(LIBUC_FMCU)
45 LIBUC_CFLAGS = -g -gdwarf-2 $(LIBUC_FMCU)
46 LIBUC_CFLAGS += -Wall -Wextra -Wundef -Wcast-align
47 LIBUC_LDFLAGS = --gc-sections
48 LIBUC_ODFLAGS = -x --syms
49 LIBUC_CPFLAGS =
50 LIBUC_CFLAGS_WARN_ON = -Wall
51 LIBUC_CFLAGS_WARN_OFF = -w
52 LIBUC_CFLAGS_RELEASE = -O2
53 LIBUC_CFLAGS_DEBUG = -g
54 LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g
55 LIBUC_CFLAGS_STATIC_LIB = -fPIC
56 LIBUC_CFLAGS_SOFT_FPU = -msoft-float
57 LIBUC_CFLAGS_HARD_FPU =
58
59 LIBUC_CXXFLAGS = $(LIBUC_FMCU)
60 LIBUC_CXXFLAGS += -g -gdwarf-2 $(LIBUC_FMCU)
61 LIBUC_CXXFLAGS += -Wall -Wextra -Wundef -Wcast-align
62 LIBUC_CXXFLAGS_WARN_ON = -Wall
63 LIBUC_CXXFLAGS_WARN_OFF = -w
64 LIBUC_CXXFLAGS_RELEASE = -O2
65 LIBUC_CXXFLAGS_DEBUG = -g
66 LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g
67 LIBUC_CXXFLAGS_STATIC_LIB = -fPIC
68 LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float
69 LIBUC_CXXFLAGS_HARD_FPU =
70
71 #---------------------------------------------------------------------------------
72 # LIBRARY DEFINITIONS
73 #---------------------------------------------------------------------------------
74
75 LIBUC_LIBS =
76 LIBUC_LIBS_CORE = -static -lcore
77 LIBUC_LIBS_UCSTRINGS = -static -lucstrings
78 LIBUC_LIBS_UART = -static -luart
79 LIBUC_LIBS_SPI = -static -lspi
80 LIBUC_LIBS_SSP = -static -lssp
81 LIBUC_LIBS_IIC = -static -liic
82 LIBUC_LIBS_ADC = -static -ladc
83 LIBUC_LIBS_24LC0X = -static -l24lc0X
84 LIBUC_LIBS_SDCARD = -static -lsdcard
85 LIBUC_LIBS_BLKDEVICE = -static -lblkdevice
86 LIBUC_LIBS_VS10XX = -static -lvs10XX
87
88 LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/lpc21XX
89 LIBUC_LIBS_DIR_CORE = $(LIBUC_LIBS_DIR)/CORE
90 LIBUC_LIBS_DIR_UCSTRINGS = $(LIBUC_LIBS_DIR)/STRINGS/$(ARCH)
91 LIBUC_LIBS_DIR_UART = $(LIBUC_LIBS_DIR)/UART
92 LIBUC_LIBS_DIR_SPI = $(LIBUC_LIBS_DIR)/SPI
93 LIBUC_LIBS_DIR_SSP = $(LIBUC_LIBS_DIR)/SSP
94 LIBUC_LIBS_DIR_IIC = $(LIBUC_LIBS_DIR)/IIC
95 LIBUC_LIBS_DIR_ADC = $(LIBUC_LIBS_DIR)/ADC
96 LIBUC_LIBS_DIR_24LC0X = $(LIBUC_LIBS_DIR)/24LCXX/24LC0X
97 LIBUC_LIBS_DIR_SDCARD = $(LIBUC_LIBS_DIR)/SDCARD
98 LIBUC_LIBS_DIR_VS10XX = $(LIBUC_LIBS_DIR)/VS10XX
99 LIBUC_LIBS_DIR_BLKDEVICE = $(LIBUC_LIBS_DIR)/BLKDEVICE
100
101 LIBUC_LIBS_DIR_CORE_CMD = -L $(LIBUC_LIBS_DIR_CORE)
102 LIBUC_LIBS_DIR_UCSTRINGS_CMD = -L $(LIBUC_LIBS_DIR_UCSTRINGS)
103 LIBUC_LIBS_DIR_UART_CMD = -L $(LIBUC_LIBS_DIR_UART)
104 LIBUC_LIBS_DIR_SPI_CMD = -L $(LIBUC_LIBS_DIR_SPI)
105 LIBUC_LIBS_DIR_SSP_CMD = -L $(LIBUC_LIBS_DIR_SSP)
106 LIBUC_LIBS_DIR_IIC_CMD = -L $(LIBUC_LIBS_DIR_IIC)
107 LIBUC_LIBS_DIR_ADC_CMD = -L $(LIBUC_LIBS_DIR_ADC)
108 LIBUC_LIBS_DIR_24LC0X_CMD = -L $(LIBUC_LIBS_DIR_24LC0X)
109 LIBUC_LIBS_DIR_SDCARD_CMD = -L $(LIBUC_LIBS_DIR_SDCARD)
110 LIBUC_LIBS_DIR_VS10XX_CMD = -L $(LIBUC_LIBS_DIR_VS10XX)
111 LIBUC_LIBS_DIR_BLKDEVICE_CMD = -L $(LIBUC_LIBS_DIR_BLKDEVICE)
112
113 LIBUC_INC_DIR = $(LIBUC)/lib/includes/lpc21XX
114 LIBUC_INC_DIR_CORE = $(LIBUC_INC_DIR)/CORE
115 LIBUC_INC_DIR_UCSTRINGS = $(LIBUC_INC_DIR)/STRINGS/$(ARCH)
116 LIBUC_INC_DIR_UART = $(LIBUC_INC_DIR)/UART
117 LIBUC_INC_DIR_SPI = $(LIBUC_INC_DIR)/SPI
118 LIBUC_INC_DIR_SSP = $(LIBUC_INC_DIR)/SSP
119 LIBUC_INC_DIR_IIC = $(LIBUC_INC_DIR)/IIC
120 LIBUC_INC_DIR_ADC = $(LIBUC_INC_DIR)/ADC
121 LIBUC_INC_DIR_24LC0X = $(LIBUC_INC_DIR)/24LCXX/24LC0X
122 LIBUC_INC_DIR_SDCARD = $(LIBUC_INC_DIR)/SDCARD
123 LIBUC_INC_DIR_VS10XX = $(LIBUC_INC_DIR)/VS10XX
124 LIBUC_INC_DIR_BLKDEVICE = $(LIBUC_INC_DIR)/BLKDEVICE
125
126 LIBUC_INC_DIR_CORE_CMD = -I $(LIBUC_INC_DIR_CORE)
127 LIBUC_INC_DIR_UCSTRINGS_CMD = -I $(LIBUC_INC_DIR_UCSTRINGS)
128 LIBUC_INC_DIR_UART_CMD = -I $(LIBUC_INC_DIR_UART)
129 LIBUC_INC_DIR_SPI_CMD = -I $(LIBUC_INC_DIR_SPI)
130 LIBUC_INC_DIR_SSP_CMD = -I $(LIBUC_INC_DIR_SSP)
131 LIBUC_INC_DIR_IIC_CMD = -I $(LIBUC_INC_DIR_IIC)
132 LIBUC_INC_DIR_ADC_CMD = -I $(LIBUC_INC_DIR_ADC)
133 LIBUC_INC_DIR_24LC0X_CMD = -I $(LIBUC_INC_DIR_24LC0X)
134 LIBUC_INC_DIR_SDCARD_CMD = -I $(LIBUC_INC_DIR_SDCARD)
135 LIBUC_INC_DIR_VS10XX_CMD = -I $(LIBUC_INC_DIR_VS10XX)
136 LIBUC_INC_DIR_BLKDEVICE_CMD = -I $(LIBUC_INC_DIR_BLKDEVICE)
137
138 #---------------------------------------------------------------------------------
139 # BOARD SUPORT PACKAGES
140 #---------------------------------------------------------------------------------
141 LIBUC_BSP_DIR=$(LIBUC)/bsp
142 LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin
143 LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes
144 LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp
145 LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP)
146 #---------------------------------------------------------------------------------
147 # DEVICE SPECIAL FILES
148 #---------------------------------------------------------------------------------
149 LINKER_SCRIPT = $(ARCHFOLDER)/LPC2103_ram.ld
150 APPSOURCES += $(ARCHFOLDER)/ramstartup-1.S
151 LPC21XX_INCDIR=$(ARCHFOLDER)
152
153
154 #---------------------------------------------------------------------------------
155 # RULES
156 #---------------------------------------------------------------------------------
157
158 all:
159 @echo "lpc21XX-arm-noabi-gcc rules"
160
161
162 bin: $(TARGET).bin $(TARGET).hex
163 @echo "compile bin"
164
165
166
167 lib: $(TARGET).a
168 @echo "compile lib"
169
170 %.a: $(OBJECTFILES)
171 mkdir -p $(TARGETINSTALLPATH)
172 mkdir -p $(HEADERSINSTALLPATH)
173 $(LIBUC_AR) rcs $(TARGETINSTALLPATH)/$@ $(OBJECTFILES)
174 cp -f $(HEADERS) $(HEADERSINSTALLPATH)/
175
176 %.o: %.S
177 $(LIBUC_CC) -O3 -c -o $@ $< $(LIBUC_CFLAGS)
178
179 %.o: %.c
180 $(LIBUC_CC) -O3 -I $(LPC21XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -MM $< -MF $*.d -MP
181 $(LIBUC_CC) -O3 -I $(LPC21XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@
182
183
184 %.elf: $(LINKER_SCRIPT) $(OBJECTFILES)
185 $(LIBUC_CC) -O3 -nostartfiles -T $^ -o $@ -static $(LIBUC_BSP) $(LIBUC_LIBRARIES)
186 $(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump)
187 $(LIBUC_SIZE) $@
188
189 %.bin: %.elf
190 $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin
191
192
193 %.hex: %.elf
194 $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex
195
196
197 clean:
198 rm -f *.o *.d *.bin *.hex *.dump *.map *.a
199
200 distclean:
201 rm -f $(TARGETINSTALLPATH)/*.bin
202 rm -f $(TARGETINSTALLPATH)/*.a
203
204
205
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207
208
209
210
211
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