# HG changeset patch
# User jeandet
# Date 2012-01-06 15:50:47
# Node ID 798f00e676fa3fc403d592c897224211caf7be43
# Parent  75324080a75ffc64b46d6ba3eff94c15d6a4850e

SD card Library started, SDCARD init and detection OK

diff --git a/Doc/PortingGuide/src/*.tex b/Doc/PortingGuide/src/*.tex
new file mode 100644
--- /dev/null
+++ b/Doc/PortingGuide/src/*.tex
@@ -0,0 +1,22 @@
+\relax 
+\@setckpt{../../latex/header}{
+\setcounter{page}{1}
+\setcounter{equation}{0}
+\setcounter{enumi}{0}
+\setcounter{enumii}{0}
+\setcounter{enumiii}{0}
+\setcounter{enumiv}{0}
+\setcounter{footnote}{0}
+\setcounter{mpfootnote}{0}
+\setcounter{part}{0}
+\setcounter{chapter}{0}
+\setcounter{section}{0}
+\setcounter{subsection}{0}
+\setcounter{subsubsection}{0}
+\setcounter{paragraph}{0}
+\setcounter{subparagraph}{0}
+\setcounter{figure}{0}
+\setcounter{table}{0}
+\setcounter{lstlisting}{0}
+\setcounter{lstnumber}{1}
+}
diff --git a/Doc/PortingGuide/src/7.tex b/Doc/PortingGuide/src/7.tex
new file mode 100644
--- /dev/null
+++ b/Doc/PortingGuide/src/7.tex
@@ -0,0 +1,22 @@
+\relax 
+\@setckpt{../../latex/header}{
+\setcounter{page}{1}
+\setcounter{equation}{0}
+\setcounter{enumi}{0}
+\setcounter{enumii}{0}
+\setcounter{enumiii}{0}
+\setcounter{enumiv}{0}
+\setcounter{footnote}{0}
+\setcounter{mpfootnote}{0}
+\setcounter{part}{0}
+\setcounter{chapter}{0}
+\setcounter{section}{0}
+\setcounter{subsection}{0}
+\setcounter{subsubsection}{0}
+\setcounter{paragraph}{0}
+\setcounter{subparagraph}{0}
+\setcounter{figure}{0}
+\setcounter{table}{0}
+\setcounter{lstlisting}{0}
+\setcounter{lstnumber}{1}
+}
diff --git a/bsp/src/BlueBoard/Makefile b/bsp/src/BlueBoard/Makefile
new file mode 100644
--- /dev/null
+++ b/bsp/src/BlueBoard/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_BSP_INC_DIR)/BlueBoard 
+HEADERS += bsp.h
+LIBSOURCES += bsp.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc21XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
+TARGET=libbsp
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) 
+TARGETINSTALLPATH=$(LIBUC_BSP_BIN_DIR)/BlueBoard
+HEADERSINSTALLPATH=$(LIBUC_BSP_INC_DIR)/BlueBoard
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/bsp/src/BlueBoard/blueboard.pro b/bsp/src/BlueBoard/blueboard.pro
new file mode 100644
--- /dev/null
+++ b/bsp/src/BlueBoard/blueboard.pro
@@ -0,0 +1,12 @@
+TEMPLATE = lib
+ARCH = lpc21XX-arm-noabi-gcc
+TARGET = libbsp
+TARGETINSTALLPATH = $(LIBUC_BSP_BIN_DIR)/BlueBoard 
+HEADERSINSTALLPATH = $(LIBUC_BSP_INC_DIR)/BlueBoard 
+
+LIBS += UART CORE 
+
+SOURCES += bsp.c
+
+
+HEADERS += bsp.h
diff --git a/bsp/src/BlueBoard/bsp.c b/bsp/src/BlueBoard/bsp.c
new file mode 100644
--- /dev/null
+++ b/bsp/src/BlueBoard/bsp.c
@@ -0,0 +1,136 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "bsp.h"
+#include "core.h"
+
+
+unsigned int OSC0  =12000000;
+unsigned int INTOSC =4000000;
+unsigned int RTCOSC =32768;
+unsigned int currentCpuFreq=0;
+float VREF0 =(float)3.3;
+uartDev* UART0=(uartDev*)0;
+uartDev* UART1=(uartDev*)0;
+uartDev* UART2=(uartDev*)0;
+uartDev* UART3=(uartDev*)0;
+
+i2cDev* IIC0=(i2cDev*)0;
+i2cDev* IIC1=(i2cDev*)0;
+i2cDev* IIC2=(i2cDev*)0;
+
+sspDev* SSP0=(sspDev*)0;
+sspDev* SSP1=(sspDev*)0;
+
+eeprom24lc0xDev eeprom0;
+
+int bsp_init()
+{
+	bsp_GPIO_init();
+	coresetCpuFreq(20000000);
+	currentCpuFreq=coregetCpuFreq();
+	coresetCpuFreq(60000000);
+	currentCpuFreq=coregetCpuFreq();
+	bsp_uart_init();
+	bsp_iic_init();
+	bsp_ssp_init();
+	return 0;
+}
+
+void bsp_GPIO_init()
+{
+	LPC_SC->PCONP |= ( 1 << 15 ); // power up GPIO
+	LPC_GPIO2->FIODIR |=255;
+	LEDS_OFF;
+}
+
+void bsp_uart_init()
+{
+	LPC_SC->PCONP |= ( 1 << 24 ); // power up UART3
+	LPC_SC->PCONP |= ( 1 << 4 ); // power up UART1
+	LPC_PINCON->PINSEL0 |= (1<<4);
+	LPC_PINCON->PINSEL0 &= ~(1<<5);
+	LPC_PINCON->PINSEL0 |= (1<<6);
+	LPC_PINCON->PINSEL0 &= ~(1<<7);
+	LPC_PINCON->PINSEL0 |= (1<<20);
+	LPC_PINCON->PINSEL0 &= ~(1<<21);
+	LPC_PINCON->PINSEL0 |= (1<<22);
+	LPC_PINCON->PINSEL0 &= ~(1<<23);
+	UART0= uartopen(0);
+	uartsetup(UART0,38400,8,1,uartNoParity);
+	UART2= uartopen(2);
+	uartsetup(UART2,38400,8,1,uartNoParity);
+}
+
+void bsp_ssp_init()
+{
+	SSP0 = sspopen(0);		// power up SSP0
+	ssppowerup(SSP0);
+	sspsetpclkfactor(SSP0,1);
+	LPC_PINCON->PINSEL3 |= (3<<14); //MISO0 on P1.23
+	LPC_PINCON->PINSEL3 |= (3<<16); //MOSI0 on P1.24
+	LPC_PINCON->PINSEL3 |= (3<<8);  //SCK0 on P1.24
+	LPC_PINCON->PINSEL3 |= (3<<10); //SSEL0 on P1.21
+	sspsetup(SSP0,8,FFSPI|CLKINHLOW|CKfirstEdge,loopbackOFF|MASTERMODE, 250000);
+	enableSSP(SSP0);
+}
+
+
+void bsp_iic_init()
+{
+	LPC_SC->PCONP |= ( 1 << 7 ); // power up IIC0
+	LPC_PINCON->PINSEL1 |= (1<<22);
+	LPC_PINCON->PINSEL1 &= ~(1<<23);
+	LPC_PINCON->PINSEL1 |= (1<<24);
+	LPC_PINCON->PINSEL1 &= ~(1<<25);
+	IIC0 = i2copen(0);
+	i2csetdatarate(IIC0,100000);
+	eeprom24lc0xopen(&eeprom0,IIC0,0,2048);
+}
+
+void consoleputc(char c)
+{
+	uartputc(UART0,c);
+}
+
+
+char consolegetc()
+{
+	return uartgetc(UART0);
+}
+
+
+
+void vs10XXclearXCS(){}
+void vs10XXsetXCS(){}
+int vs10XXDREQ()
+{
+	return 1;
+}
+
+
+
+
+
+
+
+
+
diff --git a/bsp/src/BlueBoard/bsp.h b/bsp/src/BlueBoard/bsp.h
new file mode 100644
--- /dev/null
+++ b/bsp/src/BlueBoard/bsp.h
@@ -0,0 +1,101 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef BSP_H
+#define BSP_H
+#include "LPC23xx.h"
+#include <uart.h>
+
+
+extern uartDev* UART0;
+extern uartDev* UART1;
+extern uartDev* UART2;
+extern uartDev* UART3;
+
+extern i2cDev* IIC0;
+extern i2cDev* IIC1;
+extern i2cDev* IIC2;
+
+extern sspDev* SSP0;
+extern sspDev* SSP1;
+
+extern eeprom24lc0xDev eeprom0;
+
+extern float VREF0;
+
+extern unsigned int currentCpuFreq;
+
+#define pll0useInternal 0
+#define pll0useMainOsc 1
+#define pll0useRTC 2
+
+
+#define pll0setClksrc(src) if((unsigned int)(src)<3) LPC_SC->CLKSRCSEL=(src)
+#define pll0getClksrc (LPC_SC->CLKSRCSEL & 3)
+
+#define LEDS_ON LPC_GPIO2->FIOSET = 255
+
+#define LED1_ON LPC_GPIO2->FIOSET = (1<<0)
+#define LED2_ON LPC_GPIO2->FIOSET = (1<<1)
+#define LED3_ON LPC_GPIO2->FIOSET = (1<<2)
+#define LED4_ON LPC_GPIO2->FIOSET = (1<<3)
+#define LED5_ON LPC_GPIO2->FIOSET = (1<<4)
+#define LED6_ON LPC_GPIO2->FIOSET = (1<<5)
+#define LED7_ON LPC_GPIO2->FIOSET = (1<<6)
+#define LED8_ON LPC_GPIO2->FIOSET = (1<<7)
+
+#define LEDS_OFF LPC_GPIO2->FIOCLR = ~(255)
+
+#define LED1_OFF LPC_GPIO2->FIOCLR = (1<<0)
+#define LED2_OFF LPC_GPIO2->FIOCLR = (1<<1)
+#define LED3_OFF LPC_GPIO2->FIOCLR = (1<<2)
+#define LED4_OFF LPC_GPIO2->FIOCLR = (1<<3)
+#define LED5_OFF LPC_GPIO2->FIOCLR = (1<<4)
+#define LED6_OFF LPC_GPIO2->FIOCLR = (1<<5)
+#define LED7_OFF LPC_GPIO2->FIOCLR = (1<<6)
+#define LED8_OFF LPC_GPIO2->FIOCLR = (1<<7)
+
+extern int bsp_init();
+
+extern void bsp_GPIO_init();
+extern void bsp_uart_init();
+extern void bsp_iic_init();
+extern void bsp_ssp_init();
+extern void consoleputc(char);
+extern char consolegetc();
+
+/*  VS1053  */
+extern void clearXCS();
+extern void setXCS();
+extern int vs10XXDREQ();
+
+
+#endif
+
+
+
+
+
+
+
+
+
+
diff --git a/examples/SDCARD/Makefile b/examples/SDCARD/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/SDCARD/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_SDCARD
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=LandTiger
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/SDCARD/main.c b/examples/SDCARD/main.c
new file mode 100644
--- /dev/null
+++ b/examples/SDCARD/main.c
@@ -0,0 +1,312 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#include "uart.h"
+#include "libucstrings.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+#define ledspos1 LED1_OFF;LED2_ON;LED3_OFF;LED4_ON;LED5_OFF;LED6_ON;LED7_OFF;LED8_ON
+#define ledspos2 LED1_ON;LED2_OFF;LED3_ON;LED4_OFF;LED5_ON;LED6_OFF;LED7_ON;LED8_OFF
+
+void checkforsdcard();
+void senddummyclocks(int n);
+int sendCMD0();
+int sendCMD8();
+int sendACMD41(int arg);
+int sendCMD55();
+int sendCMD1();
+int sendCMD58();
+
+int main (void) 
+{
+	int i;
+	bsp_init();
+	uartsetbaudrate(UART0,38400);
+	checkforsdcard();
+	while(!bspsdcardpresent());
+	checkforsdcard();
+	__delay(1024*10);
+	senddummyclocks(74);
+	__delay(1024*100);
+	if(sendCMD0())
+	{
+		//__delay(1024*10);
+		if(sendCMD8())
+		{
+		//	__delay(1024*10);
+			libucprintf("Maybe SD card V2 \n\r");
+			if(sendACMD41(1))
+			{
+		//		__delay(1024*10);
+				i = sendCMD58();
+				if(0x40== (i & 0x40))
+				{
+					libucprintf("SD HC card \n\r");
+				}
+				else
+				{
+					libucprintf("SD card V2 \n\r");
+				}
+			}
+			else
+			{
+				libucprintf("Unknow card\n\r");
+			}
+		}
+		else
+		{
+			//libucprintf("Maybe SD card V1 \n\r");
+			if(sendACMD41(0))
+			{
+				libucprintf("SD card V1 \n\r");
+			}
+			else
+			{
+				if(sendCMD1())
+				{
+					libucprintf("MMC V3 card \n\r");
+				}
+				else
+				{
+					libucprintf("Unknow card\n\r");
+				}
+			}
+		}
+	}
+	__delay(1024);
+	while(1)
+	{
+		ledspos1;
+		
+		__delay(1024*1024);		
+		ledspos2;
+		
+		__delay(1024*1024);
+	}
+	return 0;
+  
+}
+
+int sendCMD0()
+{
+	//libucprintf("Send CMD0\n\r");
+	int n=10;
+	char resp[8];
+	bspsdcardselect(1);
+	sspputc(SSP0,0x40);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0x95);
+	do 
+	{sspgetnc(SSP0,resp,1);}
+	while(resp[0]!=1 && n--);
+	
+	if(resp[0]==1)
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 1;
+	}
+	else 
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 0;
+	}
+}
+
+int sendCMD1()
+{
+	//libucprintf("Send CMD1\n\r");
+	int n=10;
+	char resp[8];
+	do{
+		bspsdcardselect(1);
+		sspputc(SSP0,0x41);
+		sspputc(SSP0,0);
+		sspputc(SSP0,0);
+		sspputc(SSP0,0);
+		sspputc(SSP0,0);
+		sspputc(SSP0,0x1);
+		do 
+		{
+			sspgetnc(SSP0,resp,1);
+		}while((resp[0] &0x80) && n--);
+		
+		n=10;
+		resp[0]=0xff;
+	}while(resp[0]>1);
+	if(resp[0]==0)
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 1;
+	}
+	else 
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 0;
+	}
+}
+
+
+int sendCMD8()
+{
+	//libucprintf("Send CMD8\n\r");
+	int n=10;
+	char resp[8];
+	bspsdcardselect(1);
+	sspputc(SSP0,0x48);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0x1);
+	sspputc(SSP0,0xAA);
+	sspputc(SSP0,0x87);
+	do 
+	{sspgetnc(SSP0,resp,1);}
+	while(resp[0]!=1 && n--);
+	
+	if(resp[0]==1)
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 1;
+	}
+	else 
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 0;
+	}
+}
+
+int sendCMD55()
+{
+	//libucprintf("Send CMD55\n\r");
+	int n=10;
+	char resp[8];
+	bspsdcardselect(1);
+	sspputc(SSP0,0x40|55);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0x63);
+	do 
+	{sspgetnc(SSP0,resp,1);}
+	while(resp[0]!=1 && n--);
+	
+	if(resp[0]==1)
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 1;
+	}
+	else 
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 0;
+	}
+}
+
+int sendCMD58()
+{
+	int n=10;
+	char resp[4];
+	//libucprintf("Send CMD58\n\r");
+	bspsdcardselect(1);
+	sspputc(SSP0,0x58);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0);
+	sspputc(SSP0,0x0);
+	sspputc(SSP0,0x0);
+	sspputc(SSP0,0x1);
+	sspgetnc(SSP0,resp,4);
+	bspsdcardselect(0);
+	int a = resp[0]+(resp[1]<<8)+(resp[1]<<16)+(resp[1]<<24);
+	return a;
+}
+
+
+
+int sendACMD41(int arg)
+{
+	//libucprintf("Send ACMD41\n\r");
+	int n=10;
+	char resp[10];
+	do{
+		sendCMD55();
+		__delay(1024);
+		n=10;
+		resp[0]=0xff;
+		bspsdcardselect(1);
+		sspputc(SSP0,0x80+0x41);
+		sspputc(SSP0,(char)(arg>>24));
+		sspputc(SSP0,(char)(arg>>16));
+		sspputc(SSP0,(char)(arg>>8));
+		sspputc(SSP0,(char)(arg));
+		sspputc(SSP0,0x1);
+		do 
+		{
+			sspgetnc(SSP0,resp,1);
+		}while((resp[0] & 0x80) && n--);
+		
+	}while(resp[0]>1);
+	if(resp[0]==0)
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 1;
+	}
+	else 
+	{
+		//sspgetnc(SSP0,resp,8);
+		bspsdcardselect(0);
+		return 0;
+	}
+}
+
+
+
+
+void senddummyclocks(int n)
+{
+	libucprintf("Send dummy clocks\n\r");
+	while(n--)
+	{sspputc(SSP0,0xFF);}
+}
+
+void checkforsdcard()
+{
+	if(bspsdcardpresent())libucprintf("SD card detected\n\r");
+		else libucprintf("NO SD card detected\n\r");
+}
+
+
+
+
diff --git a/examples/SDCARD/sdcard.pro b/examples/SDCARD/sdcard.pro
new file mode 100644
--- /dev/null
+++ b/examples/SDCARD/sdcard.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_SDCARD
+BSP = LandTiger
+
+LIBS += SDCARD BLKDEVICE UART 24LC0X SSP IIC CORE UCSTRINGS 
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/SDCARD2/Makefile b/examples/SDCARD2/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/SDCARD2/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_SDCARD
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=LandTiger
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/SDCARD2/main.c b/examples/SDCARD2/main.c
new file mode 100644
--- /dev/null
+++ b/examples/SDCARD2/main.c
@@ -0,0 +1,97 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#include "uart.h"
+#include "libucstrings.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+#define ledspos1 LED1_OFF;LED2_ON;LED3_OFF;LED4_ON;LED5_OFF;LED6_ON;LED7_OFF;LED8_ON
+#define ledspos2 LED1_ON;LED2_OFF;LED3_ON;LED4_OFF;LED5_ON;LED6_OFF;LED7_ON;LED8_OFF
+
+int main (void) 
+{
+	int i,n;
+	char a[10];
+	bsp_init();
+	uartsetbaudrate(UART0,38400);
+	libucprintf("hello\n\r");
+	BLKDEVSDCARD0.initialize(&BLKDEVSDCARD0,0);
+	switch(SDCARD0.Stat)
+	{
+		case 0:
+			libucprintf("Card initialized\n\r");
+			break;
+		case STA_NOINIT  :
+			libucprintf("Card NOT initialized\n\r");
+			break;
+		case STA_NODISK  :
+			libucprintf("NO Card\n\r");
+			break;
+		case STA_PROTECT :	
+			libucprintf("Card protected\n\r");
+			break;
+		default:
+			break;
+	}
+	
+	switch(SDCARD0.CardType)
+	{
+		case CT_MMC:
+			libucprintf("Card is MMC\n\r");
+			break;
+		case CT_SD1:
+			libucprintf("Card is SD V1\n\r");
+			break;
+		case CT_SD2:
+			libucprintf("Card is SD V2\n\r");
+			break;
+		case CT_BLOCK|CT_SD2:
+			libucprintf("Card is SDHC\n\r");
+			break;
+		default:
+			break;
+	}
+	while(1)
+	{
+		ledspos1;
+		
+		__delay(1024*1024);		
+		ledspos2;
+		
+		__delay(1024*1024);
+	}
+	return 0;
+  
+}
+
+
+
+
+
+
+
+
+
+
+
diff --git a/examples/SDCARD2/sdcard.pro b/examples/SDCARD2/sdcard.pro
new file mode 100644
--- /dev/null
+++ b/examples/SDCARD2/sdcard.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_SDCARD
+BSP = LandTiger
+
+LIBS += SDCARD BLKDEVICE UART 24LC0X SSP IIC CORE UCSTRINGS 
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/Makefile b/examples/lpc17XX/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/Makefile
@@ -0,0 +1,23 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+include $(LIBUC)/rules/common/rules.mk
+
+all:subdir
+	make -C lpc1768_iic_LandTiger
+	make -C lpc1768_led_blink
+	make -C lpc1768_led_blink_Clk_api
+	make -C lpc1768_ssp_LandTiger
+	make -C lpc1768_uart
+	make -C lpc1768_uart_LandTiger
+	@echo Code compiled
+
+clean:
+	make clean -C  lpc1768_iic_LandTiger
+	make clean -C  lpc1768_led_blink
+	make clean -C  lpc1768_led_blink_Clk_api
+	make clean -C  lpc1768_ssp_LandTiger
+	make clean -C  lpc1768_uart
+	make clean -C  lpc1768_uart_LandTiger
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_iic_LandTiger/Makefile b/examples/lpc17XX/lpc1768_iic_LandTiger/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_iic_LandTiger/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_iic
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=LandTiger
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_iic_LandTiger/lpc1768_iic.pro b/examples/lpc17XX/lpc1768_iic_LandTiger/lpc1768_iic.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_iic_LandTiger/lpc1768_iic.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_iic
+BSP = LandTiger
+
+LIBS += SDCARD BLKDEVICE UART 24LC0X SSP IIC CORE UCSTRINGS 
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/lpc1768_iic_LandTiger/main.c b/examples/lpc17XX/lpc1768_iic_LandTiger/main.c
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_iic_LandTiger/main.c
@@ -0,0 +1,107 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#include "uart.h"
+#include "libucstrings.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+#define ledspos1 LED1_OFF;LED2_ON;LED3_OFF;LED4_ON;LED5_OFF;LED6_ON;LED7_OFF;LED8_ON
+#define ledspos2 LED1_ON;LED2_OFF;LED3_ON;LED4_OFF;LED5_ON;LED6_OFF;LED7_ON;LED8_OFF
+#define tableSize 256
+
+
+void eepromTest();
+
+int main (void) 
+{
+	bsp_init();
+	uartsetbaudrate(UART0,38400);
+	eepromTest();
+	libucprintf("CPU Freq =%dMHz\n\r",currentCpuFreq/1000000);
+	libucprintf("IIC Freq =%dKHz\n\r",i2cgetdatarate(IIC0)/1000);
+	while(1)
+	{
+		ledspos1;
+		
+		__delay(1024*1024);		
+		ledspos2;
+		
+		__delay(1024*1024);
+		
+	}
+	return 0;
+  
+}
+
+
+
+
+
+void eepromTest()
+{
+	unsigned char val1,val2;
+	unsigned char table1[256];
+	unsigned char table2[256]; 
+	int i=0;
+	for(i=0;i<tableSize;i++)table1[i]=i;
+	libucprintf("Writing 0x56 @ 0x10...");
+	eeprom24lc0xbytewrite(eeprom0,0x10,0x56);
+	libucprintf("\tdone\n\r");
+	libucprintf("Writing 0xF1 @ 0x39...");
+	eeprom24lc0xbytewrite(eeprom0,0x39,0xF1);
+	libucprintf("\tdone\n\r");
+	libucprintf("Reading @ 0x10 ...");
+	val1=eeprom24lc0xbyteread(eeprom0,0x10);
+	libucprintf("\tdone result = 0x%X\n\r",val1);
+	libucprintf("Reading @ 0x39 ...");
+	val2=eeprom24lc0xbyteread(eeprom0,0x39);
+	libucprintf("\tdone result = 0x%X\n\r",val2);
+	
+	
+	libucprintf("Writing folowing table @ 0x00");
+	libucprintchartable(table1,tableSize,"0x%X"," ");
+	libucprintf("...");
+	eeprom24lc0xwriten(eeprom0,0,table1, tableSize);
+	libucprintf("\tdone\n\r");
+	libucprintf("Reading table @ 0x00 ...");
+	eeprom24lc0xreadn(eeprom0,0,table2, tableSize);
+	libucprintf("\tdone\n\r");
+	libucprintf("result = ");
+	libucprintchartable(table2,tableSize,"0x%X"," ");
+	libucprintf("\n\r");
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/examples/lpc17XX/lpc1768_led_blink/Makefile b/examples/lpc17XX/lpc1768_led_blink/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_led_blink/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_led_blink
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=mbed
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_led_blink/lpc1768_led_blink.pro b/examples/lpc17XX/lpc1768_led_blink/lpc1768_led_blink.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_led_blink/lpc1768_led_blink.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_led_blink
+BSP = mbed
+
+LIBS += UART
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/lpc1768_led_blink/main.c b/examples/lpc17XX/lpc1768_led_blink/main.c
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_led_blink/main.c
@@ -0,0 +1,32 @@
+/* THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */
+
+#include "LPC17xx.h"
+
+volatile uint32_t temp;
+
+void _delay(uint32_t del);
+
+int main (void) 
+{
+	LPC_SC->PCONP |= ( 1 << 15 ); // power up GPIO
+	LPC_GPIO1->FIODIR |= (1<<18); // puts P1.29 into output mode.
+	while(1)
+	{
+		LPC_GPIO1->FIOPIN |= (1<<18); // make P1.29 high
+		_delay( 1 << 24 );
+		LPC_GPIO1->FIOPIN &= ~(1<<18); // make P1.29 low
+		_delay( 1 << 24 );
+	}
+	return 0;
+  
+}
+void _delay(uint32_t del)
+{
+	uint32_t i;
+	for(i=0;i<del;i++)
+		temp = i;
+}
diff --git a/examples/lpc17XX/lpc1768_led_blink_Clk_api/Makefile b/examples/lpc17XX/lpc1768_led_blink_Clk_api/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_led_blink_Clk_api/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_led_blink
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=mbed
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_led_blink_Clk_api/lpc1768_led_blink.pro b/examples/lpc17XX/lpc1768_led_blink_Clk_api/lpc1768_led_blink.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_led_blink_Clk_api/lpc1768_led_blink.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_led_blink
+BSP = mbed
+
+LIBS += UART CORE
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/lpc1768_led_blink_Clk_api/main.c b/examples/lpc17XX/lpc1768_led_blink_Clk_api/main.c
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_led_blink_Clk_api/main.c
@@ -0,0 +1,63 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+
+volatile uint32_t temp;
+
+void _delay(uint32_t del);
+
+int main (void) 
+{
+	int cpufreq=100000000;
+	bsp_init();
+	while(1)
+	{
+		if(cpufreq<1000000)
+			cpufreq=100000000;
+		else 
+		{
+			if(cpufreq<30*1000*1000)
+				cpufreq-=20000;
+			else
+				cpufreq-=200000;
+		}
+		coresetCpuFreq(cpufreq);
+		 LED1_ON;
+		__delay( 1 << 14 );
+		 LED1_OFF;
+		__delay( 1 << 14 );
+	}
+	return 0;
+  
+}
+
+
+void _delay(uint32_t del)
+{
+	uint32_t i;
+	for(i=0;i<del;i++)
+		temp = i;
+}
diff --git a/examples/lpc17XX/lpc1768_ssp_LandTiger/Makefile b/examples/lpc17XX/lpc1768_ssp_LandTiger/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_ssp_LandTiger/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_ssp
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_24LC0X_CMD) $(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_IIC_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_24LC0X_CMD) $(LIBUC_LIBS_24LC0X) $(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=LandTiger
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_ssp_LandTiger/lpc1768_ssp.pro b/examples/lpc17XX/lpc1768_ssp_LandTiger/lpc1768_ssp.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_ssp_LandTiger/lpc1768_ssp.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_ssp
+BSP = LandTiger
+
+LIBS += 24LC0X UART SSP IIC CORE UCSTRINGS
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/lpc1768_ssp_LandTiger/main.c b/examples/lpc17XX/lpc1768_ssp_LandTiger/main.c
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_ssp_LandTiger/main.c
@@ -0,0 +1,68 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#include "uart.h"
+#include "libucstrings.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+
+
+int main (void) 
+{
+	bsp_init();
+	uartsetbaudrate(UART0,38400);
+	int i = 0;
+	currentCpuFreq=coregetCpuFreq();
+	libucprintf("Current CPU Freq =  %dHz \n\r",currentCpuFreq);
+	libucprintf("Current SSP0 PCLK Freq =  %dHz \n\r",currentCpuFreq/sspgetpclkfactor(SSP0));
+	while(1)
+	{
+		LED1_OFF;
+		LED2_ON;
+		LED3_OFF;
+		LED4_ON;
+		LED5_OFF;
+		LED6_ON;
+		LED7_OFF;
+		LED8_ON;
+		//uartputs(UART2,"Hello World\n\r");
+		libucprintf("test %d \n\r",i++);
+		__delay(1024*1024);
+		sspputw(SSP0,0xA5);		
+		LED1_ON;
+		LED2_OFF;
+		LED3_ON;
+		LED4_OFF;
+		LED5_ON;
+		LED6_OFF;
+		LED7_ON;
+		LED8_OFF;
+		//uartputs(UART0,"Hello World\n\r");
+		libucprintf("test %d \n\r",i++);
+		__delay(1024*1024);
+	}
+	return 0;
+  
+}
+
diff --git a/examples/lpc17XX/lpc1768_uart/Makefile b/examples/lpc17XX/lpc1768_uart/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_uart/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_uart
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=mbed
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_uart/lpc1768_uart.pro b/examples/lpc17XX/lpc1768_uart/lpc1768_uart.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_uart/lpc1768_uart.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_uart
+BSP = mbed
+
+LIBS += UART CORE UCSTRINGS
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/lpc1768_uart/main.c b/examples/lpc17XX/lpc1768_uart/main.c
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_uart/main.c
@@ -0,0 +1,49 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#include "uart.h"
+#include "libucstrings.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+
+
+int main (void) 
+{
+	bsp_init();
+	uartsetbaudrate(UART3,115200);
+	int i = 0;
+	while(1)
+	{
+		LED1_ON;
+		uartputs(UART3,"Hello World\n\r");
+		__delay(1024*1024);
+		LED1_OFF;
+		//uartputs(UART1,"Hello World\n\r");
+		libucprintf("test %d \n\r",i++);
+		__delay(1024*1024);
+	}
+	return 0;
+  
+}
+
diff --git a/examples/lpc17XX/lpc1768_uart_LandTiger/Makefile b/examples/lpc17XX/lpc1768_uart_LandTiger/Makefile
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_uart_LandTiger/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERS +=
+APPSOURCES += main.c
+OBJECTFILES = $(APPSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lpc1768_uart
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_UART_CMD) $(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_UART_CMD) $(LIBUC_LIBS_UART) $(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=
+HEADERSINSTALLPATH=
+BSP=LandTiger
+include $(ARCHFOLDER)/rules.mk
+
+all:bin
+	@echo Code compiled
+
diff --git a/examples/lpc17XX/lpc1768_uart_LandTiger/lpc1768_uart.pro b/examples/lpc17XX/lpc1768_uart_LandTiger/lpc1768_uart.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_uart_LandTiger/lpc1768_uart.pro
@@ -0,0 +1,12 @@
+TEMPLATE = app
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = lpc1768_uart
+BSP = LandTiger
+
+LIBS += UART CORE UCSTRINGS
+
+SOURCES += main.c
+
+
+HEADERS +=
+
diff --git a/examples/lpc17XX/lpc1768_uart_LandTiger/main.c b/examples/lpc17XX/lpc1768_uart_LandTiger/main.c
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc1768_uart_LandTiger/main.c
@@ -0,0 +1,64 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "LPC17xx.h"
+#include "bsp.h"
+#include "core.h"
+#include "uart.h"
+#include "libucstrings.h"
+#define __delay(t) for(volatile int i=0;i<t;i++);
+
+
+int main (void) 
+{
+	bsp_init();
+	uartsetbaudrate(UART0,38400);
+	int i = 0;
+	while(1)
+	{
+		LED1_OFF;
+		LED2_ON;
+		LED3_OFF;
+		LED4_ON;
+		LED5_OFF;
+		LED6_ON;
+		LED7_OFF;
+		LED8_ON;
+		//uartputs(UART2,"Hello World\n\r");
+		libucprintf("test %d \n\r",i++);
+		__delay(1024*1024);		
+		LED1_ON;
+		LED2_OFF;
+		LED3_ON;
+		LED4_OFF;
+		LED5_ON;
+		LED6_OFF;
+		LED7_ON;
+		LED8_OFF;
+		//uartputs(UART0,"Hello World\n\r");
+		libucprintf("test %d \n\r",i++);
+		__delay(1024*1024);
+	}
+	return 0;
+  
+}
+
diff --git a/examples/lpc17XX/lpc17XXexamples.pro b/examples/lpc17XX/lpc17XXexamples.pro
new file mode 100644
--- /dev/null
+++ b/examples/lpc17XX/lpc17XXexamples.pro
@@ -0,0 +1,8 @@
+TEMPLATE = dir
+SUBDIRS += lpc1768_iic_LandTiger \
+		lpc1768_led_blink \
+		lpc1768_led_blink_Clk_api \
+		lpc1768_ssp_LandTiger \
+		lpc1768_uart \
+		lpc1768_uart_LandTiger 
+		
diff --git a/lib/includes/lpc17XX/24LCXX/24LC0X/24LC0X.h b/lib/includes/lpc17XX/24LCXX/24LC0X/24LC0X.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc17XX/24LCXX/24LC0X/24LC0X.h
@@ -0,0 +1,56 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef B24LC0X_H
+#define B24LC0X_H
+
+#include "iic.h"
+
+struct eeprom24LC0X_str
+{
+ i2cDev* iicdev;
+ unsigned char devAddress;
+ unsigned char size;
+};
+
+typedef struct eeprom24LC0X_str eeprom24lc0xDev;
+
+
+extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev* iicdev,unsigned char A0_A1_A2_val,unsigned int size);
+
+extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
+extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
+extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data);
+extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address);
+extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
+extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
+
+
+
+
+#endif
+
+
+
+
+
+
+
diff --git a/lib/includes/lpc17XX/BLKDEVICE/blkdevice.h b/lib/includes/lpc17XX/BLKDEVICE/blkdevice.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc17XX/BLKDEVICE/blkdevice.h
@@ -0,0 +1,127 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef BLKDEVICE_H
+#define BLKDEVICE_H
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT              0x01    /* Drive not initialized */
+#define STA_NODISK              0x02    /* No medium in the drive */
+#define STA_PROTECT             0x04    /* Write protected */
+
+
+/* Command code for disk_ioctrl fucntion */
+/* Generic ioctl command (defined for FatFs) */
+#define CTRL_SYNC			0	/* Flush disk cache (for write functions) */
+#define GET_SECTOR_COUNT	1	/* Get media size (for only f_mkfs()) */
+#define GET_SECTOR_SIZE		2	/* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
+#define GET_BLOCK_SIZE		3	/* Get erase block size (for only f_mkfs()) */
+#define CTRL_ERASE_SECTOR	4	/* Force erased a block of sectors (for only _USE_ERASE) */
+
+/* Generic ioctl command */
+#define CTRL_POWER			5	/* Get/Set power status */
+#define CTRL_LOCK			6	/* Lock/Unlock media removal */
+#define CTRL_EJECT			7	/* Eject media */
+
+/* MMC/SDC specific ioctl command */
+#define MMC_GET_TYPE		10	/* Get card type */
+#define MMC_GET_CSD			11	/* Get CSD */
+#define MMC_GET_CID			12	/* Get CID */
+#define MMC_GET_OCR			13	/* Get OCR */
+#define MMC_GET_SDSTAT		14	/* Get SD status */
+
+/* ATA/CF specific ioctl command */
+#define ATA_GET_REV			20	/* Get F/W revision */
+#define ATA_GET_MODEL		21	/* Get model name */
+#define ATA_GET_SN			22	/* Get serial number */
+
+/* NAND specific ioctl command */
+#define NAND_FORMAT			30	/* Create physical format */
+
+/* Status of Disk Functions */
+typedef unsigned char DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+typedef volatile struct blkdevice_str blkdevice;
+
+typedef void (*blkdevselect_t)(char);
+typedef void (*blkdevpower_t)(char) ;
+typedef char (*blkdevdetect_t)() ;
+typedef char (*blkdevwriteprotected_t)() ;
+typedef DRESULT (*blkdevwrite_t)(blkdevice* _this,char drv,const char *buff,unsigned long sector,char count) ;
+typedef DRESULT (*blkdevread_t)(blkdevice* _this,char drv,char *buff,unsigned long sector,char count) ;
+typedef DRESULT (*blkdevioctl_t)(blkdevice* _this,char drv,char ctrl,void *buff) ;
+typedef DSTATUS (*blkdevinitialize_t)(blkdevice* _this,char drv) ;
+typedef DSTATUS (*blkdevstatus_t) (blkdevice* _this,char drv) ;
+
+struct blkdevice_str
+{
+	void* phy;
+	unsigned int size;
+	unsigned int MaxSpeed;
+	unsigned char Version;
+	blkdevselect_t select;
+	blkdevpower_t power;
+	blkdevdetect_t detect;
+	blkdevwriteprotected_t writeprotected;
+	blkdevwrite_t write;
+	blkdevread_t read;
+	blkdevioctl_t ioctl;
+	blkdevinitialize_t initialize;
+	blkdevstatus_t status;
+};
+
+
+
+
+
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/includes/lpc17XX/SDCARD/sdcard.h b/lib/includes/lpc17XX/SDCARD/sdcard.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc17XX/SDCARD/sdcard.h
@@ -0,0 +1,116 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef SDCARD_H
+#define SDCARD_H
+#include "blkdevice.h"
+#include <libucstrings.h>
+
+/* MMC/SD command */
+#define CMD0	(0)			/* GO_IDLE_STATE */
+#define CMD1	(1)			/* SEND_OP_COND (MMC) */
+#define	ACMD41	(0x80+41)	/* SEND_OP_COND (SDC) */
+#define CMD8	(8)			/* SEND_IF_COND */
+#define CMD9	(9)			/* SEND_CSD */
+#define CMD10	(10)		/* SEND_CID */
+#define CMD12	(12)		/* STOP_TRANSMISSION */
+#define ACMD13	(0x80+13)	/* SD_STATUS (SDC) */
+#define CMD16	(16)		/* SET_BLOCKLEN */
+#define CMD17	(17)		/* READ_SINGLE_BLOCK */
+#define CMD18	(18)		/* READ_MULTIPLE_BLOCK */
+#define CMD23	(23)		/* SET_BLOCK_COUNT (MMC) */
+#define	ACMD23	(0x80+23)	/* SET_WR_BLK_ERASE_COUNT (SDC) */
+#define CMD24	(24)		/* WRITE_BLOCK */
+#define CMD25	(25)		/* WRITE_MULTIPLE_BLOCK */
+#define CMD32	(32)		/* ERASE_ER_BLK_START */
+#define CMD33	(33)		/* ERASE_ER_BLK_END */
+#define CMD38	(38)		/* ERASE */
+#define CMD55	(55)		/* APP_CMD */
+#define CMD58	(58)		/* READ_OCR */
+
+/* Card type flags (CardType) */
+#define CT_MMC		0x01		/* MMC ver 3 */
+#define CT_SD1		0x02		/* SD ver 1 */
+#define CT_SD2		0x04		/* SD ver 2 */
+#define CT_SDC		(CT_SD1|CT_SD2)	/* SD */
+#define CT_BLOCK	0x08		/* Block addressing */
+
+struct sdcard_str
+{
+	void* phy;
+	void (*rcvr_mmc) (void* phy,char *buff,unsigned int bc);
+	void (*xmit_mmc) (void* phy,const char *buff,unsigned int bc);
+	void (*setspeed) (void* phy,unsigned int speed);
+	DSTATUS Stat;
+	char CardType;	
+};
+
+typedef volatile struct sdcard_str sdcardDev;
+
+extern void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed));
+extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected);
+
+extern int sdcardselect (blkdevice* _this);
+extern void sdcarddeselect (blkdevice* _this);
+extern int sdcardwait_ready (sdcardDev* sdcard);
+extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token);
+extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr);
+extern char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg);
+
+extern DSTATUS sdcarddisk_status (blkdevice* _this,char drv);
+extern DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv);
+extern DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count);
+extern DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count);
+extern DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff);
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/includes/lpc17XX/SSP/ssp.h b/lib/includes/lpc17XX/SSP/ssp.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc17XX/SSP/ssp.h
@@ -0,0 +1,96 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "LPC17xx.h"
+#ifndef SSP_H
+#define SSP_H
+
+#define l4bits ((1<<1)+(1))               //0011 4 bit transfer
+#define l5bits ((1<<2))                   //0100 5 bit transfer
+#define l6bits ((1<<2)+(1))               //0101 6 bit transfer
+#define l7bits ((1<<1)+(1<<1))            //0110 7 bit transfer
+#define l8bits ((1<<2)+(1<<1)+(1))        //0111 8 bit transfer
+#define l9bits ((1<<3))                   //1000 9 bit transfer
+#define l10bits ((1<<3)+(1))               //1001 10 bit transfer
+#define l11bits ((1<<3)+(1<<1))            //1010 11 bit transfer
+#define l12bits ((1<<3)+(1<<1)+1)          //1011 12 bit transfer
+#define l13bits ((1<<3)+(1<<2))            //1100 13 bit transfer
+#define l14bits ((1<<3)+(1<<2)+1)          //1101 14 bit transfer
+#define l15bits ((1<<3)+(1<<2)+(1<<1))     //1110 15 bit transfer
+#define l16bits ((1<<3)+(1<<2)+(1<<1)+1)   //1111 16 bit transfer
+
+#define FFSPI  0
+#define FFTI (1<<4)
+#define FFMICROWIRE (1<<5)
+
+#define CLKINHLOW 0
+#define CLKINHHIGH (1<<6)
+
+#define CKfirstEdge 0
+#define CKsecondEdge (1<<7)
+
+
+
+#define loopbackOFF 0
+#define loopbackON 1
+
+#define MASTERMODE 0
+#define SLAVEMODE (1<<2)
+
+#define SLAVEOUTPUTDISABLEMODE (1<<3)
+
+#define sspisslave(dev)  ((((dev)->SSPCtrlReg1>>2) & 1)==1)
+
+struct sspRegs
+{
+ unsigned long SSPCtrlReg0; 
+ unsigned long SSPCtrlReg1;
+ unsigned long SSPDataReg;
+ unsigned long SSPStatReg; 
+ unsigned long SSPClkPrescReg;
+ unsigned long SSPIntMaskReg;
+ unsigned long SSPRawIntStatReg;
+ unsigned long SSPMaskedIntStatReg;
+ unsigned long SSPIntClearReg;
+ unsigned long SSPDMACtrlReg;
+};
+
+typedef volatile struct sspRegs sspDev;
+
+extern sspDev* sspopen(int count);
+extern void sspputc(sspDev* dev,char c);
+extern void sspputnc(sspDev* dev,const char *c,unsigned int n);
+extern void sspputw(sspDev* dev,int c);
+extern void sspputs(sspDev* dev,char *s);
+extern void sspgets(sspDev* dev,char *s);
+extern char sspgetc(sspDev* dev);
+extern void sspgetnc(sspDev* dev,char *c,unsigned int n);
+extern int  sspgetw(sspDev* dev);
+extern void enableSSP(sspDev* dev);
+extern void disableSSP(sspDev* dev);
+extern void sspsetup(sspDev* dev,unsigned char bitscount,int sspCtrlRegValue0,int sspCtrlRegValue1, unsigned int  dataRate);
+extern void sspsetupTRsize(sspDev* dev,unsigned char value);
+extern unsigned char sspgetpclkfactor(sspDev* dev);
+extern void sspsetpclkfactor(sspDev* dev,unsigned char pclkfactor);
+extern void sspsetdatarate(sspDev* dev,unsigned int  dataRate);
+
+#endif
+
diff --git a/lib/includes/lpc17XX/VS10XX/vs1053.h b/lib/includes/lpc17XX/VS10XX/vs1053.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc17XX/VS10XX/vs1053.h
@@ -0,0 +1,58 @@
+#/*------------------------------------------------------------------------------
+#--  This file is a part of the libuc, microcontroler library
+#--  Copyright (C) 2011, Alexis Jeandet
+#--
+#--  This program is free software; you can redistribute it and/or modify
+#--  it under the terms of the GNU General Public License as published by
+#--  the Free Software Foundation; either version 3 of the License, or
+#--  (at your option) any later version.
+#--
+#--  This program is distributed in the hope that it will be useful,
+#--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#--  GNU General Public License for more details.
+#--
+#--  You should have received a copy of the GNU General Public License
+#--  along with this program; if not, write to the Free Software
+#--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+#-------------------------------------------------------------------------------
+#--                 Author : Alexis Jeandet
+#--                   Mail : alexis.jeandet@gmail.com
+#-------------------------------------------------------------------------------*/
+
+
+#define VSMODE        0 
+#define VSSTATUS      1
+#define VSBASS        2
+#define VSCLOCKF      3
+#define VSDECODE_TIME 4
+#define VSAUDATA      5
+#define VSWRAM        6
+#define VSWRAMADDR    7
+#define VSHDAT0       8
+#define VSHDAT1       9
+#define VSAIADDR      0xA
+#define VSVOL         0xB
+#define VSAICTRL0     0xC
+#define VSAICTRL1     0xD
+#define VSAICTRL2     0xE
+#define VSAICTRL3     0xF
+
+struct vs1053Regs
+{
+ sspDev* SSP_device;
+ int a;
+};
+
+typedef struct vs1053Regs vs1053Dev;
+
+void vs1053open(vs1053Dev* codec,sspDev* dev);
+void vs1053softreset(vs1053Dev* dev);
+int vs1053cmdread(vs1053Dev* dev,char address);
+void vs1053cmdwrite(vs1053Dev* dev,char address,int value);
+
+extern void vs10XXclearXCS();
+extern void vs10XXsetXCS();
+extern int vs10XXDREQ();
+
+
diff --git a/lib/includes/lpc21XX/BLKDEVICE/blkdevice.h b/lib/includes/lpc21XX/BLKDEVICE/blkdevice.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc21XX/BLKDEVICE/blkdevice.h
@@ -0,0 +1,127 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef BLKDEVICE_H
+#define BLKDEVICE_H
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT              0x01    /* Drive not initialized */
+#define STA_NODISK              0x02    /* No medium in the drive */
+#define STA_PROTECT             0x04    /* Write protected */
+
+
+/* Command code for disk_ioctrl fucntion */
+/* Generic ioctl command (defined for FatFs) */
+#define CTRL_SYNC			0	/* Flush disk cache (for write functions) */
+#define GET_SECTOR_COUNT	1	/* Get media size (for only f_mkfs()) */
+#define GET_SECTOR_SIZE		2	/* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
+#define GET_BLOCK_SIZE		3	/* Get erase block size (for only f_mkfs()) */
+#define CTRL_ERASE_SECTOR	4	/* Force erased a block of sectors (for only _USE_ERASE) */
+
+/* Generic ioctl command */
+#define CTRL_POWER			5	/* Get/Set power status */
+#define CTRL_LOCK			6	/* Lock/Unlock media removal */
+#define CTRL_EJECT			7	/* Eject media */
+
+/* MMC/SDC specific ioctl command */
+#define MMC_GET_TYPE		10	/* Get card type */
+#define MMC_GET_CSD			11	/* Get CSD */
+#define MMC_GET_CID			12	/* Get CID */
+#define MMC_GET_OCR			13	/* Get OCR */
+#define MMC_GET_SDSTAT		14	/* Get SD status */
+
+/* ATA/CF specific ioctl command */
+#define ATA_GET_REV			20	/* Get F/W revision */
+#define ATA_GET_MODEL		21	/* Get model name */
+#define ATA_GET_SN			22	/* Get serial number */
+
+/* NAND specific ioctl command */
+#define NAND_FORMAT			30	/* Create physical format */
+
+/* Status of Disk Functions */
+typedef unsigned char DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+typedef volatile struct blkdevice_str blkdevice;
+
+typedef void (*blkdevselect_t)(char);
+typedef void (*blkdevpower_t)(char) ;
+typedef char (*blkdevdetect_t)() ;
+typedef char (*blkdevwriteprotected_t)() ;
+typedef DRESULT (*blkdevwrite_t)(blkdevice* _this,char drv,const char *buff,unsigned long sector,char count) ;
+typedef DRESULT (*blkdevread_t)(blkdevice* _this,char drv,char *buff,unsigned long sector,char count) ;
+typedef DRESULT (*blkdevioctl_t)(blkdevice* _this,char drv,char ctrl,void *buff) ;
+typedef DSTATUS (*blkdevinitialize_t)(blkdevice* _this,char drv) ;
+typedef DSTATUS (*blkdevstatus_t) (blkdevice* _this,char drv) ;
+
+struct blkdevice_str
+{
+	void* phy;
+	unsigned int size;
+	unsigned int MaxSpeed;
+	unsigned char Version;
+	blkdevselect_t select;
+	blkdevpower_t power;
+	blkdevdetect_t detect;
+	blkdevwriteprotected_t writeprotected;
+	blkdevwrite_t write;
+	blkdevread_t read;
+	blkdevioctl_t ioctl;
+	blkdevinitialize_t initialize;
+	blkdevstatus_t status;
+};
+
+
+
+
+
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/includes/lpc21XX/CORE/core.h b/lib/includes/lpc21XX/CORE/core.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc21XX/CORE/core.h
@@ -0,0 +1,48 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "LPC23xx.h"
+
+
+#define pll0useInternal 0
+#define pll0useMainOsc 1
+#define pll0useRTC 2
+
+
+#define pll0setClksrc(src) if((unsigned int)(src)<3) CLKSRCSEL=(src)
+#define pll0getClksrc (CLKSRCSEL & 3)
+
+
+extern void coresetCpuFreq(unsigned int freq);
+extern unsigned int coregetCpuFreq();
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/includes/lpc21XX/SDCARD/sdcard.h b/lib/includes/lpc21XX/SDCARD/sdcard.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc21XX/SDCARD/sdcard.h
@@ -0,0 +1,116 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef SDCARD_H
+#define SDCARD_H
+#include "blkdevice.h"
+#include <libucstrings.h>
+
+/* MMC/SD command */
+#define CMD0	(0)			/* GO_IDLE_STATE */
+#define CMD1	(1)			/* SEND_OP_COND (MMC) */
+#define	ACMD41	(0x80+41)	/* SEND_OP_COND (SDC) */
+#define CMD8	(8)			/* SEND_IF_COND */
+#define CMD9	(9)			/* SEND_CSD */
+#define CMD10	(10)		/* SEND_CID */
+#define CMD12	(12)		/* STOP_TRANSMISSION */
+#define ACMD13	(0x80+13)	/* SD_STATUS (SDC) */
+#define CMD16	(16)		/* SET_BLOCKLEN */
+#define CMD17	(17)		/* READ_SINGLE_BLOCK */
+#define CMD18	(18)		/* READ_MULTIPLE_BLOCK */
+#define CMD23	(23)		/* SET_BLOCK_COUNT (MMC) */
+#define	ACMD23	(0x80+23)	/* SET_WR_BLK_ERASE_COUNT (SDC) */
+#define CMD24	(24)		/* WRITE_BLOCK */
+#define CMD25	(25)		/* WRITE_MULTIPLE_BLOCK */
+#define CMD32	(32)		/* ERASE_ER_BLK_START */
+#define CMD33	(33)		/* ERASE_ER_BLK_END */
+#define CMD38	(38)		/* ERASE */
+#define CMD55	(55)		/* APP_CMD */
+#define CMD58	(58)		/* READ_OCR */
+
+/* Card type flags (CardType) */
+#define CT_MMC		0x01		/* MMC ver 3 */
+#define CT_SD1		0x02		/* SD ver 1 */
+#define CT_SD2		0x04		/* SD ver 2 */
+#define CT_SDC		(CT_SD1|CT_SD2)	/* SD */
+#define CT_BLOCK	0x08		/* Block addressing */
+
+struct sdcard_str
+{
+	void* phy;
+	void (*rcvr_mmc) (void* phy,char *buff,unsigned int bc);
+	void (*xmit_mmc) (void* phy,const char *buff,unsigned int bc);
+	void (*setspeed) (void* phy,unsigned int speed);
+	DSTATUS Stat;
+	char CardType;	
+};
+
+typedef volatile struct sdcard_str sdcardDev;
+
+extern void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed));
+extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected);
+
+extern int sdcardselect (blkdevice* _this);
+extern void sdcarddeselect (blkdevice* _this);
+extern int sdcardwait_ready (sdcardDev* sdcard);
+extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token);
+extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr);
+extern char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg);
+
+extern DSTATUS sdcarddisk_status (blkdevice* _this,char drv);
+extern DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv);
+extern DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count);
+extern DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count);
+extern DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff);
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/includes/lpc21XX/STRINGS/lpc21XX-arm-noabi-gcc/libucstrings.h b/lib/includes/lpc21XX/STRINGS/lpc21XX-arm-noabi-gcc/libucstrings.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc21XX/STRINGS/lpc21XX-arm-noabi-gcc/libucstrings.h
@@ -0,0 +1,29 @@
+#/*------------------------------------------------------------------------------
+#--  This file is a part of the libuc, microcontroler library
+#--  Copyright (C) 2011, Alexis Jeandet
+#--
+#--  This program is free software; you can redistribute it and/or modify
+#--  it under the terms of the GNU General Public License as published by
+#--  the Free Software Foundation; either version 3 of the License, or
+#--  (at your option) any later version.
+#--
+#--  This program is distributed in the hope that it will be useful,
+#--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#--  GNU General Public License for more details.
+#--
+#--  You should have received a copy of the GNU General Public License
+#--  along with this program; if not, write to the Free Software
+#--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+#-------------------------------------------------------------------------------
+#--                 Author : Alexis Jeandet
+#--                   Mail : alexis.jeandet@gmail.com
+#-------------------------------------------------------------------------------*/
+
+
+
+void clearstr(char* a);
+void int2hex(unsigned long a,char*b);
+int libucprintf(const char*,...);
+int libucscanf(const char*,...);
+void libucprintchartable(char* table,int size,const char* format,const char* separator);
diff --git a/lib/includes/lpc21XX/UART/uart.h b/lib/includes/lpc21XX/UART/uart.h
new file mode 100644
--- /dev/null
+++ b/lib/includes/lpc21XX/UART/uart.h
@@ -0,0 +1,66 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef UART_H
+#define UART_H
+#include "LPC23xx.h"
+
+
+#define uartNoParity 0
+#define uartOddParity 1
+#define uartEvenParity 3
+#define uartTrueParity 5
+#define uartFalseParity 7
+
+struct uartRegs
+{
+ unsigned long RWreg;
+ unsigned long IntEN;
+ unsigned long IntIdFIFOctrlr;
+ unsigned long LineCtrl;
+ unsigned long dummy;
+ unsigned long LineStat;
+ unsigned long ScratchPad;
+};
+
+typedef volatile struct uartRegs uartDev;
+
+extern uartDev* uartopen(int count);
+extern void uarton(int count);
+extern void uartoff(int count);
+extern void uartputc(uartDev* dev,char c);
+extern void uartputs(uartDev* dev,char *s);
+extern void uartgets(uartDev* dev,char *s);
+extern char uartgetc(uartDev* dev);
+extern void uartsetbaudrate(uartDev* dev,unsigned int  baudRate);
+extern unsigned char uartgetpclkfactor(uartDev* dev);
+extern void uartsetpclkfactor(uartDev* dev,unsigned char pclkfactor);
+extern void uartsetup(uartDev* dev,unsigned int  baudRate,unsigned char WordLength,unsigned char StopBitCnt,unsigned char Parity);
+
+#endif
+
+
+
+
+
+
+
+
diff --git a/lib/src/common/24LCXX/24LC0X/24LC0X.c b/lib/src/common/24LCXX/24LC0X/24LC0X.c
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/24LC0X/24LC0X.c
@@ -0,0 +1,102 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "24LC0X.h"
+#include "iic.h"
+#include "core.h"
+/*
+struct 24LC0X_str
+{
+ i2cDev* iicdev;
+ unsigned char devAddress;
+ unsigned char size;
+};
+*/
+
+
+void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev* iicdev,unsigned char A0_A1_A2_val,unsigned int size)
+{
+	dev->iicdev = iicdev;
+	dev->devAddress = 0x50 | (A0_A1_A2_val & 0x7);
+	if(size == 2048) dev->size = 2;
+	if(size == 1024) dev->size = 1;
+}
+
+void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page)
+{
+	int cmdcnt=1,datacnt=8;
+	i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,page,&datacnt);
+}
+
+
+void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page)
+{
+	int cmdcnt=1,datacnt=8;
+	i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt);
+	i2cread(dev.iicdev,dev.devAddress,page,&datacnt);
+}
+
+void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data)
+{
+	int cmdcnt=1,datacnt=1;
+	i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,&data,&datacnt);
+}
+
+
+unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address)
+{
+	int cmdcnt=1,datacnt=1;
+	unsigned char data = 0;
+	i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt);
+	i2cread(dev.iicdev,dev.devAddress,&data,&datacnt);
+	return data;
+}
+
+
+void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count)
+{
+	int cmdcnt=1,datacnt=count;
+	i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt);
+	i2cread(dev.iicdev,dev.devAddress,data,&datacnt);
+	
+}
+
+void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count)
+{
+	int cmdcnt=1,datacnt=8;
+	while(count >8)
+	{
+		cmdcnt=1;datacnt=8;
+		while(i2noerr!=i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,data,&datacnt)){cmdcnt=1;datacnt=8;}
+		count-=8;
+		address+=8;
+		data+=8;
+	}
+	cmdcnt=1;datacnt=count;
+	while(i2noerr!=i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,data,&datacnt)){cmdcnt=1;datacnt=count;}
+}
+
+
+
+
+
+
+
diff --git a/lib/src/common/24LCXX/24LC0X/24LC0X.h b/lib/src/common/24LCXX/24LC0X/24LC0X.h
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/24LC0X/24LC0X.h
@@ -0,0 +1,56 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef B24LC0X_H
+#define B24LC0X_H
+
+#include "iic.h"
+
+struct eeprom24LC0X_str
+{
+ i2cDev* iicdev;
+ unsigned char devAddress;
+ unsigned char size;
+};
+
+typedef struct eeprom24LC0X_str eeprom24lc0xDev;
+
+
+extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev* iicdev,unsigned char A0_A1_A2_val,unsigned int size);
+
+extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
+extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page);
+extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data);
+extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address);
+extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
+extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count);
+
+
+
+
+#endif
+
+
+
+
+
+
+
diff --git a/lib/src/common/24LCXX/24LC0X/24LC0X.pro b/lib/src/common/24LCXX/24LC0X/24LC0X.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/24LC0X/24LC0X.pro
@@ -0,0 +1,13 @@
+TEMPLATE = lib
+
+lpc17XX.ARCH = lpc17XX-arm-noabi-gcc
+lpc17XX.TARGET = lib24lc0X
+lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_24LC0X)
+lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_24LC0X)
+
+lpc17XX.LIBS += CORE IIC
+
+lpc17XX.SOURCES += 24LC0X.c
+
+
+lpc17XX.HEADERS += 24LC0X.h
diff --git a/lib/src/common/24LCXX/24LC0X/Makefile b/lib/src/common/24LCXX/24LC0X/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/24LC0X/Makefile
@@ -0,0 +1,6 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+all:
+	make -f lpc17XX.mk
diff --git a/lib/src/common/24LCXX/24LC0X/lpc17XX.mk b/lib/src/common/24LCXX/24LC0X/lpc17XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/24LC0X/lpc17XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_24LC0X)
+HEADERS += 24LC0X.h
+LIBSOURCES += 24LC0X.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=lib24lc0X
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_IIC_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_IIC_CMD) $(LIBUC_LIBS_IIC) 
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_24LC0X)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_24LC0X)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/24LCXX/24LCXX.pro b/lib/src/common/24LCXX/24LCXX.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/24LCXX.pro
@@ -0,0 +1,2 @@
+TEMPLATE = dir
+SUBDIRS += 24LC0X
diff --git a/lib/src/common/24LCXX/Makefile b/lib/src/common/24LCXX/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/common/24LCXX/Makefile
@@ -0,0 +1,13 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+include $(LIBUC)/rules/common/rules.mk
+
+all:subdir
+	make -C 24LC0X
+	@echo Code compiled
+
+clean:
+	make clean -C  24LC0X
+	@echo Code compiled
+
diff --git a/lib/src/common/BLOCKDEVICES/Makefile b/lib/src/common/BLOCKDEVICES/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/common/BLOCKDEVICES/Makefile
@@ -0,0 +1,7 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+all:
+	make -f lpc17XX.mk
+	make -f lpc21XX.mk
diff --git a/lib/src/common/BLOCKDEVICES/blkdevice.c b/lib/src/common/BLOCKDEVICES/blkdevice.c
new file mode 100644
--- /dev/null
+++ b/lib/src/common/BLOCKDEVICES/blkdevice.c
@@ -0,0 +1,23 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+
+#include "blkdevice.h"
diff --git a/lib/src/common/BLOCKDEVICES/blkdevice.h b/lib/src/common/BLOCKDEVICES/blkdevice.h
new file mode 100644
--- /dev/null
+++ b/lib/src/common/BLOCKDEVICES/blkdevice.h
@@ -0,0 +1,127 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef BLKDEVICE_H
+#define BLKDEVICE_H
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT              0x01    /* Drive not initialized */
+#define STA_NODISK              0x02    /* No medium in the drive */
+#define STA_PROTECT             0x04    /* Write protected */
+
+
+/* Command code for disk_ioctrl fucntion */
+/* Generic ioctl command (defined for FatFs) */
+#define CTRL_SYNC			0	/* Flush disk cache (for write functions) */
+#define GET_SECTOR_COUNT	1	/* Get media size (for only f_mkfs()) */
+#define GET_SECTOR_SIZE		2	/* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
+#define GET_BLOCK_SIZE		3	/* Get erase block size (for only f_mkfs()) */
+#define CTRL_ERASE_SECTOR	4	/* Force erased a block of sectors (for only _USE_ERASE) */
+
+/* Generic ioctl command */
+#define CTRL_POWER			5	/* Get/Set power status */
+#define CTRL_LOCK			6	/* Lock/Unlock media removal */
+#define CTRL_EJECT			7	/* Eject media */
+
+/* MMC/SDC specific ioctl command */
+#define MMC_GET_TYPE		10	/* Get card type */
+#define MMC_GET_CSD			11	/* Get CSD */
+#define MMC_GET_CID			12	/* Get CID */
+#define MMC_GET_OCR			13	/* Get OCR */
+#define MMC_GET_SDSTAT		14	/* Get SD status */
+
+/* ATA/CF specific ioctl command */
+#define ATA_GET_REV			20	/* Get F/W revision */
+#define ATA_GET_MODEL		21	/* Get model name */
+#define ATA_GET_SN			22	/* Get serial number */
+
+/* NAND specific ioctl command */
+#define NAND_FORMAT			30	/* Create physical format */
+
+/* Status of Disk Functions */
+typedef unsigned char DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+typedef volatile struct blkdevice_str blkdevice;
+
+typedef void (*blkdevselect_t)(char);
+typedef void (*blkdevpower_t)(char) ;
+typedef char (*blkdevdetect_t)() ;
+typedef char (*blkdevwriteprotected_t)() ;
+typedef DRESULT (*blkdevwrite_t)(blkdevice* _this,char drv,const char *buff,unsigned long sector,char count) ;
+typedef DRESULT (*blkdevread_t)(blkdevice* _this,char drv,char *buff,unsigned long sector,char count) ;
+typedef DRESULT (*blkdevioctl_t)(blkdevice* _this,char drv,char ctrl,void *buff) ;
+typedef DSTATUS (*blkdevinitialize_t)(blkdevice* _this,char drv) ;
+typedef DSTATUS (*blkdevstatus_t) (blkdevice* _this,char drv) ;
+
+struct blkdevice_str
+{
+	void* phy;
+	unsigned int size;
+	unsigned int MaxSpeed;
+	unsigned char Version;
+	blkdevselect_t select;
+	blkdevpower_t power;
+	blkdevdetect_t detect;
+	blkdevwriteprotected_t writeprotected;
+	blkdevwrite_t write;
+	blkdevread_t read;
+	blkdevioctl_t ioctl;
+	blkdevinitialize_t initialize;
+	blkdevstatus_t status;
+};
+
+
+
+
+
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/src/common/BLOCKDEVICES/blkdevice.pro b/lib/src/common/BLOCKDEVICES/blkdevice.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/common/BLOCKDEVICES/blkdevice.pro
@@ -0,0 +1,26 @@
+TEMPLATE = lib
+lpc17XX.ARCH = lpc17XX-arm-noabi-gcc
+lpc17XX.TARGET = libblkdevice
+lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_BLKDEVICE) 
+lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE) 
+
+lpc17XX.LIBS +=
+
+lpc17XX.SOURCES += blkdevice.c
+
+
+lpc17XX.HEADERS += blkdevice.h
+
+
+
+lpc21XX.ARCH = lpc21XX-arm-noabi-gcc
+lpc21XX.TARGET = libblkdevice
+lpc21XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_BLKDEVICE) 
+lpc21XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE) 
+
+lpc21XX.LIBS +=
+
+lpc21XX.SOURCES += blkdevice.c
+
+
+lpc21XX.HEADERS += blkdevice.h
diff --git a/lib/src/common/BLOCKDEVICES/lpc17XX.mk b/lib/src/common/BLOCKDEVICES/lpc17XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/BLOCKDEVICES/lpc17XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE) 
+HEADERS += blkdevice.h
+LIBSOURCES += blkdevice.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=libblkdevice
+LIBUC_INCLUDES=
+LIBUC_LIBRARIES=
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_BLKDEVICE)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_BLKDEVICE)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/BLOCKDEVICES/lpc21XX.mk b/lib/src/common/BLOCKDEVICES/lpc21XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/BLOCKDEVICES/lpc21XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_BLKDEVICE) 
+HEADERS += blkdevice.h
+LIBSOURCES += blkdevice.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc21XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
+TARGET=libblkdevice
+LIBUC_INCLUDES=
+LIBUC_LIBRARIES=
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_BLKDEVICE)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_BLKDEVICE)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/Makefile b/lib/src/common/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/common/Makefile
@@ -0,0 +1,21 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+include $(LIBUC)/rules/common/rules.mk
+
+all:subdir
+	make -C 24LCXX
+	make -C STRINGS
+	make -C VS10XX
+	make -C SDCARD
+	make -C BLOCKDEVICES
+	@echo Code compiled
+
+clean:
+	make clean -C  24LCXX
+	make clean -C  STRINGS
+	make clean -C  VS10XX
+	make clean -C  SDCARD
+	make clean -C  BLOCKDEVICES
+	@echo Code compiled
+
diff --git a/lib/src/common/SDCARD/Makefile b/lib/src/common/SDCARD/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/common/SDCARD/Makefile
@@ -0,0 +1,7 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+all:
+	make -f lpc17XX.mk
+	make -f lpc21XX.mk
diff --git a/lib/src/common/SDCARD/lpc17XX.mk b/lib/src/common/SDCARD/lpc17XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/SDCARD/lpc17XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD) 
+HEADERS += sdcard.h
+LIBSOURCES += sdcard.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=libsdcard
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) 
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_SDCARD)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_SDCARD)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/SDCARD/lpc21XX.mk b/lib/src/common/SDCARD/lpc21XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/SDCARD/lpc21XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD) 
+HEADERS += sdcard.h
+LIBSOURCES += sdcard.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc21XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
+TARGET=libsdcard
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) $(LIBUC_INC_DIR_UCSTRINGS_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) $(LIBUC_LIBS_DIR_UCSTRINGS_CMD) $(LIBUC_LIBS_UCSTRINGS) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) $(LIBUC_LIBS_BLKDEVICE) 
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_SDCARD)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_SDCARD)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/SDCARD/sdcard.c b/lib/src/common/SDCARD/sdcard.c
new file mode 100644
--- /dev/null
+++ b/lib/src/common/SDCARD/sdcard.c
@@ -0,0 +1,455 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "sdcard.h"
+static volatile
+unsigned int Timer1, Timer2;	/* 1kHz decrement timer stopped at zero (disk_timerproc()) */
+
+void sdcarddeselect (blkdevice* _this)
+{
+	char d;
+	_this->select(0);
+	((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1);	/* Dummy clock (force DO hi-z for multiple slave SPI) */
+}
+
+int sdcardselect (blkdevice* _this)	/* 1:OK, 0:Timeout */
+{
+	char d;
+	_this->select(1);
+	((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1);	/* Dummy clock (force DO enabled) */
+
+	if (sdcardwait_ready(((sdcardDev*)_this->phy))) return 1;	/* OK */
+	_this->select(0);
+	return 0;	/* Timeout */
+}
+
+int sdcardwait_ready (sdcardDev* sdcard)	/* 1:OK, 0:Timeout */
+{
+	char d;
+	unsigned int tmr;
+	volatile unsigned int i=0;
+
+	for (tmr = 5000; tmr; tmr--) {	/* Wait for ready in timeout of 500ms */
+		sdcard->rcvr_mmc(sdcard->phy,&d, 1);
+		if (d == 0xFF) break;
+		for(i=0;i<1024*128;i++);
+	}
+
+	return tmr ? 1 : 0;
+}
+
+int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr)
+{
+	char d[2];
+	unsigned int tmr;
+	volatile unsigned int i=0;
+	for (tmr = 1000; tmr; tmr--) {	/* Wait for data packet in timeout of 100ms */
+		sdcard->rcvr_mmc(sdcard->phy,d, 1);
+		if (d[0] != 0xFF) break;
+		for(i=0;i<1024*128;i++);
+	}
+	if (d[0] != 0xFE) return 0;		/* If not valid data token, return with error */
+
+	sdcard->rcvr_mmc(sdcard->phy,buff, btr);			/* Receive the data block into buffer */
+	sdcard->rcvr_mmc(sdcard->phy,d, 2);					/* Discard CRC */
+
+	return 1;						/* Return with success */
+}
+
+
+int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token)
+{
+	char d[2];
+
+
+	if (!sdcardwait_ready(sdcard)) return 0;
+
+	d[0] = token;
+	sdcard->xmit_mmc(sdcard->phy,d, 1);				/* Xmit a token */
+	if (token != 0xFD) {		/* Is it data token? */
+		sdcard->xmit_mmc(sdcard->phy,buff, 512);	/* Xmit the 512 byte data block to MMC */
+		sdcard->rcvr_mmc(sdcard->phy,d, 2);			/* Xmit dummy CRC (0xFF,0xFF) */
+		sdcard->rcvr_mmc(sdcard->phy,d, 1);			/* Receive data response */
+		if ((d[0] & 0x1F) != 0x05)	/* If not accepted, return with error */
+			return 0;
+	}
+
+	return 1;
+}
+
+
+char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg)
+{
+	char n, d, buf[6];
+
+
+	if (cmd & 0x80) {	/* ACMD<n> is the command sequense of CMD55-CMD<n> */
+		cmd &= 0x7F;
+		n = sdcardsend_cmd(_this,CMD55, 0);
+		if (n > 1) return n;
+	}
+	/* Select the card and wait for ready */
+	sdcarddeselect(_this);
+	if (!sdcardselect(_this)) return 0xFF;
+	/* Send a command packet */
+	buf[0] = 0x40 | cmd;			/* Start + Command index */
+	buf[1] = (char)(arg >> 24);		/* Argument[31..24] */
+	buf[2] = (char)(arg >> 16);		/* Argument[23..16] */
+	buf[3] = (char)(arg >> 8);		/* Argument[15..8] */
+	buf[4] = (char)arg;				/* Argument[7..0] */
+	n = 0x01;						/* Dummy CRC + Stop */
+	if (cmd == CMD0) n = 0x95;		/* (valid CRC for CMD0(0)) */
+	if (cmd == CMD8) n = 0x87;		/* (valid CRC for CMD8(0x1AA)) */
+	if (cmd == CMD55) n = 0x63;
+	buf[5] = n;
+	((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,buf, 6);
+	/* Receive command response */
+	if (cmd == CMD12) {((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1);}	/* Skip a stuff byte when stop reading */
+	n = 10;								/* Wait for a valid response in timeout of 10 attempts */
+	do
+	{
+		((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,&d, 1);
+		//libucprintf("resp=%d\n\r",d);
+	}
+	while ((d & 0x80) && --n);
+
+	return d;			/* Return with the response value */
+}
+
+
+
+
+DSTATUS sdcarddisk_status (blkdevice* _this,char drv)
+{
+	DSTATUS s = ((sdcardDev*)_this->phy)->Stat;
+	char ocr[4];
+
+
+	if (drv || !_this->detect()) {
+		s = STA_NODISK | STA_NOINIT;
+	} else {
+		s &= ~STA_NODISK;
+		if (_this->writeprotected())						/* Check card write protection */
+			s |= STA_PROTECT;
+		else
+			s &= ~STA_PROTECT;
+		if (!(s & STA_NOINIT)) {
+			if (sdcardsend_cmd(_this,CMD58, 0))	/* Check if the card is kept initialized */
+				s |= STA_NOINIT;
+			((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ocr, 4);
+			_this->select(0);
+		}
+	}
+	((sdcardDev*)_this->phy)->Stat = s;
+
+	return s;
+}
+
+
+
+
+DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv)
+{
+	char n, cmd, ty, ocr[4];
+	const unsigned char dummy=0xff;
+	
+	((sdcardDev*)_this->phy)->setspeed(((sdcardDev*)_this->phy)->phy,350000);
+	if (drv) return STA_NOINIT;			/* Supports only drive 0 */
+	if (((sdcardDev*)_this->phy)->Stat & STA_NODISK) return ((sdcardDev*)_this->phy)->Stat;	/* Is card existing in the soket? */
+
+	for (n = 10; n; n--) ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);	/* Send 80 dummy clocks */
+
+	ty = 0;
+	if (sdcardsend_cmd(_this,CMD0, 0) == 1) {			/* Put the card SPI/Idle state */
+		Timer1 = 1000;						/* Initialization timeout = 1 sec */
+		if (sdcardsend_cmd(_this,CMD8, 0x1AA) == 1) {	/* SDv2? */
+			((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ocr, 4);
+			//for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);	/* Get 32 bit return value of R7 resp */
+			if (ocr[2] == 0x01 && ocr[3] == 0xAA) {				/* Is the card supports vcc of 2.7-3.6V? */
+				while (Timer1 && sdcardsend_cmd(_this,ACMD41, 1UL << 30)) ;	/* Wait for end of initialization with ACMD41(HCS) */
+				if (Timer1 && sdcardsend_cmd(_this,CMD58, 0) == 0) {		/* Check CCS bit in the OCR */
+					//for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
+					((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ocr, 4);
+					ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;	/* Card id SDv2 */
+				}
+			}
+		} else {	/* Not SDv2 card */
+			if (sdcardsend_cmd(_this,ACMD41, 0) <= 1) 	{	/* SDv1 or MMC? */
+				ty = CT_SD1; cmd = ACMD41;	/* SDv1 (ACMD41(0)) */
+			} else {
+				ty = CT_MMC; cmd = CMD1;	/* MMCv3 (CMD1(0)) */
+			}
+			while (Timer1 && sdcardsend_cmd(_this,cmd, 0)) ;		/* Wait for end of initialization */
+			if (!Timer1 || sdcardsend_cmd(_this,CMD16, 512) != 0)	/* Set block length: 512 */
+				ty = 0;
+		}
+	}
+	((sdcardDev*)_this->phy)->CardType = ty;	/* Card type */
+	sdcarddeselect (_this);
+
+	if (ty) {			/* OK */
+		((sdcardDev*)_this->phy)->setspeed(((sdcardDev*)_this->phy)->phy,10000000);
+		((sdcardDev*)_this->phy)->Stat &= ~STA_NOINIT;	/* Clear STA_NOINIT flag */
+	} else {			/* Failed */
+		//power_off();
+		((sdcardDev*)_this->phy)->Stat = STA_NOINIT;
+	}
+
+	return ((sdcardDev*)_this->phy)->Stat;
+}
+
+
+
+
+
+
+
+
+
+
+DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count)
+{
+	DSTATUS s;
+
+
+	s = sdcarddisk_status(_this,drv);
+	if (s & STA_NOINIT) return RES_NOTRDY;
+	if (!count) return RES_PARERR;
+	if (!(((sdcardDev*)_this->phy)->CardType & CT_BLOCK)) sector *= 512;	/* Convert LBA to byte address if needed */
+
+	if (count == 1) {	/* Single block read */
+		if ((sdcardsend_cmd(_this,CMD17, sector) == 0) && sdcardrcvr_datablock((sdcardDev*)(_this->phy),buff, 512))
+			count = 0;
+	}
+	else {				/* Multiple block read */
+		if (sdcardsend_cmd(_this,CMD18, sector) == 0) {	/* READ_MULTIPLE_BLOCK */
+			do {
+				if (!sdcardrcvr_datablock (((sdcardDev*)_this->phy),buff, 512)) break;
+				buff += 512;
+			} while (--count);
+			sdcardsend_cmd(_this,CMD12, 0);				/* STOP_TRANSMISSION */
+		}
+	}
+	sdcarddeselect (_this);
+
+	return count ? RES_ERROR : RES_OK;
+}
+
+
+
+
+
+DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count)
+{
+	DSTATUS s;
+
+
+	s = sdcarddisk_status(_this,drv);
+	if (s & STA_NOINIT) return RES_NOTRDY;
+	if (s & STA_PROTECT) return RES_WRPRT;
+	if (!count) return RES_PARERR;
+	if (!(((sdcardDev*)_this->phy)->CardType & CT_BLOCK)) sector *= 512;	/* Convert LBA to byte address if needed */
+
+	if (count == 1) {	/* Single block write */
+		if ((sdcardsend_cmd(_this,CMD24, sector) == 0)	/* WRITE_BLOCK */
+			&& sdcardxmit_datablock (((sdcardDev*)_this->phy),buff, 0xFE))
+			count = 0;
+	}
+	else {				/* Multiple block write */
+		if (((sdcardDev*)_this->phy)->CardType & CT_SDC) sdcardsend_cmd(_this,ACMD23, count);
+		if (sdcardsend_cmd(_this,CMD25, sector) == 0) {	/* WRITE_MULTIPLE_BLOCK */
+			do {
+				if (!sdcardxmit_datablock (((sdcardDev*)_this->phy),buff, 0xFC)) break;
+				buff += 512;
+			} while (--count);
+			if (!sdcardxmit_datablock (((sdcardDev*)_this->phy),0, 0xFD))	/* STOP_TRAN token */
+				count = 1;
+		}
+	}
+	sdcarddeselect (_this);
+
+	return count ? RES_ERROR : RES_OK;
+}
+
+
+DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff)
+{
+	DRESULT res;
+	const unsigned char dummy=0xff;
+	char n, csd[16], *ptr = buff;
+	unsigned short csize;
+	unsigned long *dp, st, ed;
+
+
+	if (drv) return RES_PARERR;					/* Check parameter */
+	if (((sdcardDev*)_this->phy)->Stat & STA_NOINIT) return RES_NOTRDY;	/* Check if drive is ready */
+
+	res = RES_ERROR;
+
+	switch (ctrl) {
+	case CTRL_SYNC :		/* Wait for end of internal write process of the drive */
+		if (sdcardselect (_this)) {
+			sdcarddeselect (_this);
+			res = RES_OK;
+		}
+		break;
+
+	case GET_SECTOR_COUNT :	/* Get drive capacity in unit of sector (DWORD) */
+		if ((sdcardsend_cmd(_this,CMD9, 0) == 0) && sdcardrcvr_datablock (((sdcardDev*)_this->phy),csd, 16)) {
+			if ((csd[0] >> 6) == 1) {	/* SDC ver 2.00 */
+				csize = csd[9] + ((unsigned short)csd[8] << 8) + 1;
+				*(unsigned long*)buff = (unsigned long)csize << 10;
+			} else {					/* SDC ver 1.XX or MMC ver 3 */
+				n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
+				csize = (csd[8] >> 6) + ((unsigned short)csd[7] << 2) + ((unsigned short)(csd[6] & 3) << 10) + 1;
+				*(unsigned long*)buff = (unsigned long)csize << (n - 9);
+			}
+			res = RES_OK;
+		}
+		break;
+
+	case GET_SECTOR_SIZE :	/* Get sector size in unit of byte (WORD) */
+		*(unsigned short*)buff = 512;
+		res = RES_OK;
+		break;
+
+	case GET_BLOCK_SIZE :	/* Get erase block size in unit of sector (DWORD) */
+		if (((sdcardDev*)_this->phy)->CardType & CT_SD2) {	/* SDC ver 2.00 */
+			if (sdcardsend_cmd(_this,ACMD13, 0) == 0) {	/* Read SD status */
+				((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);
+				if (sdcardrcvr_datablock (((sdcardDev*)_this->phy),csd, 16)) {				/* Read partial block */
+					for (n = 64 - 16; n; n--) ((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);	/* Purge trailing data */
+					*(unsigned long*)buff = 16UL << (csd[10] >> 4);
+					res = RES_OK;
+					((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);
+				}
+			}
+		} else {					/* SDC ver 1.XX or MMC */
+			if ((sdcardsend_cmd(_this,CMD9, 0) == 0) && sdcardrcvr_datablock (((sdcardDev*)_this->phy),csd, 16)) {	/* Read CSD */
+				if (((sdcardDev*)_this->phy)->CardType & CT_SD1) {	/* SDC ver 1.XX */
+					*(unsigned long*)buff = (((csd[10] & 63) << 1) + ((unsigned short)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
+				} else {					/* MMC */
+					*(unsigned long*)buff = ((unsigned short)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
+				}
+				res = RES_OK;
+			}
+		}
+		break;
+
+	case CTRL_ERASE_SECTOR :	/* Erase a block of sectors (used when _USE_ERASE == 1) */
+		if (!(((sdcardDev*)_this->phy)->CardType & CT_SDC)) break;				/* Check if the card is SDC */
+		if (sdcarddisk_ioctl(_this,drv, MMC_GET_CSD, csd)) break;	/* Get CSD */
+		if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break;	/* Check if sector erase can be applied to the card */
+		dp = buff; st = dp[0]; ed = dp[1];				/* Load sector block */
+		if (!(((sdcardDev*)_this->phy)->CardType & CT_BLOCK)) {
+			st *= 512; ed *= 512;
+		}
+		if (sdcardsend_cmd(_this,CMD32, st) == 0 && sdcardsend_cmd(_this,CMD33, ed) == 0 && sdcardsend_cmd(_this,CMD38, 0) == 0 && sdcardwait_ready(((sdcardDev*)_this->phy)))	/* Erase sector block */
+			res = RES_OK;	/* FatFs does not check result of this command */
+		break;
+
+	/* Following command are not used by FatFs module */
+
+	case MMC_GET_TYPE :		/* Get MMC/SDC type (BYTE) */
+		*ptr = ((sdcardDev*)_this->phy)->CardType;
+		res = RES_OK;
+		break;
+
+	case MMC_GET_CSD :		/* Read CSD (16 bytes) */
+		if (sdcardsend_cmd(_this,CMD9, 0) == 0		/* READ_CSD */
+			&& sdcardrcvr_datablock (((sdcardDev*)_this->phy),ptr, 16))
+			res = RES_OK;
+		break;
+
+	case MMC_GET_CID :		/* Read CID (16 bytes) */
+		if (sdcardsend_cmd(_this,CMD10, 0) == 0		/* READ_CID */
+			&& sdcardrcvr_datablock (((sdcardDev*)_this->phy),ptr, 16))
+			res = RES_OK;
+		break;
+
+	case MMC_GET_OCR :		/* Read OCR (4 bytes) */
+		if (sdcardsend_cmd(_this,CMD58, 0) == 0) {	/* READ_OCR */
+			//for (n = 4; n; n--) *ptr++ = 
+			((sdcardDev*)_this->phy)->rcvr_mmc(((sdcardDev*)_this->phy)->phy,ptr, 4);
+			res = RES_OK;
+		}
+		break;
+
+	case MMC_GET_SDSTAT :	/* Read SD status (64 bytes) */
+		if (sdcardsend_cmd(_this,ACMD13, 0) == 0) {	/* SD_STATUS */
+			((sdcardDev*)_this->phy)->xmit_mmc(((sdcardDev*)_this->phy)->phy,&dummy, 1);
+			if (sdcardrcvr_datablock (((sdcardDev*)_this->phy),ptr, 64))
+				res = RES_OK;
+		}
+		break;
+
+	default:
+		res = RES_PARERR;
+	}
+
+	sdcarddeselect (_this);
+
+	return res;
+}
+
+
+
+void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed))
+{
+	sdcard->phy = phy;
+	sdcard->rcvr_mmc = rcvr_mmc;
+	sdcard->xmit_mmc = xmit_mmc;
+	sdcard->setspeed = setspeed;
+}
+
+ void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected)
+ {
+ 	dev->phy=sdcard;
+ 	dev->select=select;
+ 	dev->power = power;
+ 	dev->detect = detect;
+ 	dev->writeprotected = writeprotected;
+ 	dev->write = sdcarddisk_write;
+ 	dev->read = sdcarddisk_read;
+ 	dev->ioctl = sdcarddisk_ioctl;
+ 	dev->initialize = sdcarddisk_initialize;
+ 	dev->status = sdcarddisk_status;
+ 
+ }
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/src/common/SDCARD/sdcard.h b/lib/src/common/SDCARD/sdcard.h
new file mode 100644
--- /dev/null
+++ b/lib/src/common/SDCARD/sdcard.h
@@ -0,0 +1,116 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2012, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef SDCARD_H
+#define SDCARD_H
+#include "blkdevice.h"
+#include <libucstrings.h>
+
+/* MMC/SD command */
+#define CMD0	(0)			/* GO_IDLE_STATE */
+#define CMD1	(1)			/* SEND_OP_COND (MMC) */
+#define	ACMD41	(0x80+41)	/* SEND_OP_COND (SDC) */
+#define CMD8	(8)			/* SEND_IF_COND */
+#define CMD9	(9)			/* SEND_CSD */
+#define CMD10	(10)		/* SEND_CID */
+#define CMD12	(12)		/* STOP_TRANSMISSION */
+#define ACMD13	(0x80+13)	/* SD_STATUS (SDC) */
+#define CMD16	(16)		/* SET_BLOCKLEN */
+#define CMD17	(17)		/* READ_SINGLE_BLOCK */
+#define CMD18	(18)		/* READ_MULTIPLE_BLOCK */
+#define CMD23	(23)		/* SET_BLOCK_COUNT (MMC) */
+#define	ACMD23	(0x80+23)	/* SET_WR_BLK_ERASE_COUNT (SDC) */
+#define CMD24	(24)		/* WRITE_BLOCK */
+#define CMD25	(25)		/* WRITE_MULTIPLE_BLOCK */
+#define CMD32	(32)		/* ERASE_ER_BLK_START */
+#define CMD33	(33)		/* ERASE_ER_BLK_END */
+#define CMD38	(38)		/* ERASE */
+#define CMD55	(55)		/* APP_CMD */
+#define CMD58	(58)		/* READ_OCR */
+
+/* Card type flags (CardType) */
+#define CT_MMC		0x01		/* MMC ver 3 */
+#define CT_SD1		0x02		/* SD ver 1 */
+#define CT_SD2		0x04		/* SD ver 2 */
+#define CT_SDC		(CT_SD1|CT_SD2)	/* SD */
+#define CT_BLOCK	0x08		/* Block addressing */
+
+struct sdcard_str
+{
+	void* phy;
+	void (*rcvr_mmc) (void* phy,char *buff,unsigned int bc);
+	void (*xmit_mmc) (void* phy,const char *buff,unsigned int bc);
+	void (*setspeed) (void* phy,unsigned int speed);
+	DSTATUS Stat;
+	char CardType;	
+};
+
+typedef volatile struct sdcard_str sdcardDev;
+
+extern void sdcardmake(sdcardDev* sdcard,void* phy,void (*rcvr_mmc) (void*,char *,unsigned int ),void (*xmit_mmc) (void*,const char *,unsigned int ),void (*setspeed) (void* phy,unsigned int speed));
+extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected);
+
+extern int sdcardselect (blkdevice* _this);
+extern void sdcarddeselect (blkdevice* _this);
+extern int sdcardwait_ready (sdcardDev* sdcard);
+extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token);
+extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,unsigned int btr);
+extern char sdcardsend_cmd (blkdevice* _this,char cmd,unsigned int arg);
+
+extern DSTATUS sdcarddisk_status (blkdevice* _this,char drv);
+extern DSTATUS sdcarddisk_initialize (blkdevice* _this,char drv);
+extern DRESULT sdcarddisk_read (blkdevice* _this,char drv,char *buff,unsigned int sector,char count);
+extern DRESULT sdcarddisk_write (blkdevice* _this,char drv,const char *buff,unsigned int sector,char count);
+extern DRESULT sdcarddisk_ioctl (blkdevice* _this,char drv,char ctrl,void *buff);
+
+#endif
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/src/common/SDCARD/sdcard.pro b/lib/src/common/SDCARD/sdcard.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/common/SDCARD/sdcard.pro
@@ -0,0 +1,26 @@
+TEMPLATE = lib
+lpc17XX.ARCH = lpc17XX-arm-noabi-gcc
+lpc17XX.TARGET = libsdcard
+lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_SDCARD) 
+lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD) 
+
+lpc17XX.LIBS += SSP BLKDEVICE UCSTRINGS 
+
+lpc17XX.SOURCES += sdcard.c
+
+
+lpc17XX.HEADERS += sdcard.h
+
+
+
+lpc21XX.ARCH = lpc21XX-arm-noabi-gcc
+lpc21XX.TARGET = libsdcard
+lpc21XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_SDCARD) 
+lpc21XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SDCARD) 
+
+lpc21XX.LIBS += SSP BLKDEVICE
+
+lpc21XX.SOURCES += sdcard.c
+
+
+lpc21XX.HEADERS += sdcard.h
diff --git a/lib/src/common/STRINGS/lpc17XX.mk b/lib/src/common/STRINGS/lpc17XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/STRINGS/lpc17XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_UCSTRINGS) 
+HEADERS += libucstrings.h
+LIBSOURCES += libucstrings.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=libucstrings
+LIBUC_INCLUDES=
+LIBUC_LIBRARIES=
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_UCSTRINGS)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_UCSTRINGS)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/STRINGS/lpc21XX.mk b/lib/src/common/STRINGS/lpc21XX.mk
new file mode 100644
--- /dev/null
+++ b/lib/src/common/STRINGS/lpc21XX.mk
@@ -0,0 +1,19 @@
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_UCSTRINGS) 
+HEADERS += libucstrings.h
+LIBSOURCES += libucstrings.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc21XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
+TARGET=libucstrings
+LIBUC_INCLUDES=
+LIBUC_LIBRARIES=
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_UCSTRINGS)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_UCSTRINGS)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/VS10XX/Makefile b/lib/src/common/VS10XX/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/common/VS10XX/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_VS10XX)
+HEADERS += vs1053.h
+LIBSOURCES += vs1053.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=libvs10XX
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_SSP_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) 
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_VS10XX)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_VS10XX)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/common/VS10XX/vs1053.c b/lib/src/common/VS10XX/vs1053.c
new file mode 100644
--- /dev/null
+++ b/lib/src/common/VS10XX/vs1053.c
@@ -0,0 +1,56 @@
+#/*------------------------------------------------------------------------------
+#--  This file is a part of the libuc, microcontroler library
+#--  Copyright (C) 2011, Alexis Jeandet
+#--
+#--  This program is free software; you can redistribute it and/or modify
+#--  it under the terms of the GNU General Public License as published by
+#--  the Free Software Foundation; either version 3 of the License, or
+#--  (at your option) any later version.
+#--
+#--  This program is distributed in the hope that it will be useful,
+#--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#--  GNU General Public License for more details.
+#--
+#--  You should have received a copy of the GNU General Public License
+#--  along with this program; if not, write to the Free Software
+#--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+#-------------------------------------------------------------------------------
+#--                 Author : Alexis Jeandet
+#--                   Mail : alexis.jeandet@gmail.com
+#-------------------------------------------------------------------------------*/
+#include "ssp.h"
+#include "vs1053.h"
+//#include <bsp.h>
+
+void vs1053open(vs1053Dev* codec,sspDev* dev){
+	codec->SSP_device = dev;
+
+}
+
+void vs1053softreset(vs1053Dev* dev)
+{
+	vs1053cmdwrite(dev,VSMODE,(1<<2));
+}
+
+int vs1053cmdread(vs1053Dev* dev,char address)
+{
+	int result;
+	while(!vs10XXDREQ());
+	vs10XXclearXCS();
+	sspputw(dev->SSP_device,(3<<8)+address);
+	result = sspgetw(dev->SSP_device);
+	vs10XXsetXCS();
+	return result;
+}
+
+
+void vs1053cmdwrite(vs1053Dev* dev,char address,int value)
+{
+	while(!vs10XXDREQ());
+	vs10XXclearXCS();
+	sspputw(dev->SSP_device,(2<<8)+address);
+	sspputw(dev->SSP_device,value);
+	vs10XXsetXCS();
+}
+
diff --git a/lib/src/common/VS10XX/vs1053.h b/lib/src/common/VS10XX/vs1053.h
new file mode 100644
--- /dev/null
+++ b/lib/src/common/VS10XX/vs1053.h
@@ -0,0 +1,58 @@
+#/*------------------------------------------------------------------------------
+#--  This file is a part of the libuc, microcontroler library
+#--  Copyright (C) 2011, Alexis Jeandet
+#--
+#--  This program is free software; you can redistribute it and/or modify
+#--  it under the terms of the GNU General Public License as published by
+#--  the Free Software Foundation; either version 3 of the License, or
+#--  (at your option) any later version.
+#--
+#--  This program is distributed in the hope that it will be useful,
+#--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#--  GNU General Public License for more details.
+#--
+#--  You should have received a copy of the GNU General Public License
+#--  along with this program; if not, write to the Free Software
+#--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+#-------------------------------------------------------------------------------
+#--                 Author : Alexis Jeandet
+#--                   Mail : alexis.jeandet@gmail.com
+#-------------------------------------------------------------------------------*/
+
+
+#define VSMODE        0 
+#define VSSTATUS      1
+#define VSBASS        2
+#define VSCLOCKF      3
+#define VSDECODE_TIME 4
+#define VSAUDATA      5
+#define VSWRAM        6
+#define VSWRAMADDR    7
+#define VSHDAT0       8
+#define VSHDAT1       9
+#define VSAIADDR      0xA
+#define VSVOL         0xB
+#define VSAICTRL0     0xC
+#define VSAICTRL1     0xD
+#define VSAICTRL2     0xE
+#define VSAICTRL3     0xF
+
+struct vs1053Regs
+{
+ sspDev* SSP_device;
+ int a;
+};
+
+typedef struct vs1053Regs vs1053Dev;
+
+void vs1053open(vs1053Dev* codec,sspDev* dev);
+void vs1053softreset(vs1053Dev* dev);
+int vs1053cmdread(vs1053Dev* dev,char address);
+void vs1053cmdwrite(vs1053Dev* dev,char address,int value);
+
+extern void vs10XXclearXCS();
+extern void vs10XXsetXCS();
+extern int vs10XXDREQ();
+
+
diff --git a/lib/src/common/VS10XX/vs1053.pro b/lib/src/common/VS10XX/vs1053.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/common/VS10XX/vs1053.pro
@@ -0,0 +1,12 @@
+TEMPLATE = lib
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = libvs10XX
+TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_VS10XX)
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_VS10XX)
+
+LIBS += CORE SSP
+
+SOURCES += vs1053.c
+
+
+HEADERS += vs1053.h
diff --git a/lib/src/common/common.pro b/lib/src/common/common.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/common/common.pro
@@ -0,0 +1,6 @@
+TEMPLATE = dir
+SUBDIRS += 24LCXX \
+		STRINGS \
+		VS10XX \
+		SDCARD \
+		BLOCKDEVICES 
diff --git a/lib/src/lpc17XX/SSP/Makefile b/lib/src/lpc17XX/SSP/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc17XX/SSP/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SSP)
+HEADERS += ssp.h
+LIBSOURCES += ssp.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc17XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-noabi-gcc
+TARGET=libssp
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) 
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_SSP)
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR_SSP)
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/lpc17XX/SSP/ssp.c b/lib/src/lpc17XX/SSP/ssp.c
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc17XX/SSP/ssp.c
@@ -0,0 +1,240 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "ssp.h"
+#include "core.h"
+
+
+void sspputw(sspDev* dev,int c) {
+	volatile int a;
+	dev->SSPDataReg = c;
+	while (((dev->SSPStatReg & (1<<4))));
+	a=dev->SSPDataReg;
+}
+
+void sspputc(sspDev* dev,char c) {
+	volatile char a;
+	dev->SSPDataReg = c;
+	while (((dev->SSPStatReg & (1<<4))));
+	a=dev->SSPDataReg;
+}
+
+void sspputnc(sspDev* dev,const char *c,unsigned int n)
+{
+	volatile char a;
+	while(n--)
+	{
+		dev->SSPDataReg = *c++;
+		while (((dev->SSPStatReg & (1<<4))));
+		a=dev->SSPDataReg;
+	}
+}
+
+char sspgetc(sspDev* dev) {
+	dev->SSPDataReg = 0xffff;
+	while ((dev->SSPStatReg & (0x10)));
+	return ((char)dev->SSPDataReg);
+}
+
+void sspgetnc(sspDev* dev,char *c,unsigned int n)
+{
+	volatile char a;
+	while (((dev->SSPStatReg & (1<<2)))) a=dev->SSPDataReg;
+	while(n)
+	{
+		dev->SSPDataReg = 0xff;
+		while (((dev->SSPStatReg & (1<<4))));
+		*c= (char)dev->SSPDataReg;
+		c++;
+		n--;
+	}
+}
+
+int sspgetw(sspDev* dev) {
+	int dummy;
+	while(((dev->SSPStatReg & (1<<2))))
+		dummy = dev->SSPDataReg;
+	dev->SSPDataReg = 0xFFFF;
+	while (((dev->SSPStatReg & (1<<4))));
+	return (dev->SSPDataReg);
+}
+
+
+void sspputs(sspDev* dev,char *s) {
+	while (*s) sspputc(dev,*s++);
+}
+
+
+void sspgets(sspDev* dev,char *s) {
+	while (*s && (*s!=0xd)) *s++ = sspgetc(dev);
+}
+
+void sspsetup(sspDev* dev,unsigned char bitscount,int sspCtrlRegValue0,int sspCtrlRegValue1, unsigned int  dataRate)
+{
+	dev->SSPCtrlReg0 = sspCtrlRegValue0;
+	dev->SSPCtrlReg1 = sspCtrlRegValue1;
+	sspsetupTRsize(dev,bitscount);
+	sspsetdatarate(dev,dataRate);
+}
+
+void sspsetupTRsize(sspDev* dev,unsigned char value)
+{
+	disableSSP(dev);
+	if(value < 4)value =4;
+	value--;
+	dev->SSPCtrlReg0 |= value;
+	dev->SSPCtrlReg0 &= 0xFFFFFFF0 | value;
+	enableSSP(dev);
+}
+
+void enableSSP(sspDev* dev)
+{
+	dev->SSPCtrlReg1 |= 1<<1;
+}
+
+void disableSSP(sspDev* dev)
+{
+	dev->SSPCtrlReg1 &= -1 - (1<<1);
+}
+
+void ssppowerup(sspDev* dev)
+{
+	switch((int)dev)
+	{
+	  case (int)LPC_SSP0_BASE:
+		LPC_SC->PCONP |= ( 1 << 21 );
+		break;
+	  case (int)LPC_SSP1_BASE:
+		LPC_SC->PCONP |= ( 1 << 10 );
+		break;
+	  default:
+		break;
+	}
+}
+
+void ssppowerdown(sspDev* dev)
+{
+	switch((int)dev)
+	{
+	  case (int)LPC_SSP0_BASE:
+		LPC_SC->PCONP &= ~( 1 << 21 );
+		break;
+	  case (int)LPC_SSP1_BASE:
+		LPC_SC->PCONP &= ~( 1 << 10 );
+		break;
+	  default:
+		break;
+	}
+}
+
+
+sspDev* sspopen(int count){
+	sspDev* dev;
+	switch(count)
+	{
+	  case 0:
+		dev = (sspDev*)((unsigned long)LPC_SSP0_BASE);
+		break;
+	  case 1:
+		dev = (sspDev*)((unsigned long)LPC_SSP1_BASE);
+		break;
+	  default:
+		dev = (sspDev*)0;
+		break;
+	}
+	return dev;
+}
+
+
+
+
+
+
+
+
+unsigned char sspgetpclkfactor(sspDev* dev)
+{
+	unsigned int clksel=0;
+	const char clkselDec[]={4,1,2,8};
+	switch((int)dev)
+	{
+	  case (int)LPC_SSP0_BASE:
+		clksel = (LPC_SC->PCLKSEL1>>10) & 3;
+		break;
+	  case (int)LPC_SSP1_BASE:
+		clksel = (LPC_SC->PCLKSEL0>>20) & 3;
+		break;
+	  default:
+		break;
+	}
+	return clkselDec[clksel];
+}
+
+
+void sspsetpclkfactor(sspDev* dev,unsigned char pclkfactor)
+{
+	const char clkselDec[]={1,1,2,2,0,0,0,0,3};
+	unsigned int clksel=0;
+	switch((int)dev)
+	{
+	  case (int)LPC_SSP0_BASE:
+		LPC_SC->PCLKSEL1 |= clkselDec[pclkfactor]<<10;
+		LPC_SC->PCLKSEL1 &= clkselDec[pclkfactor]<<10;
+		break;
+	  case (int)LPC_SSP1_BASE:
+		LPC_SC->PCLKSEL0 |= clkselDec[pclkfactor]<<20;
+		LPC_SC->PCLKSEL0 &= clkselDec[pclkfactor]<<20;
+		break;
+	  default:
+		break;
+	}
+
+}
+
+
+
+
+void sspsetdatarate(sspDev* dev,unsigned int  dataRate)
+{
+	unsigned int pclk = 0;
+	unsigned int cpuclk=0;
+	unsigned int sspsclkl=0;
+	unsigned char error;
+	if(dev==0)return;
+	cpuclk = coregetCpuFreq();
+	pclk = (cpuclk) / sspgetpclkfactor(dev);
+	sspsclkl = ((pclk*32) / (dataRate));
+	error = (unsigned char)(sspsclkl & 0x3F);
+	if(error >= 0x1F) sspsclkl = sspsclkl + 0x1F;
+	sspsclkl = sspsclkl / 32;
+	if(sspisslave(dev))
+	{
+		if(sspsclkl<12) sspsclkl = 12;
+	}
+	else
+	{
+		if(sspsclkl<2) sspsclkl = 2;
+	}
+	sspsclkl &= 0xFE;
+	dev->SSPClkPrescReg = sspsclkl;
+}
+
+
diff --git a/lib/src/lpc17XX/SSP/ssp.h b/lib/src/lpc17XX/SSP/ssp.h
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc17XX/SSP/ssp.h
@@ -0,0 +1,96 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "LPC17xx.h"
+#ifndef SSP_H
+#define SSP_H
+
+#define l4bits ((1<<1)+(1))               //0011 4 bit transfer
+#define l5bits ((1<<2))                   //0100 5 bit transfer
+#define l6bits ((1<<2)+(1))               //0101 6 bit transfer
+#define l7bits ((1<<1)+(1<<1))            //0110 7 bit transfer
+#define l8bits ((1<<2)+(1<<1)+(1))        //0111 8 bit transfer
+#define l9bits ((1<<3))                   //1000 9 bit transfer
+#define l10bits ((1<<3)+(1))               //1001 10 bit transfer
+#define l11bits ((1<<3)+(1<<1))            //1010 11 bit transfer
+#define l12bits ((1<<3)+(1<<1)+1)          //1011 12 bit transfer
+#define l13bits ((1<<3)+(1<<2))            //1100 13 bit transfer
+#define l14bits ((1<<3)+(1<<2)+1)          //1101 14 bit transfer
+#define l15bits ((1<<3)+(1<<2)+(1<<1))     //1110 15 bit transfer
+#define l16bits ((1<<3)+(1<<2)+(1<<1)+1)   //1111 16 bit transfer
+
+#define FFSPI  0
+#define FFTI (1<<4)
+#define FFMICROWIRE (1<<5)
+
+#define CLKINHLOW 0
+#define CLKINHHIGH (1<<6)
+
+#define CKfirstEdge 0
+#define CKsecondEdge (1<<7)
+
+
+
+#define loopbackOFF 0
+#define loopbackON 1
+
+#define MASTERMODE 0
+#define SLAVEMODE (1<<2)
+
+#define SLAVEOUTPUTDISABLEMODE (1<<3)
+
+#define sspisslave(dev)  ((((dev)->SSPCtrlReg1>>2) & 1)==1)
+
+struct sspRegs
+{
+ unsigned long SSPCtrlReg0; 
+ unsigned long SSPCtrlReg1;
+ unsigned long SSPDataReg;
+ unsigned long SSPStatReg; 
+ unsigned long SSPClkPrescReg;
+ unsigned long SSPIntMaskReg;
+ unsigned long SSPRawIntStatReg;
+ unsigned long SSPMaskedIntStatReg;
+ unsigned long SSPIntClearReg;
+ unsigned long SSPDMACtrlReg;
+};
+
+typedef volatile struct sspRegs sspDev;
+
+extern sspDev* sspopen(int count);
+extern void sspputc(sspDev* dev,char c);
+extern void sspputnc(sspDev* dev,const char *c,unsigned int n);
+extern void sspputw(sspDev* dev,int c);
+extern void sspputs(sspDev* dev,char *s);
+extern void sspgets(sspDev* dev,char *s);
+extern char sspgetc(sspDev* dev);
+extern void sspgetnc(sspDev* dev,char *c,unsigned int n);
+extern int  sspgetw(sspDev* dev);
+extern void enableSSP(sspDev* dev);
+extern void disableSSP(sspDev* dev);
+extern void sspsetup(sspDev* dev,unsigned char bitscount,int sspCtrlRegValue0,int sspCtrlRegValue1, unsigned int  dataRate);
+extern void sspsetupTRsize(sspDev* dev,unsigned char value);
+extern unsigned char sspgetpclkfactor(sspDev* dev);
+extern void sspsetpclkfactor(sspDev* dev,unsigned char pclkfactor);
+extern void sspsetdatarate(sspDev* dev,unsigned int  dataRate);
+
+#endif
+
diff --git a/lib/src/lpc17XX/SSP/ssp.pro b/lib/src/lpc17XX/SSP/ssp.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc17XX/SSP/ssp.pro
@@ -0,0 +1,12 @@
+TEMPLATE = lib
+ARCH = lpc17XX-arm-noabi-gcc
+TARGET = libssp
+TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_SSP)
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR_SSP)
+
+LIBS += CORE
+
+SOURCES += ssp.c
+
+
+HEADERS += ssp.h
diff --git a/lib/src/lpc21XX/CORE/Makefile b/lib/src/lpc21XX/CORE/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/CORE/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/CORE 
+HEADERS += core.h
+LIBSOURCES += core.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc21XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
+TARGET=libcore
+LIBUC_INCLUDES=
+LIBUC_LIBRARIES=
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR)/CORE
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR)/CORE
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/lpc21XX/CORE/core.c b/lib/src/lpc21XX/CORE/core.c
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/CORE/core.c
@@ -0,0 +1,87 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "core.h"
+extern unsigned int OSC0;
+extern unsigned int INTOSC;
+extern unsigned int RTCOSC;
+
+void coresetCpuFreq(unsigned int freq)
+{
+	unsigned int inputFreq = 10000,PLLFREQ=300000000;
+	unsigned int M0=6,N0=1;
+	if(pll0getClksrc==pll0useInternal)
+	{
+		inputFreq=INTOSC;
+	}
+	if(pll0getClksrc==pll0useMainOsc)
+	{
+		inputFreq=OSC0;
+	}
+	if(pll0getClksrc==pll0useRTC)
+	{
+		inputFreq=RTCOSC;
+	}
+	CCLKCFG = (PLLFREQ/freq)-1;
+	while(N0<33)
+	{
+		M0=(PLLFREQ*N0)/(2*inputFreq);
+		if((6<M0)&&(M0<512))
+		{
+			PLLCFG = (M0-1)+((N0-1)<<16);
+			PLLFEED = 0xAA;
+			PLLFEED = 0x55;
+			PLLCON = 1;
+			PLLFEED = 0xAA;
+			PLLFEED = 0x55;
+			while (!(PLLSTAT & (1<<26)));
+			PLLCON = 3;
+			PLLFEED = 0xAA;
+			PLLFEED = 0x55;
+			while (!(PLLSTAT & ((1<<25) | (1<<24))));
+			break;
+		}
+		N0++;
+	}
+
+}
+
+
+
+
+unsigned int coregetCpuFreq()
+{
+	unsigned int inputFreq;
+	unsigned int M0,N0,CPUDIV;
+	M0 = (PLLCFG & 0x3FFF) + 1;
+	N0 = ((PLLCFG>>16) & 0xFF) + 1;
+	CPUDIV = CCLKCFG + 1;
+	if(pll0getClksrc==pll0useInternal){ inputFreq=INTOSC;}
+	if(pll0getClksrc==pll0useMainOsc) {inputFreq=OSC0;}
+	if(pll0getClksrc==pll0useRTC)      {inputFreq=RTCOSC;}
+	if((PLLCON & 2)==2) {return ((inputFreq*M0*2)/(N0*CPUDIV));}
+	return inputFreq;
+}
+
+
+
+
+
diff --git a/lib/src/lpc21XX/CORE/core.h b/lib/src/lpc21XX/CORE/core.h
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/CORE/core.h
@@ -0,0 +1,48 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "LPC23xx.h"
+
+
+#define pll0useInternal 0
+#define pll0useMainOsc 1
+#define pll0useRTC 2
+
+
+#define pll0setClksrc(src) if((unsigned int)(src)<3) CLKSRCSEL=(src)
+#define pll0getClksrc (CLKSRCSEL & 3)
+
+
+extern void coresetCpuFreq(unsigned int freq);
+extern unsigned int coregetCpuFreq();
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/lib/src/lpc21XX/CORE/core.pro b/lib/src/lpc21XX/CORE/core.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/CORE/core.pro
@@ -0,0 +1,12 @@
+TEMPLATE = lib
+ARCH = lpc21XX-arm-noabi-gcc
+TARGET = libcore
+TARGETINSTALLPATH = $(LIBUC_LIBS_DIR)/CORE 
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/CORE 
+
+LIBS += 
+
+SOURCES += core.c
+
+
+HEADERS += core.h
diff --git a/lib/src/lpc21XX/Makefile b/lib/src/lpc21XX/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/Makefile
@@ -0,0 +1,15 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+include $(LIBUC)/rules/common/rules.mk
+
+all:subdir
+	make -C CORE
+	make -C UART
+	@echo Code compiled
+
+clean:
+	make clean -C  CORE
+	make clean -C  UART
+	@echo Code compiled
+
diff --git a/lib/src/lpc21XX/UART/Makefile b/lib/src/lpc21XX/UART/Makefile
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/UART/Makefile
@@ -0,0 +1,20 @@
+
+PROJECTDIR = `pwd`
+LIBUC = /opt/libuc2
+
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/UART 
+HEADERS += uart.h
+LIBSOURCES += uart.c
+OBJECTFILES = $(LIBSOURCES:.c=.o)
+ARCH = lpc21XX-arm-noabi-gcc
+ARCHFOLDER = $(LIBUC)/rules/lpc21XX-arm-noabi-gcc
+TARGET=libuart
+LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) 
+LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) 
+TARGETINSTALLPATH=$(LIBUC_LIBS_DIR)/UART
+HEADERSINSTALLPATH=$(LIBUC_INC_DIR)/UART
+BSP=generic
+include $(ARCHFOLDER)/rules.mk
+
+all:lib
+	@echo Code compiled
diff --git a/lib/src/lpc21XX/UART/uart.c b/lib/src/lpc21XX/UART/uart.c
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/UART/uart.c
@@ -0,0 +1,191 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#include "core.h"
+#include "uart.h"
+
+
+void uartputc(uartDev* dev,char c) {
+	while (!((dev->LineStat & (1<<5))));
+	dev->RWreg = c;
+}
+
+char uartgetc(uartDev* dev) {
+	while (!((dev->LineStat & 1)));
+	return (char)dev->RWreg;
+}
+
+
+void uartputs(uartDev* dev,char *s) {
+	while (*s) uartputc(dev,*s++);
+}
+
+
+void uartgets(uartDev* dev,char *s) {
+	while (*s && (*s!=0xd)) *s++ = uartgetc(dev);
+}
+
+void uartoff(int count)
+{
+	switch(count)
+	{
+	  case 0:
+		PCONP &= ~( 1 << 3 );
+		break;
+	  case 1:
+		PCONP &= ~( 1 << 4 );
+		break;
+          case 2:
+		PCONP &= ~( 1 << 24 );
+		break;
+	  case 3:
+		PCONP &= ~( 1 << 25 );
+		break;
+	  default:
+		break;
+	}
+}
+
+void uarton(int count)
+{
+	switch(count)
+	{
+	  case 0:
+		PCONP |= ( 1 << 3 );
+		break;
+	  case 1:
+		PCONP |= ( 1 << 4 );
+		break;
+          case 2:
+		PCONP |= ( 1 << 24 );
+		break;
+	  case 3:
+		PCONP |= ( 1 << 25 );
+		break;
+	  default:
+		break;
+	}
+}
+
+
+
+void uartsetup(uartDev* dev,unsigned int  baudRate,unsigned char WordLength,unsigned char StopBitCnt,unsigned char Parity)
+{
+	if(WordLength>9)WordLength=8;
+	if((StopBitCnt>2)||(StopBitCnt==0))StopBitCnt=1;
+	if(Parity>7)Parity=0;
+	dev->LineCtrl = (WordLength-5) + ((StopBitCnt-1)<<2) + (Parity<<3);	
+	uartsetbaudrate(dev,baudRate);
+}
+
+unsigned char uartgetpclkfactor(uartDev* dev)
+{
+	unsigned int clksel=0;
+	const char clkselDec[]={4,1,2,8};
+	switch((int)dev)
+	{
+	  case (int)UART0_BASE_ADDR:
+		clksel = (PCLKSEL0>>6) & 3;
+		break;
+	  case (int)UART1_BASE_ADDR:
+		clksel = (PCLKSEL0>>8) & 3;
+		break;
+          case (int)UART2_BASE_ADDR:
+		clksel = (PCLKSEL1>>16) & 3;
+		break;
+	  case (int)UART3_BASE_ADDR:
+		clksel = (PCLKSEL1>>18) & 3;
+		break;
+	  default:
+		break;
+	}
+	return clkselDec[clksel];
+}
+
+void uartsetpclkfactor(uartDev* dev,unsigned char pclkfactor)
+{
+	const char clkselDec[]={1,1,2,2,0,0,0,0,3};
+	unsigned int clksel=0;
+	switch((int)dev)
+	{
+	  case (int)UART0_BASE_ADDR:
+		PCLKSEL0 |= clkselDec[pclkfactor]<<6;
+		PCLKSEL0 &= clkselDec[pclkfactor]<<6;
+		break;
+	  case (int)UART1_BASE_ADDR:
+		PCLKSEL0 |= clkselDec[pclkfactor]<<8;
+		PCLKSEL0 &= clkselDec[pclkfactor]<<8;
+		break;
+          case (int)UART2_BASE_ADDR:
+		PCLKSEL1 |= clkselDec[pclkfactor]<<16;
+		PCLKSEL1 &= clkselDec[pclkfactor]<<16;
+		break;
+	  case (int)UART3_BASE_ADDR:
+	  	PCLKSEL1 |= clkselDec[pclkfactor]<<18;
+		PCLKSEL1 &= clkselDec[pclkfactor]<<18;
+		break;
+	  default:
+		break;
+	}
+}
+
+void uartsetbaudrate(uartDev* dev,unsigned int baudRate)
+{
+	unsigned int pclk = 0;
+	unsigned int clksel=0;
+	unsigned int cpuclk=0;
+	if(dev==0)return;
+	cpuclk = coregetCpuFreq();
+	pclk = cpuclk / uartgetpclkfactor(dev);
+	while((baudRate*16)>pclk)
+	{
+		unsigned char pclkfact= uartgetpclkfactor(dev);
+		if(pclkfact==1)return;
+		uartsetpclkfactor(dev,pclkfact/2);
+		pclk = cpuclk / uartgetpclkfactor(dev);
+	}
+	dev->LineCtrl |= 128;
+     	dev->RWreg = pclk/(baudRate*16);
+	dev->LineCtrl &= ~(128);
+}
+
+uartDev* uartopen(int count){
+	uartDev* dev;
+	switch(count)
+	{
+	  case 0:
+		dev = (uartDev*)((unsigned long)UART0_BASE_ADDR);
+		break;
+	  case 1:
+		dev = (uartDev*)((unsigned long)UART1_BASE_ADDR);
+		break;
+          case 2:
+		dev = (uartDev*)((unsigned long)UART2_BASE_ADDR);
+		break;
+	  case 3:
+		dev = (uartDev*)((unsigned long)UART3_BASE_ADDR);
+		break;
+	  default:
+		dev = (uartDev*)0;
+		break;
+	}
+	return dev;
+}
diff --git a/lib/src/lpc21XX/UART/uart.h b/lib/src/lpc21XX/UART/uart.h
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/UART/uart.h
@@ -0,0 +1,66 @@
+/*------------------------------------------------------------------------------
+--  This file is a part of the libuc, microcontroler library
+--  Copyright (C) 2011, Alexis Jeandet
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program; if not, write to the Free Software
+--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 
+-------------------------------------------------------------------------------
+--                 Author : Alexis Jeandet
+--                   Mail : alexis.jeandet@gmail.com
+-------------------------------------------------------------------------------*/
+#ifndef UART_H
+#define UART_H
+#include "LPC23xx.h"
+
+
+#define uartNoParity 0
+#define uartOddParity 1
+#define uartEvenParity 3
+#define uartTrueParity 5
+#define uartFalseParity 7
+
+struct uartRegs
+{
+ unsigned long RWreg;
+ unsigned long IntEN;
+ unsigned long IntIdFIFOctrlr;
+ unsigned long LineCtrl;
+ unsigned long dummy;
+ unsigned long LineStat;
+ unsigned long ScratchPad;
+};
+
+typedef volatile struct uartRegs uartDev;
+
+extern uartDev* uartopen(int count);
+extern void uarton(int count);
+extern void uartoff(int count);
+extern void uartputc(uartDev* dev,char c);
+extern void uartputs(uartDev* dev,char *s);
+extern void uartgets(uartDev* dev,char *s);
+extern char uartgetc(uartDev* dev);
+extern void uartsetbaudrate(uartDev* dev,unsigned int  baudRate);
+extern unsigned char uartgetpclkfactor(uartDev* dev);
+extern void uartsetpclkfactor(uartDev* dev,unsigned char pclkfactor);
+extern void uartsetup(uartDev* dev,unsigned int  baudRate,unsigned char WordLength,unsigned char StopBitCnt,unsigned char Parity);
+
+#endif
+
+
+
+
+
+
+
+
diff --git a/lib/src/lpc21XX/UART/uart.pro b/lib/src/lpc21XX/UART/uart.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/UART/uart.pro
@@ -0,0 +1,12 @@
+TEMPLATE = lib
+ARCH = lpc21XX-arm-noabi-gcc
+TARGET = libuart
+TARGETINSTALLPATH = $(LIBUC_LIBS_DIR)/UART 
+HEADERSINSTALLPATH = $(LIBUC_INC_DIR)/UART 
+
+LIBS += CORE
+
+SOURCES += uart.c
+
+
+HEADERS += uart.h
diff --git a/lib/src/lpc21XX/lpc21XX.pro b/lib/src/lpc21XX/lpc21XX.pro
new file mode 100644
--- /dev/null
+++ b/lib/src/lpc21XX/lpc21XX.pro
@@ -0,0 +1,3 @@
+TEMPLATE = dir
+SUBDIRS += CORE \
+		UART 
diff --git a/rules/lpc21XX-arm-noabi-gcc/LPC23xx.h b/rules/lpc21XX-arm-noabi-gcc/LPC23xx.h
new file mode 100644
--- /dev/null
+++ b/rules/lpc21XX-arm-noabi-gcc/LPC23xx.h
@@ -0,0 +1,1138 @@
+/*****************************************************************************
+ *
+ * Project          : lwIP Web
+ * Subproject       : 
+ * Name             : LPC23xx.h
+ * Function         : register definitions
+ * Designer         : K. Sterckx
+ * Creation date    : 22/01/2007
+ * Compiler         : GNU ARM
+ * Processor        : LPC23xx
+ * Last update      :
+ * Last updated by  :
+ * History          :
+ *
+ *****************************************************************************
+ *
+ * Hardware specific macro's and defines
+ *
+ ****************************************************************************/
+
+#ifndef __LPC23xx_H
+#define __LPC23xx_H
+
+/* Vectored Interrupt Controller (VIC) */
+#define VIC_BASE_ADDR	0xFFFFF000
+#define VICIRQStatus   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x000))
+#define VICFIQStatus   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x004))
+#define VICRawIntr     (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x008))
+#define VICIntSelect   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x00C))
+#define VICIntEnable   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x010))
+#define VICIntEnClr    (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x014))
+#define VICSoftInt     (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x018))
+#define VICSoftIntClr  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x01C))
+#define VICProtection  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x020))
+#define VICSWPrioMask  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x024))
+
+#define VICVectAddr0   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x100))
+#define VICVectAddr1   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x104))
+#define VICVectAddr2   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x108))
+#define VICVectAddr3   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x10C))
+#define VICVectAddr4   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x110))
+#define VICVectAddr5   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x114))
+#define VICVectAddr6   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x118))
+#define VICVectAddr7   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x11C))
+#define VICVectAddr8   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x120))
+#define VICVectAddr9   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x124))
+#define VICVectAddr10  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x128))
+#define VICVectAddr11  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x12C))
+#define VICVectAddr12  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x130))
+#define VICVectAddr13  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x134))
+#define VICVectAddr14  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x138))
+#define VICVectAddr15  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x13C))
+#define VICVectAddr16  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x140))
+#define VICVectAddr17  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x144))
+#define VICVectAddr18  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x148))
+#define VICVectAddr19  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x14C))
+#define VICVectAddr20  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x150))
+#define VICVectAddr21  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x154))
+#define VICVectAddr22  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x158))
+#define VICVectAddr23  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x15C))
+#define VICVectAddr24  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x160))
+#define VICVectAddr25  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x164))
+#define VICVectAddr26  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x168))
+#define VICVectAddr27  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x16C))
+#define VICVectAddr28  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x170))
+#define VICVectAddr29  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x174))
+#define VICVectAddr30  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x178))
+#define VICVectAddr31  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x17C))
+
+/* The name convention below is from previous LPC2000 family MCUs, in LPC230x,
+these registers are known as "VICVectPriority(x)". */
+#define VICVectCntl0   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x200))
+#define VICVectCntl1   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x204))
+#define VICVectCntl2   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x208))
+#define VICVectCntl3   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x20C))
+#define VICVectCntl4   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x210))
+#define VICVectCntl5   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x214))
+#define VICVectCntl6   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x218))
+#define VICVectCntl7   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x21C))
+#define VICVectCntl8   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x220))
+#define VICVectCntl9   (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x224))
+#define VICVectCntl10  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x228))
+#define VICVectCntl11  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x22C))
+#define VICVectCntl12  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x230))
+#define VICVectCntl13  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x234))
+#define VICVectCntl14  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x238))
+#define VICVectCntl15  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x23C))
+#define VICVectCntl16  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x240))
+#define VICVectCntl17  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x244))
+#define VICVectCntl18  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x248))
+#define VICVectCntl19  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x24C))
+#define VICVectCntl20  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x250))
+#define VICVectCntl21  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x254))
+#define VICVectCntl22  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x258))
+#define VICVectCntl23  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x25C))
+#define VICVectCntl24  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x260))
+#define VICVectCntl25  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x264))
+#define VICVectCntl26  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x268))
+#define VICVectCntl27  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x26C))
+#define VICVectCntl28  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x270))
+#define VICVectCntl29  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x274))
+#define VICVectCntl30  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x278))
+#define VICVectCntl31  (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x27C))
+
+#define VICVectAddr    (*(volatile unsigned int *)(VIC_BASE_ADDR + 0xF00))
+
+
+/* Pin Connect Block */
+#define PINSEL_BASE_ADDR	0xE002C000
+#define PINSEL0        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x00))
+#define PINSEL1        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x04))
+#define PINSEL2        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x08))
+#define PINSEL3        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x0C))
+#define PINSEL4        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x10))
+#define PINSEL5        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x14))
+#define PINSEL6        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x18))
+#define PINSEL7        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x1C))
+#define PINSEL8        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x20))
+#define PINSEL9        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x24))
+#define PINSEL10       (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x28))
+
+#define PINMODE0        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x40))
+#define PINMODE1        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x44))
+#define PINMODE2        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x48))
+#define PINMODE3        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x4C))
+#define PINMODE4        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x50))
+#define PINMODE5        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x54))
+#define PINMODE6        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x58))
+#define PINMODE7        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x5C))
+#define PINMODE8        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x60))
+#define PINMODE9        (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x64))
+
+/* General Purpose Input/Output (GPIO) */
+#define GPIO_BASE_ADDR		0xE0028000
+#define IOPIN0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x00))
+#define IOSET0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x04))
+#define IODIR0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x08))
+#define IOCLR0         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x0C))
+#define IOPIN1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x10))
+#define IOSET1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x14))
+#define IODIR1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x18))
+#define IOCLR1         (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x1C))
+
+/* GPIO Interrupt Registers */
+#define IO0_INT_EN_R    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x90)) 
+#define IO0_INT_EN_F    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x94))
+#define IO0_INT_STAT_R  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x84))
+#define IO0_INT_STAT_F  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x88))
+#define IO0_INT_CLR     (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x8C))
+
+#define IO2_INT_EN_R    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB0)) 
+#define IO2_INT_EN_F    (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB4))
+#define IO2_INT_STAT_R  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA4))
+#define IO2_INT_STAT_F  (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA8))
+#define IO2_INT_CLR     (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xAC))
+
+#define IO_INT_STAT     (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x80))
+
+#define PARTCFG_BASE_ADDR		0x3FFF8000
+#define PARTCFG        (*(volatile unsigned int *)(PARTCFG_BASE_ADDR + 0x00)) 
+
+/* Fast I/O setup */
+#define FIO_BASE_ADDR		0x3FFFC000
+#define FIO0DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x00)) 
+#define FIO0MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x10))
+#define FIO0PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x14))
+#define FIO0SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x18))
+#define FIO0CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x1C))
+
+#define FIO1DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x20)) 
+#define FIO1MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x30))
+#define FIO1PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x34))
+#define FIO1SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x38))
+#define FIO1CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x3C))
+
+#define FIO2DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x40)) 
+#define FIO2MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x50))
+#define FIO2PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x54))
+#define FIO2SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x58))
+#define FIO2CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x5C))
+
+#define FIO3DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x60)) 
+#define FIO3MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x70))
+#define FIO3PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x74))
+#define FIO3SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x78))
+#define FIO3CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x7C))
+
+#define FIO4DIR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x80)) 
+#define FIO4MASK       (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x90))
+#define FIO4PIN        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x94))
+#define FIO4SET        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x98))
+#define FIO4CLR        (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x9C))
+
+/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */
+#define FIO0DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x01)) 
+#define FIO1DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x21)) 
+#define FIO2DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x41)) 
+#define FIO3DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x61)) 
+#define FIO4DIR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x81)) 
+
+#define FIO0DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x02)) 
+#define FIO1DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x22)) 
+#define FIO2DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x42)) 
+#define FIO3DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x62)) 
+#define FIO4DIR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x82)) 
+
+#define FIO0DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x03)) 
+#define FIO1DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x23)) 
+#define FIO2DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x43)) 
+#define FIO3DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x63)) 
+#define FIO4DIR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x83)) 
+
+#define FIO0DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x04)) 
+#define FIO1DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x24)) 
+#define FIO2DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x44)) 
+#define FIO3DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x64)) 
+#define FIO4DIR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x84)) 
+
+#define FIO0DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) 
+#define FIO1DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) 
+#define FIO2DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) 
+#define FIO3DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) 
+#define FIO4DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) 
+
+#define FIO0DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) 
+#define FIO1DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) 
+#define FIO2DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) 
+#define FIO3DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) 
+#define FIO4DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) 
+
+#define FIO0MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x10)) 
+#define FIO1MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x30)) 
+#define FIO2MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x50)) 
+#define FIO3MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x70)) 
+#define FIO4MASK0      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x90)) 
+
+#define FIO0MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x11)) 
+#define FIO1MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x21)) 
+#define FIO2MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x51)) 
+#define FIO3MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x71)) 
+#define FIO4MASK1      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x91)) 
+
+#define FIO0MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x12)) 
+#define FIO1MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x32)) 
+#define FIO2MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x52)) 
+#define FIO3MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x72)) 
+#define FIO4MASK2      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x92)) 
+
+#define FIO0MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x13)) 
+#define FIO1MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x33)) 
+#define FIO2MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x53)) 
+#define FIO3MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x73)) 
+#define FIO4MASK3      (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x93)) 
+
+#define FIO0MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) 
+#define FIO1MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) 
+#define FIO2MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) 
+#define FIO3MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) 
+#define FIO4MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) 
+
+#define FIO0MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) 
+#define FIO1MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) 
+#define FIO2MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) 
+#define FIO3MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) 
+#define FIO4MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) 
+
+#define FIO0PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x14)) 
+#define FIO1PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x34)) 
+#define FIO2PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x54)) 
+#define FIO3PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x74)) 
+#define FIO4PIN0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x94)) 
+
+#define FIO0PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x15)) 
+#define FIO1PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x25)) 
+#define FIO2PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x55)) 
+#define FIO3PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x75)) 
+#define FIO4PIN1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x95)) 
+
+#define FIO0PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x16)) 
+#define FIO1PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x36)) 
+#define FIO2PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x56)) 
+#define FIO3PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x76)) 
+#define FIO4PIN2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x96)) 
+
+#define FIO0PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x17)) 
+#define FIO1PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x37)) 
+#define FIO2PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x57)) 
+#define FIO3PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x77)) 
+#define FIO4PIN3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x97)) 
+
+#define FIO0PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) 
+#define FIO1PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) 
+#define FIO2PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) 
+#define FIO3PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) 
+#define FIO4PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) 
+
+#define FIO0PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) 
+#define FIO1PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) 
+#define FIO2PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) 
+#define FIO3PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) 
+#define FIO4PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) 
+
+#define FIO0SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x18)) 
+#define FIO1SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x38)) 
+#define FIO2SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x58)) 
+#define FIO3SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x78)) 
+#define FIO4SET0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x98)) 
+
+#define FIO0SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x19)) 
+#define FIO1SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x29)) 
+#define FIO2SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x59)) 
+#define FIO3SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x79)) 
+#define FIO4SET1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x99)) 
+
+#define FIO0SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1A)) 
+#define FIO1SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3A)) 
+#define FIO2SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5A)) 
+#define FIO3SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7A)) 
+#define FIO4SET2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9A)) 
+
+#define FIO0SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1B)) 
+#define FIO1SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3B)) 
+#define FIO2SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5B)) 
+#define FIO3SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7B)) 
+#define FIO4SET3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9B)) 
+
+#define FIO0SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) 
+#define FIO1SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) 
+#define FIO2SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) 
+#define FIO3SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) 
+#define FIO4SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) 
+
+#define FIO0SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) 
+#define FIO1SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) 
+#define FIO2SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) 
+#define FIO3SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) 
+#define FIO4SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) 
+
+#define FIO0CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1C)) 
+#define FIO1CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3C)) 
+#define FIO2CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5C)) 
+#define FIO3CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7C)) 
+#define FIO4CLR0       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9C)) 
+
+#define FIO0CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1D)) 
+#define FIO1CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x2D)) 
+#define FIO2CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5D)) 
+#define FIO3CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7D)) 
+#define FIO4CLR1       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9D)) 
+
+#define FIO0CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1E)) 
+#define FIO1CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3E)) 
+#define FIO2CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5E)) 
+#define FIO3CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7E)) 
+#define FIO4CLR2       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9E)) 
+
+#define FIO0CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x1F)) 
+#define FIO1CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x3F)) 
+#define FIO2CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x5F)) 
+#define FIO3CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x7F)) 
+#define FIO4CLR3       (*(volatile unsigned char  *)(FIO_BASE_ADDR + 0x9F)) 
+
+#define FIO0CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) 
+#define FIO1CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) 
+#define FIO2CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) 
+#define FIO3CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) 
+#define FIO4CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) 
+
+#define FIO0CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) 
+#define FIO1CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) 
+#define FIO2CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) 
+#define FIO3CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) 
+#define FIO4CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) 
+
+
+/* System Control Block(SCB) modules include Memory Accelerator Module,
+Phase Locked Loop, VPB divider, Power Control, External Interrupt, 
+Reset, and Code Security/Debugging */
+#define SCB_BASE_ADDR	0xE01FC000
+
+/* Memory Accelerator Module (MAM) */
+#define MAMCR          (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x000))
+#define MAMTIM         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x004))
+#define MEMMAP         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x040))
+
+/* Phase Locked Loop (PLL) */
+#define PLLCON         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x080))
+#define PLLCFG         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x084))
+#define PLLSTAT        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x088))
+#define PLLFEED        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x08C))
+
+/* Power Control */
+#define PCON           (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C0))
+#define PCONP          (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C4))
+
+/* Clock Divider */
+#define APBDIV         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x100))
+#define CCLKCFG        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x104))
+#define USBCLKCFG      (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x108))
+#define CLKSRCSEL      (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x10C))
+#define PCLKSEL0       (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A8))
+#define PCLKSEL1       (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1AC))
+	
+/* External Interrupts */
+#define EXTINT         (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x140))
+#define INTWAKE        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x144))
+#define EXTMODE        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x148))
+#define EXTPOLAR       (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x14C))
+
+/* Reset, reset source identification */
+#define RSIR           (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x180))
+
+/* RSID, code security protection */
+#define CSPR           (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x184))
+
+/* AHB configuration */
+#define AHBCFG1        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x188))
+#define AHBCFG2        (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x18C))
+
+/* System Controls and Status */
+#define SCS            (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A0))
+
+/*MPMC(EMC) registers*/
+#define STATIC_MEM0_BASE		0x80000000
+#define STATIC_MEM1_BASE		0x81000000
+#define STATIC_MEM2_BASE		0x82000000
+#define STATIC_MEM3_BASE		0x83000000
+
+#define DYNAMIC_MEM0_BASE		0xA0000000
+#define DYNAMIC_MEM1_BASE		0xB0000000
+#define DYNAMIC_MEM2_BASE		0xC0000000
+#define DYNAMIC_MEM3_BASE		0xD0000000
+
+/* External Memory Controller (EMC) */
+#define EMC_BASE_ADDR		0xFFE08000
+#define EMC_CTRL       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x000))
+#define EMC_STAT       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x004))
+#define EMC_CONFIG     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x008))
+
+/* Dynamic RAM access registers */
+#define EMC_DYN_CTRL     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x020))
+#define EMC_DYN_RFSH     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x024))
+#define EMC_DYN_RD_CFG   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x028))
+#define EMC_DYN_RP       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x030))
+#define EMC_DYN_RAS      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x034))
+#define EMC_DYN_SREX     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x038))
+#define EMC_DYN_APR      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x03C))
+#define EMC_DYN_DAL      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x040))
+#define EMC_DYN_WR       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x044))
+#define EMC_DYN_RC       (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x048))
+#define EMC_DYN_RFC      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x04C))
+#define EMC_DYN_XSR      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x050))
+#define EMC_DYN_RRD      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x054))
+#define EMC_DYN_MRD      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x058))
+
+#define EMC_DYN_CFG0     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x100))
+#define EMC_DYN_RASCAS0  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x104))
+#define EMC_DYN_CFG1     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x140))
+#define EMC_DYN_RASCAS1  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x144))
+#define EMC_DYN_CFG2     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x160))
+#define EMC_DYN_RASCAS2  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x164))
+#define EMC_DYN_CFG3     (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x180))
+#define EMC_DYN_RASCAS3  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x184))
+
+/* static RAM access registers */
+#define EMC_STA_CFG0      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x200))
+#define EMC_STA_WAITWEN0  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x204))
+#define EMC_STA_WAITOEN0  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x208))
+#define EMC_STA_WAITRD0   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x20C))
+#define EMC_STA_WAITPAGE0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x210))
+#define EMC_STA_WAITWR0   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x214))
+#define EMC_STA_WAITTURN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x218))
+
+#define EMC_STA_CFG1      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x220))
+#define EMC_STA_WAITWEN1  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x224))
+#define EMC_STA_WAITOEN1  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x228))
+#define EMC_STA_WAITRD1   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x22C))
+#define EMC_STA_WAITPAGE1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x230))
+#define EMC_STA_WAITWR1   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x234))
+#define EMC_STA_WAITTURN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x238))
+
+#define EMC_STA_CFG2      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x240))
+#define EMC_STA_WAITWEN2  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x244))
+#define EMC_STA_WAITOEN2  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x248))
+#define EMC_STA_WAITRD2   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x24C))
+#define EMC_STA_WAITPAGE2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x250))
+#define EMC_STA_WAITWR2   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x254))
+#define EMC_STA_WAITTURN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x258))
+
+#define EMC_STA_CFG3      (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x260))
+#define EMC_STA_WAITWEN3  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x264))
+#define EMC_STA_WAITOEN3  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x268))
+#define EMC_STA_WAITRD3   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x26C))
+#define EMC_STA_WAITPAGE3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x270))
+#define EMC_STA_WAITWR3   (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x274))
+#define EMC_STA_WAITTURN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x278))
+
+#define EMC_STA_EXT_WAIT  (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x880))
+
+	
+/* Timer 0 */
+#define TMR0_BASE_ADDR		0xE0004000
+#define T0IR           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x00))
+#define T0TCR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x04))
+#define T0TC           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x08))
+#define T0PR           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x0C))
+#define T0PC           (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x10))
+#define T0MCR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x14))
+#define T0MR0          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x18))
+#define T0MR1          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x1C))
+#define T0MR2          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x20))
+#define T0MR3          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x24))
+#define T0CCR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x28))
+#define T0CR0          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x2C))
+#define T0CR1          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x30))
+#define T0CR2          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x34))
+#define T0CR3          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x38))
+#define T0EMR          (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x3C))
+#define T0CTCR         (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x70))
+
+/* Timer 1 */
+#define TMR1_BASE_ADDR		0xE0008000
+#define T1IR           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x00))
+#define T1TCR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x04))
+#define T1TC           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x08))
+#define T1PR           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x0C))
+#define T1PC           (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x10))
+#define T1MCR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x14))
+#define T1MR0          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x18))
+#define T1MR1          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x1C))
+#define T1MR2          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x20))
+#define T1MR3          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x24))
+#define T1CCR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x28))
+#define T1CR0          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x2C))
+#define T1CR1          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x30))
+#define T1CR2          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x34))
+#define T1CR3          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x38))
+#define T1EMR          (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x3C))
+#define T1CTCR         (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x70))
+
+/* Timer 2 */
+#define TMR2_BASE_ADDR		0xE0070000
+#define T2IR           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x00))
+#define T2TCR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x04))
+#define T2TC           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x08))
+#define T2PR           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x0C))
+#define T2PC           (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x10))
+#define T2MCR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x14))
+#define T2MR0          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x18))
+#define T2MR1          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x1C))
+#define T2MR2          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x20))
+#define T2MR3          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x24))
+#define T2CCR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x28))
+#define T2CR0          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x2C))
+#define T2CR1          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x30))
+#define T2CR2          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x34))
+#define T2CR3          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x38))
+#define T2EMR          (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x3C))
+#define T2CTCR         (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x70))
+
+/* Timer 3 */
+#define TMR3_BASE_ADDR		0xE0074000
+#define T3IR           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x00))
+#define T3TCR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x04))
+#define T3TC           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x08))
+#define T3PR           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x0C))
+#define T3PC           (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x10))
+#define T3MCR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x14))
+#define T3MR0          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x18))
+#define T3MR1          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x1C))
+#define T3MR2          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x20))
+#define T3MR3          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x24))
+#define T3CCR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x28))
+#define T3CR0          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x2C))
+#define T3CR1          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x30))
+#define T3CR2          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x34))
+#define T3CR3          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x38))
+#define T3EMR          (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x3C))
+#define T3CTCR         (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x70))
+
+
+/* Pulse Width Modulator (PWM) */
+#define PWM0_BASE_ADDR		0xE0014000
+#define PWM0IR          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x00))
+#define PWM0TCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x04))
+#define PWM0TC          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x08))
+#define PWM0PR          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x0C))
+#define PWM0PC          (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x10))
+#define PWM0MCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x14))
+#define PWM0MR0         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x18))
+#define PWM0MR1         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x1C))
+#define PWM0MR2         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x20))
+#define PWM0MR3         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x24))
+#define PWM0CCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x28))
+#define PWM0CR0         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x2C))
+#define PWM0CR1         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x30))
+#define PWM0CR2         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x34))
+#define PWM0CR3         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x38))
+#define PWM0EMR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x3C))
+#define PWM0MR4         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x40))
+#define PWM0MR5         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x44))
+#define PWM0MR6         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x48))
+#define PWM0PCR         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x4C))
+#define PWM0LER         (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x50))
+#define PWM0CTCR        (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x70))
+
+#define PWM1_BASE_ADDR		0xE0018000
+#define PWM1IR          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x00))
+#define PWM1TCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x04))
+#define PWM1TC          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x08))
+#define PWM1PR          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x0C))
+#define PWM1PC          (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x10))
+#define PWM1MCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x14))
+#define PWM1MR0         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x18))
+#define PWM1MR1         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x1C))
+#define PWM1MR2         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x20))
+#define PWM1MR3         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x24))
+#define PWM1CCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x28))
+#define PWM1CR0         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x2C))
+#define PWM1CR1         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x30))
+#define PWM1CR2         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x34))
+#define PWM1CR3         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x38))
+#define PWM1EMR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x3C))
+#define PWM1MR4         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x40))
+#define PWM1MR5         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x44))
+#define PWM1MR6         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x48))
+#define PWM1PCR         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x4C))
+#define PWM1LER         (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x50))
+#define PWM1CTCR        (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x70))
+
+
+/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
+#define UART0_BASE_ADDR		0xE000C000
+#define U0RBR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
+#define U0THR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
+#define U0DLL          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00))
+#define U0DLM          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))
+#define U0IER          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04))
+#define U0IIR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))
+#define U0FCR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08))
+#define U0LCR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x0C))
+#define U0LSR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x14))
+#define U0SCR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x1C))
+#define U0ACR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x20))
+#define U0ICR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x24))
+#define U0FDR          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x28))
+#define U0TER          (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x30))
+
+/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
+#define UART1_BASE_ADDR		0xE0010000
+#define U1RBR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
+#define U1THR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
+#define U1DLL          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00))
+#define U1DLM          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))
+#define U1IER          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04))
+#define U1IIR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))
+#define U1FCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08))
+#define U1LCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x0C))
+#define U1MCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x10))
+#define U1LSR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x14))
+#define U1MSR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x18))
+#define U1SCR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x1C))
+#define U1ACR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x20))
+#define U1FDR          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x28))
+#define U1TER          (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x30))
+
+/* Universal Asynchronous Receiver Transmitter 2 (UART2) */
+#define UART2_BASE_ADDR		0xE0078000
+#define U2RBR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
+#define U2THR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
+#define U2DLL          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00))
+#define U2DLM          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))
+#define U2IER          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04))
+#define U2IIR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))
+#define U2FCR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08))
+#define U2LCR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x0C))
+#define U2LSR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x14))
+#define U2SCR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x1C))
+#define U2ACR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x20))
+#define U2ICR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x24))
+#define U2FDR          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x28))
+#define U2TER          (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x30))
+
+/* Universal Asynchronous Receiver Transmitter 3 (UART3) */
+#define UART3_BASE_ADDR		0xE007C000
+#define U3RBR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
+#define U3THR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
+#define U3DLL          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00))
+#define U3DLM          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))
+#define U3IER          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04))
+#define U3IIR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))
+#define U3FCR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08))
+#define U3LCR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x0C))
+#define U3LSR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x14))
+#define U3SCR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x1C))
+#define U3ACR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x20))
+#define U3ICR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x24))
+#define U3FDR          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x28))
+#define U3TER          (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x30))
+
+/* I2C Interface 0 */
+#define I2C0_BASE_ADDR		0xE001C000
+#define I20CONSET      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))
+#define I20STAT        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))
+#define I20DAT         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))
+#define I20ADR         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))
+#define I20SCLH        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))
+#define I20SCLL        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))
+#define I20CONCLR      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))
+//Slightly different naming
+#define I2C0CONSET      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00))
+#define I2C0STAT        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04))
+#define I2C0DAT         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08))
+#define I2C0ADR         (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C))
+#define I2C0SCLH        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10))
+#define I2C0SCLL        (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14))
+#define I2C0CONCLR      (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18))
+
+
+/* I2C Interface 1 */
+#define I2C1_BASE_ADDR		0xE005C000
+#define I21CONSET      (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x00))
+#define I21STAT        (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x04))
+#define I21DAT         (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x08))
+#define I21ADR         (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x0C))
+#define I21SCLH        (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x10))
+#define I21SCLL        (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x14))
+#define I21CONCLR      (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x18))
+
+/* I2C Interface 2 */
+#define I2C2_BASE_ADDR		0xE0080000
+#define I22CONSET      (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x00))
+#define I22STAT        (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x04))
+#define I22DAT         (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x08))
+#define I22ADR         (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x0C))
+#define I22SCLH        (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x10))
+#define I22SCLL        (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x14))
+#define I22CONCLR      (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x18))
+
+/* SPI0 (Serial Peripheral Interface 0) */
+#define SPI0_BASE_ADDR		0xE0020000
+#define S0SPCR         (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x00))
+#define S0SPSR         (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x04))
+#define S0SPDR         (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x08))
+#define S0SPCCR        (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x0C))
+#define S0SPINT        (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x1C))
+
+/* SSP0 Controller */
+#define SSP0_BASE_ADDR		0xE0068000
+#define SSP0CR0        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x00))
+#define SSP0CR1        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x04))
+#define SSP0DR         (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x08))
+#define SSP0SR         (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x0C))
+#define SSP0CPSR       (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x10))
+#define SSP0IMSC       (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x14))
+#define SSP0RIS        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x18))
+#define SSP0MIS        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x1C))
+#define SSP0ICR        (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x20))
+#define SSP0DMACR      (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x24))
+
+/* SSP1 Controller */
+#define SSP1_BASE_ADDR		0xE0030000
+#define SSP1CR0        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x00))
+#define SSP1CR1        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x04))
+#define SSP1DR         (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x08))
+#define SSP1SR         (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x0C))
+#define SSP1CPSR       (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x10))
+#define SSP1IMSC       (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x14))
+#define SSP1RIS        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x18))
+#define SSP1MIS        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x1C))
+#define SSP1ICR        (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x20))
+#define SSP1DMACR      (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x24))
+
+
+/* Real Time Clock */
+#define RTC_BASE_ADDR		0xE0024000
+#define RTC_ILR         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x00))
+#define RTC_CTC         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x04))
+#define RTC_CCR         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x08))
+#define RTC_CIIR        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x0C))
+#define RTC_AMR         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x10))
+#define RTC_CTIME0      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x14))
+#define RTC_CTIME1      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x18))
+#define RTC_CTIME2      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x1C))
+#define RTC_SEC         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x20))
+#define RTC_MIN         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x24))
+#define RTC_HOUR        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x28))
+#define RTC_DOM         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x2C))
+#define RTC_DOW         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x30))
+#define RTC_DOY         (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x34))
+#define RTC_MONTH       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x38))
+#define RTC_YEAR        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x3C))
+#define RTC_CISS        (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x40))
+#define RTC_ALSEC       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x60))
+#define RTC_ALMIN       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x64))
+#define RTC_ALHOUR      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x68))
+#define RTC_ALDOM       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x6C))
+#define RTC_ALDOW       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x70))
+#define RTC_ALDOY       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x74))
+#define RTC_ALMON       (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x78))
+#define RTC_ALYEAR      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x7C))
+#define RTC_PREINT      (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x80))
+#define RTC_PREFRAC     (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x84))
+
+
+/* A/D Converter 0 (AD0) */
+#define AD0_BASE_ADDR		0xE0034000
+#define AD0CR          (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x00))
+#define AD0GDR         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x04))
+#define AD0INTEN       (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x0C))
+#define AD0DR0         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x10))
+#define AD0DR1         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x14))
+#define AD0DR2         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x18))
+#define AD0DR3         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x1C))
+#define AD0DR4         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x20))
+#define AD0DR5         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x24))
+#define AD0DR6         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x28))
+#define AD0DR7         (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x2C))
+#define AD0STAT        (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x30))
+
+
+/* D/A Converter */
+#define DAC_BASE_ADDR		0xE006C000
+#define DACR           (*(volatile unsigned int *)(DAC_BASE_ADDR + 0x00))
+
+
+/* Watchdog */
+#define WDG_BASE_ADDR		0xE0000000
+#define WDMOD          (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x00))
+#define WDTC           (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x04))
+#define WDFEED         (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x08))
+#define WDTV           (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x0C))
+#define WDCLKSEL       (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x10))
+
+/* CAN CONTROLLERS AND ACCEPTANCE FILTER */
+#define CAN_ACCEPT_BASE_ADDR		0xE003C000
+#define CAN_AFMR		(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x00))  	
+#define CAN_SFF_SA 		(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x04))  	
+#define CAN_SFF_GRP_SA 	(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x08))
+#define CAN_EFF_SA 		(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x0C))
+#define CAN_EFF_GRP_SA 	(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x10))  	
+#define CAN_EOT 		(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x14))
+#define CAN_LUT_ERR_ADR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x18))  	
+#define CAN_LUT_ERR 	(*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x1C))
+
+#define CAN_CENTRAL_BASE_ADDR		0xE0040000  	
+#define CAN_TX_SR 	(*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x00))  	
+#define CAN_RX_SR 	(*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x04))  	
+#define CAN_MSR 	(*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x08))
+
+#define CAN1_BASE_ADDR		0xE0044000
+#define CAN1MOD 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x00))  	
+#define CAN1CMR 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x04))  	
+#define CAN1GSR 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x08))  	
+#define CAN1ICR 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x0C))  	
+#define CAN1IER 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x10))
+#define CAN1BTR 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x14))  	
+#define CAN1EWL 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x18))  	
+#define CAN1SR 		(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x1C))  	
+#define CAN1RFS 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x20))  	
+#define CAN1RID 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x24))
+#define CAN1RDA 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x28))  	
+#define CAN1RDB 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x2C))
+  	
+#define CAN1TFI1 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x30))  	
+#define CAN1TID1 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x34))  	
+#define CAN1TDA1 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x38))
+#define CAN1TDB1 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x3C))  	
+#define CAN1TFI2 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x40))  	
+#define CAN1TID2 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x44))  	
+#define CAN1TDA2 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x48))  	
+#define CAN1TDB2 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x4C))
+#define CAN1TFI3 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x50))  	
+#define CAN1TID3 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x54))  	
+#define CAN1TDA3 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x58))  	
+#define CAN1TDB3 	(*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x5C))
+
+#define CAN2_BASE_ADDR		0xE0048000
+#define CAN2MOD 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x00))  	
+#define CAN2CMR 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x04))  	
+#define CAN2GSR 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x08))  	
+#define CAN2ICR 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x0C))  	
+#define CAN2IER 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x10))
+#define CAN2BTR 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x14))  	
+#define CAN2EWL 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x18))  	
+#define CAN2SR 		(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x1C))  	
+#define CAN2RFS 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x20))  	
+#define CAN2RID 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x24))
+#define CAN2RDA 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x28))  	
+#define CAN2RDB 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x2C))
+  	
+#define CAN2TFI1 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x30))  	
+#define CAN2TID1 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x34))  	
+#define CAN2TDA1 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x38))
+#define CAN2TDB1 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x3C))  	
+#define CAN2TFI2 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x40))  	
+#define CAN2TID2 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x44))  	
+#define CAN2TDA2 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x48))  	
+#define CAN2TDB2 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x4C))
+#define CAN2TFI3 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x50))  	
+#define CAN2TID3 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x54))  	
+#define CAN2TDA3 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x58))  	
+#define CAN2TDB3 	(*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x5C))
+
+
+/* MultiMedia Card Interface(MCI) Controller */
+#define MCI_BASE_ADDR		0xE008C000
+#define MCI_POWER      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x00))
+#define MCI_CLOCK      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x04))
+#define MCI_ARGUMENT   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x08))
+#define MCI_COMMAND    (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x0C))
+#define MCI_RESP_CMD   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x10))
+#define MCI_RESP0      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x14))
+#define MCI_RESP1      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x18))
+#define MCI_RESP2      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x1C))
+#define MCI_RESP3      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x20))
+#define MCI_DATA_TMR   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x24))
+#define MCI_DATA_LEN   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x28))
+#define MCI_DATA_CTRL  (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x2C))
+#define MCI_DATA_CNT   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x30))
+#define MCI_STATUS     (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x34))
+#define MCI_CLEAR      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x38))
+#define MCI_MASK0      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x3C))
+#define MCI_MASK1      (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x40))
+#define MCI_FIFO_CNT   (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x48))
+#define MCI_FIFO       (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x80))
+
+
+/* I2S Interface Controller (I2S) */
+#define I2S_BASE_ADDR		0xE0088000
+#define I2S_DAO        (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x00))
+#define I2S_DAI        (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x04))
+#define I2S_TX_FIFO    (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x08))
+#define I2S_RX_FIFO    (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x0C))
+#define I2S_STATE      (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x10))
+#define I2S_DMA1       (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x14))
+#define I2S_DMA2       (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x18))
+#define I2S_IRQ        (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x1C))
+#define I2S_TXRATE     (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x20))
+#define I2S_RXRATE     (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x24))
+
+
+/* General-purpose DMA Controller */
+#define DMA_BASE_ADDR		0xFFE04000
+#define GPDMA_INT_STAT         (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x000))
+#define GPDMA_INT_TCSTAT       (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x004))
+#define GPDMA_INT_TCCLR        (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x008))
+#define GPDMA_INT_ERR_STAT     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x00C))
+#define GPDMA_INT_ERR_CLR      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x010))
+#define GPDMA_RAW_INT_TCSTAT   (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x014))
+#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x018))
+#define GPDMA_ENABLED_CHNS     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x01C))
+#define GPDMA_SOFT_BREQ        (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x020))
+#define GPDMA_SOFT_SREQ        (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x024))
+#define GPDMA_SOFT_LBREQ       (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x028))
+#define GPDMA_SOFT_LSREQ       (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x02C))
+#define GPDMA_CONFIG           (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x030))
+#define GPDMA_SYNC             (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x034))
+
+/* DMA channel 0 registers */
+#define GPDMA_CH0_SRC      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x100))
+#define GPDMA_CH0_DEST     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x104))
+#define GPDMA_CH0_LLI      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x108))
+#define GPDMA_CH0_CTRL     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x10C))
+#define GPDMA_CH0_CFG      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x110))
+
+/* DMA channel 1 registers */
+#define GPDMA_CH1_SRC      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x120))
+#define GPDMA_CH1_DEST     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x124))
+#define GPDMA_CH1_LLI      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x128))
+#define GPDMA_CH1_CTRL     (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x12C))
+#define GPDMA_CH1_CFG      (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x130))
+
+
+/* USB Controller */
+#define USB_INT_BASE_ADDR	0xE01FC1C0
+#define USB_BASE_ADDR		0xFFE0C200		/* USB Base Address */
+
+#define USB_INT_STAT    (*(volatile unsigned int *)(USB_INT_BASE_ADDR + 0x00))
+
+/* USB Device Interrupt Registers */
+#define DEV_INT_STAT    (*(volatile unsigned int *)(USB_BASE_ADDR + 0x00))
+#define DEV_INT_EN      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x04))
+#define DEV_INT_CLR     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x08))
+#define DEV_INT_SET     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x0C))
+#define DEV_INT_PRIO    (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2C))
+
+/* USB Device Endpoint Interrupt Registers */
+#define EP_INT_STAT     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x30))
+#define EP_INT_EN       (*(volatile unsigned int *)(USB_BASE_ADDR + 0x34))
+#define EP_INT_CLR      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x38))
+#define EP_INT_SET      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x3C))
+#define EP_INT_PRIO     (*(volatile unsigned int *)(USB_BASE_ADDR + 0x40))
+
+/* USB Device Endpoint Realization Registers */
+#define REALIZE_EP      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x44))
+#define EP_INDEX        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x48))
+#define MAXPACKET_SIZE  (*(volatile unsigned int *)(USB_BASE_ADDR + 0x4C))
+
+/* USB Device Command Reagisters */
+#define CMD_CODE        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x10))
+#define CMD_DATA        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x14))
+
+/* USB Device Data Transfer Registers */
+#define RX_DATA         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x18))
+#define TX_DATA         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x1C))
+#define RX_PLENGTH      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x20))
+#define TX_PLENGTH      (*(volatile unsigned int *)(USB_BASE_ADDR + 0x24))
+#define USB_CTRL        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x28))
+
+/* USB Device DMA Registers */
+#define DMA_REQ_STAT        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x50))
+#define DMA_REQ_CLR         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x54))
+#define DMA_REQ_SET         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x58))
+#define UDCA_HEAD           (*(volatile unsigned int *)(USB_BASE_ADDR + 0x80))
+#define EP_DMA_STAT         (*(volatile unsigned int *)(USB_BASE_ADDR + 0x84))
+#define EP_DMA_EN           (*(volatile unsigned int *)(USB_BASE_ADDR + 0x88))
+#define EP_DMA_DIS          (*(volatile unsigned int *)(USB_BASE_ADDR + 0x8C))
+#define DMA_INT_STAT        (*(volatile unsigned int *)(USB_BASE_ADDR + 0x90))
+#define DMA_INT_EN          (*(volatile unsigned int *)(USB_BASE_ADDR + 0x94))
+#define EOT_INT_STAT        (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA0))
+#define EOT_INT_CLR         (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA4))
+#define EOT_INT_SET         (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA8))
+#define NDD_REQ_INT_STAT    (*(volatile unsigned int *)(USB_BASE_ADDR + 0xAC))
+#define NDD_REQ_INT_CLR     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB0))
+#define NDD_REQ_INT_SET     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB4))
+#define SYS_ERR_INT_STAT    (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB8))
+#define SYS_ERR_INT_CLR     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xBC))
+#define SYS_ERR_INT_SET     (*(volatile unsigned int *)(USB_BASE_ADDR + 0xC0))
+
+
+/* USB Host Controller */
+#define USBHC_BASE_ADDR		0xFFE0C000
+#define HC_REVISION         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x00))
+#define HC_CONTROL          (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x04))
+#define HC_CMD_STAT         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x08))
+#define HC_INT_STAT         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x0C))
+#define HC_INT_EN           (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x10))
+#define HC_INT_DIS          (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x14))
+#define HC_HCCA             (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x18))
+#define HC_PERIOD_CUR_ED    (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x1C))
+#define HC_CTRL_HEAD_ED     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x20))
+#define HC_CTRL_CUR_ED      (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x24))
+#define HC_BULK_HEAD_ED     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x28))
+#define HC_BULK_CUR_ED      (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x2C))
+#define HC_DONE_HEAD        (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x30))
+#define HC_FM_INTERVAL      (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x34))
+#define HC_FM_REMAINING     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x38))
+#define HC_FM_NUMBER        (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x3C))
+#define HC_PERIOD_START     (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x40))
+#define HC_LS_THRHLD        (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x44))
+#define HC_RH_DESCA         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x48))
+#define HC_RH_DESCB         (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x4C))
+#define HC_RH_STAT          (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x50))
+#define HC_RH_PORT_STAT1    (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x54))
+#define HC_RH_PORT_STAT2    (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x58))
+
+/* USB OTG Controller */
+#define USBOTG_BASE_ADDR	0xFFE0C100
+#define OTG_INT_STAT        (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x00))
+#define OTG_INT_EN          (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x04))
+#define OTG_INT_SET         (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x08))
+#define OTG_INT_CLR         (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x0C))
+#define OTG_STAT_CTRL       (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x10))
+#define OTG_TIMER           (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x14))
+
+#define USBOTG_I2C_BASE_ADDR	0xFFE0C300
+#define OTG_I2C_RX          (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00))
+#define OTG_I2C_TX          (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00))
+#define OTG_I2C_STS         (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x04))
+#define OTG_I2C_CTL         (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x08))
+#define OTG_I2C_CLKHI       (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x0C))
+#define OTG_I2C_CLKLO       (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x10))
+
+#define USBOTG_CLK_BASE_ADDR	0xFFE0CFF0
+#define OTG_CLK_CTRL        (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x04))
+#define OTG_CLK_STAT        (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x08))
+
+
+/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */
+#define MAC_BASE_ADDR		0xFFE00000 /* AHB Peripheral # 0 */
+#define MAC_MAC1            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */
+#define MAC_MAC2            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */
+#define MAC_IPGT            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */
+#define MAC_IPGR            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */
+#define MAC_CLRT            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */
+#define MAC_MAXF            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */
+#define MAC_SUPP            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */
+#define MAC_TEST            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */
+#define MAC_MCFG            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */
+#define MAC_MCMD            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */
+#define MAC_MADR            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */
+#define MAC_MWTD            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */
+#define MAC_MRDD            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */
+#define MAC_MIND            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */
+
+#define MAC_SA0             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */
+#define MAC_SA1             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */
+#define MAC_SA2             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */
+
+#define MAC_COMMAND         (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x100)) /* Command reg */
+#define MAC_STATUS          (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */
+#define MAC_RXDESCRIPTOR    (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */
+#define MAC_RXSTATUS        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */
+#define MAC_RXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */
+#define MAC_RXPRODUCEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */
+#define MAC_RXCONSUMEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */
+#define MAC_TXDESCRIPTOR    (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */
+#define MAC_TXSTATUS        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */
+#define MAC_TXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */
+#define MAC_TXPRODUCEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */
+#define MAC_TXCONSUMEINDEX  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */
+
+#define MAC_TSV0            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */
+#define MAC_TSV1            (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */
+#define MAC_RSV             (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */
+
+#define MAC_FLOWCONTROLCNT  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */
+#define MAC_FLOWCONTROLSTS  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */
+
+#define MAC_RXFILTERCTRL    (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */
+#define MAC_RXFILTERWOLSTS  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */
+#define MAC_RXFILTERWOLCLR  (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */
+
+#define MAC_HASHFILTERL     (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */
+#define MAC_HASHFILTERH     (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */
+
+#define MAC_INTSTATUS       (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */
+#define MAC_INTENABLE       (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg  */
+#define MAC_INTCLEAR        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */
+#define MAC_INTSET          (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */
+
+#define MAC_POWERDOWN       (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */
+#define MAC_MODULEID        (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */
+
+
+#endif  /* __LPC23xx_H */
+
diff --git a/rules/lpc21XX-arm-noabi-gcc/lpc2103_ram.ld b/rules/lpc21XX-arm-noabi-gcc/lpc2103_ram.ld
new file mode 100644
--- /dev/null
+++ b/rules/lpc21XX-arm-noabi-gcc/lpc2103_ram.ld
@@ -0,0 +1,49 @@
+ENTRY(_startup)
+
+MEMORY
+{
+	RAM (rw) : ORIGIN = 0x40000200, LENGTH = (0x00010000 - 0x00000200 - 0x20 - 0x100)
+}
+
+SECTIONS
+{
+	.text :
+	{
+		_text = .;
+		*startup.o (.text)
+		*(.text)
+		*(.glue_7)
+		*(.glue_7t)
+	} > RAM
+
+	. = ALIGN(4);
+	_etext = .;
+
+	.rodata :
+	{
+		_rodata = . ;
+		*(.rodata)
+	} > RAM
+
+	. = ALIGN(4);
+	_erodata = .;
+
+	.data :
+	{
+		_data = . ;
+		*(.data)
+	} > RAM
+
+	. = ALIGN(4);
+	_edata = .;
+
+	.bss :
+	{
+		__bss_start = .;
+		*(.bss)
+	} > RAM
+
+	. = ALIGN(4);
+	__bss_end = . ;
+}
+_end = .;
diff --git a/rules/lpc21XX-arm-noabi-gcc/ramstartup-1.S b/rules/lpc21XX-arm-noabi-gcc/ramstartup-1.S
new file mode 100644
--- /dev/null
+++ b/rules/lpc21XX-arm-noabi-gcc/ramstartup-1.S
@@ -0,0 +1,12 @@
+.text
+.global	_startup
+.func	_startup
+_startup:
+	mov	r0, #0
+	mov	r1, #0
+	ldr	lr, =__back
+	b	main
+__back:
+	b	__back
+.endfunc
+.end
diff --git a/rules/lpc21XX-arm-noabi-gcc/rules.mk b/rules/lpc21XX-arm-noabi-gcc/rules.mk
new file mode 100644
--- /dev/null
+++ b/rules/lpc21XX-arm-noabi-gcc/rules.mk
@@ -0,0 +1,211 @@
+#/*------------------------------------------------------------------------------
+#--  This file is a part of the libuc, microcontroler library
+#--  Copyright (C) 2011, Alexis Jeandet
+#--
+#--  This program is free software; you can redistribute it and/or modify
+#--  it under the terms of the GNU General Public License as published by
+#--  the Free Software Foundation; either version 3 of the License, or
+#--  (at your option) any later version.
+#--
+#--  This program is distributed in the hope that it will be useful,
+#--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#--  GNU General Public License for more details.
+#--
+#--  You should have received a copy of the GNU General Public License
+#--  along with this program; if not, write to the Free Software
+#--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+#-------------------------------------------------------------------------------
+#--                 Author : Alexis Jeandet
+#--                   Mail : alexis.jeandet@gmail.com
+#-------------------------------------------------------------------------------*/
+
+#---------------------------------------------------------------------------------
+#       GCC EXECUTABLES
+#---------------------------------------------------------------------------------
+LIBUC_PREFIX = arm-none-eabi-
+LIBUC_CC  = $(LIBUC_PREFIX)gcc
+LIBUC_CXX = $(LIBUC_PREFIX)g++
+LIBUC_AR  = $(LIBUC_PREFIX)ar
+LIBUC_AS  = $(LIBUC_PREFIX)as
+LIBUC_LD  = $(LIBUC_PREFIX)ld
+LIBUC_SIZE = $(LIBUC_PREFIX)size
+LIBUC_STRIP = $(LIBUC_PREFIX)strip -s
+LIBUC_READELF = $(LIBUC_PREFIX)readelf
+LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy
+LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump
+
+
+
+#---------------------------------------------------------------------------------
+#       GCC FLAGS
+#---------------------------------------------------------------------------------
+LIBUC_FMCU              = -mcpu=arm7tdmi
+LIBUC_CFLAGS            = $(LIBUC_FMCU)
+LIBUC_CFLAGS            = -g -gdwarf-2  $(LIBUC_FMCU)
+LIBUC_CFLAGS   		+= -Wall -Wextra -Wundef -Wcast-align
+LIBUC_LDFLAGS  		= --gc-sections
+LIBUC_ODFLAGS  		= -x --syms
+LIBUC_CPFLAGS		= 
+LIBUC_CFLAGS_WARN_ON	= -Wall
+LIBUC_CFLAGS_WARN_OFF	= -w
+LIBUC_CFLAGS_RELEASE	= -O2
+LIBUC_CFLAGS_DEBUG	= -g
+LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g
+LIBUC_CFLAGS_STATIC_LIB	= -fPIC
+LIBUC_CFLAGS_SOFT_FPU	= -msoft-float
+LIBUC_CFLAGS_HARD_FPU	=
+
+LIBUC_CXXFLAGS          = $(LIBUC_FMCU)
+LIBUC_CXXFLAGS         += -g -gdwarf-2 $(LIBUC_FMCU)
+LIBUC_CXXFLAGS         += -Wall -Wextra -Wundef -Wcast-align
+LIBUC_CXXFLAGS_WARN_ON	= -Wall
+LIBUC_CXXFLAGS_WARN_OFF	= -w
+LIBUC_CXXFLAGS_RELEASE	= -O2
+LIBUC_CXXFLAGS_DEBUG	= -g
+LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g
+LIBUC_CXXFLAGS_STATIC_LIB = -fPIC
+LIBUC_CXXFLAGS_SOFT_FPU	= -msoft-float
+LIBUC_CXXFLAGS_HARD_FPU	=
+
+#---------------------------------------------------------------------------------
+#       LIBRARY DEFINITIONS
+#---------------------------------------------------------------------------------
+
+LIBUC_LIBS		=
+LIBUC_LIBS_CORE         = -static -lcore
+LIBUC_LIBS_UCSTRINGS    = -static -lucstrings
+LIBUC_LIBS_UART         = -static -luart
+LIBUC_LIBS_SPI          = -static -lspi
+LIBUC_LIBS_SSP          = -static -lssp
+LIBUC_LIBS_IIC          = -static -liic
+LIBUC_LIBS_ADC          = -static -ladc
+LIBUC_LIBS_24LC0X       = -static -l24lc0X
+LIBUC_LIBS_SDCARD       = -static -lsdcard
+LIBUC_LIBS_BLKDEVICE    = -static -lblkdevice
+LIBUC_LIBS_VS10XX       = -static -lvs10XX
+
+LIBUC_LIBS_DIR              = $(LIBUC)/lib/bin/lpc21XX
+LIBUC_LIBS_DIR_CORE         = $(LIBUC_LIBS_DIR)/CORE
+LIBUC_LIBS_DIR_UCSTRINGS    = $(LIBUC_LIBS_DIR)/STRINGS/$(ARCH)
+LIBUC_LIBS_DIR_UART         = $(LIBUC_LIBS_DIR)/UART
+LIBUC_LIBS_DIR_SPI          = $(LIBUC_LIBS_DIR)/SPI
+LIBUC_LIBS_DIR_SSP          = $(LIBUC_LIBS_DIR)/SSP
+LIBUC_LIBS_DIR_IIC          = $(LIBUC_LIBS_DIR)/IIC
+LIBUC_LIBS_DIR_ADC          = $(LIBUC_LIBS_DIR)/ADC
+LIBUC_LIBS_DIR_24LC0X       = $(LIBUC_LIBS_DIR)/24LCXX/24LC0X
+LIBUC_LIBS_DIR_SDCARD       = $(LIBUC_LIBS_DIR)/SDCARD
+LIBUC_LIBS_DIR_VS10XX       = $(LIBUC_LIBS_DIR)/VS10XX
+LIBUC_LIBS_DIR_BLKDEVICE    = $(LIBUC_LIBS_DIR)/BLKDEVICE
+
+LIBUC_LIBS_DIR_CORE_CMD         = -L $(LIBUC_LIBS_DIR_CORE)
+LIBUC_LIBS_DIR_UCSTRINGS_CMD    = -L $(LIBUC_LIBS_DIR_UCSTRINGS)
+LIBUC_LIBS_DIR_UART_CMD         = -L $(LIBUC_LIBS_DIR_UART)
+LIBUC_LIBS_DIR_SPI_CMD          = -L $(LIBUC_LIBS_DIR_SPI)
+LIBUC_LIBS_DIR_SSP_CMD          = -L $(LIBUC_LIBS_DIR_SSP)
+LIBUC_LIBS_DIR_IIC_CMD          = -L $(LIBUC_LIBS_DIR_IIC)
+LIBUC_LIBS_DIR_ADC_CMD          = -L $(LIBUC_LIBS_DIR_ADC)
+LIBUC_LIBS_DIR_24LC0X_CMD       = -L $(LIBUC_LIBS_DIR_24LC0X)
+LIBUC_LIBS_DIR_SDCARD_CMD       = -L $(LIBUC_LIBS_DIR_SDCARD)
+LIBUC_LIBS_DIR_VS10XX_CMD       = -L $(LIBUC_LIBS_DIR_VS10XX)
+LIBUC_LIBS_DIR_BLKDEVICE_CMD    = -L $(LIBUC_LIBS_DIR_BLKDEVICE)
+
+LIBUC_INC_DIR              = $(LIBUC)/lib/includes/lpc21XX
+LIBUC_INC_DIR_CORE         = $(LIBUC_INC_DIR)/CORE
+LIBUC_INC_DIR_UCSTRINGS    = $(LIBUC_INC_DIR)/STRINGS/$(ARCH)
+LIBUC_INC_DIR_UART         = $(LIBUC_INC_DIR)/UART
+LIBUC_INC_DIR_SPI          = $(LIBUC_INC_DIR)/SPI
+LIBUC_INC_DIR_SSP          = $(LIBUC_INC_DIR)/SSP
+LIBUC_INC_DIR_IIC          = $(LIBUC_INC_DIR)/IIC
+LIBUC_INC_DIR_ADC          = $(LIBUC_INC_DIR)/ADC
+LIBUC_INC_DIR_24LC0X       = $(LIBUC_INC_DIR)/24LCXX/24LC0X
+LIBUC_INC_DIR_SDCARD       = $(LIBUC_INC_DIR)/SDCARD
+LIBUC_INC_DIR_VS10XX       = $(LIBUC_INC_DIR)/VS10XX
+LIBUC_INC_DIR_BLKDEVICE    = $(LIBUC_INC_DIR)/BLKDEVICE
+
+LIBUC_INC_DIR_CORE_CMD         = -I $(LIBUC_INC_DIR_CORE)
+LIBUC_INC_DIR_UCSTRINGS_CMD    = -I $(LIBUC_INC_DIR_UCSTRINGS)
+LIBUC_INC_DIR_UART_CMD         = -I $(LIBUC_INC_DIR_UART)
+LIBUC_INC_DIR_SPI_CMD          = -I $(LIBUC_INC_DIR_SPI)
+LIBUC_INC_DIR_SSP_CMD          = -I $(LIBUC_INC_DIR_SSP)
+LIBUC_INC_DIR_IIC_CMD          = -I $(LIBUC_INC_DIR_IIC)
+LIBUC_INC_DIR_ADC_CMD          = -I $(LIBUC_INC_DIR_ADC)
+LIBUC_INC_DIR_24LC0X_CMD       = -I $(LIBUC_INC_DIR_24LC0X)
+LIBUC_INC_DIR_SDCARD_CMD       = -I $(LIBUC_INC_DIR_SDCARD)
+LIBUC_INC_DIR_VS10XX_CMD       = -I $(LIBUC_INC_DIR_VS10XX)
+LIBUC_INC_DIR_BLKDEVICE_CMD    = -I $(LIBUC_INC_DIR_BLKDEVICE)
+
+#---------------------------------------------------------------------------------
+#       BOARD SUPORT PACKAGES
+#---------------------------------------------------------------------------------
+LIBUC_BSP_DIR=$(LIBUC)/bsp
+LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin
+LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes
+LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp
+LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP)
+#---------------------------------------------------------------------------------
+#       DEVICE SPECIAL FILES
+#---------------------------------------------------------------------------------
+LINKER_SCRIPT = $(ARCHFOLDER)/LPC2103_ram.ld
+APPSOURCES  += $(ARCHFOLDER)/ramstartup-1.S
+LPC21XX_INCDIR=$(ARCHFOLDER)
+
+
+#---------------------------------------------------------------------------------
+#       RULES
+#---------------------------------------------------------------------------------
+
+all: 
+	@echo "lpc21XX-arm-noabi-gcc rules"
+
+
+bin: $(TARGET).bin $(TARGET).hex
+	@echo "compile bin"
+
+
+
+lib: $(TARGET).a
+	@echo "compile lib"
+
+%.a: $(OBJECTFILES)
+	mkdir -p $(TARGETINSTALLPATH)
+	mkdir -p $(HEADERSINSTALLPATH)
+	$(LIBUC_AR)  rcs $(TARGETINSTALLPATH)/$@  $(OBJECTFILES)
+	cp -f $(HEADERS) $(HEADERSINSTALLPATH)/
+	
+%.o: %.S
+	$(LIBUC_CC) -O3 -c -o $@ $< $(LIBUC_CFLAGS)
+
+%.o: %.c
+	$(LIBUC_CC) -O3 -I $(LPC21XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -MM $< -MF $*.d -MP
+	$(LIBUC_CC) -O3 -I $(LPC21XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@
+
+
+%.elf: $(LINKER_SCRIPT) $(OBJECTFILES)
+	$(LIBUC_CC) -O3 -nostartfiles -T $^ -o $@  -static $(LIBUC_BSP) $(LIBUC_LIBRARIES) 
+	$(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump)
+	$(LIBUC_SIZE) $@
+	
+%.bin: %.elf
+	$(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin
+
+
+%.hex: %.elf
+	$(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex
+
+
+clean:
+	rm -f *.o *.d *.bin *.hex *.dump *.map *.a
+	
+distclean:
+	rm -f $(TARGETINSTALLPATH)/*.bin
+	rm -f $(TARGETINSTALLPATH)/*.a
+	
+
+
+
+
+
+
+
+