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jeandet@pc-de-jeandet3.LAB-LPP.LOCAL -
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1 1 #include "stm32f4xx.h"
2 2 #include <stdint.h>
3 3 #include <stdlib.h>
4 4 #include <stdio.h>
5 5 #include <bsp.h>
6 6 #include <stm32f4xx_rcc.h>
7 7 #include <core.h>
8 8 extern int main();
9 9
10 10
11 11
12 12 void cpu_init()
13 13 {
14 14 extern uint32_t currentCpuFreq;
15 15 currentCpuFreq = 80000000;
16 16 enable_FPU();
17 17 RCC->CR |= (uint32_t)0x00000001;
18 18 FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
19 19 reset_AHB1();
20 20 reset_AHB2();
21 21 reset_APB1();
22 22 reset_APB2();
23 23 RCC->CR |= (uint32_t)0x00000001;
24 24 FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
25 25 RCC->CFGR = 0x00000000;
26 26 RCC->CIR = 0x00000000;
27 27 SCB->VTOR = FLASH_BASE;
28 28 RCC->APB1ENR |= RCC_APB1ENR_PWREN;
29 29 PWR->CR |= PWR_CR_PMODE;
30 currentCpuFreq=setCpuFreq(currentCpuFreq);
30 31 bsp_init();
31 printf("Configure PLL to reach %uHz\n\r",(unsigned int)currentCpuFreq);
32 currentCpuFreq=setCpuFreq(currentCpuFreq);
33 bsp_uart_init();
34 32 RCC_ClocksTypeDef RCC_ClocksStatus;
35 33 RCC_GetClocksFreq(&RCC_ClocksStatus);
36 34 printf("PLL Configured got:\n\r SYS=%uHz\n\r CPU=%uHz\n\r APB1=%uHz\n\r APB2=%uHz\n\r",(unsigned int)RCC_ClocksStatus.SYSCLK_Frequency,(unsigned int)RCC_ClocksStatus.HCLK_Frequency,(unsigned int)RCC_ClocksStatus.PCLK1_Frequency,(unsigned int)RCC_ClocksStatus.PCLK2_Frequency);
37 35 printf("Enter Main\n\r");
38 36 int res=main();
39 37 printf("\n\rprogram exited with code ");
40 38 printf("%u",res);
41 39 printf("\n\r");
42 40 while(1)
43 41 {
44 42 for(volatile int i=0;i<1024*64;i++);
45 43 gpioset(PD14);
46 44 for(volatile int i=0;i<1024*64;i++);
47 45 gpioclr(PD14);
48 46 }
49 47 }
50 48
51 49
52 50
53 51
54 52
55 53
56 54
57 55
58 56
59 57
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1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2012, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@gmail.com
21 21 -------------------------------------------------------------------------------*/
22 22
23 23 #include <i2c.h>
24 24 #include <stm32f4xx_usart.h>
25 25 #include <stm32f4xx_rcc.h>
26 26 #include <stm32f4xx_gpio.h>
27 27 #include <gpio.h>
28 28 #include <core.h>
29 29
30 30 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
31 31 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
32 32
33 33
34 34 I2C_TypeDef* _i2c_dev_table[3]={I2C1,I2C2,I2C3};
35 35
36 36 i2c_t i2copen(int count)
37 37 {
38 38 #define _INIT_DEV(_RCC_) \
39 39 RCC_APB1PeriphClockCmd(_RCC_, ENABLE); \
40 40 RCC_APB1PeriphResetCmd(_RCC_, ENABLE); \
41 41 RCC_APB1PeriphResetCmd(_RCC_, DISABLE); \
42 42 RCC_APB1PeriphClockCmd(_RCC_, ENABLE);
43 43
44 44 switch(count)
45 45 {
46 46 case 0:
47 47 _INIT_DEV(RCC_APB1Periph_I2C1);
48 48 return (i2c_t) 0;
49 49 break;
50 50 case 1:
51 51 _INIT_DEV(RCC_APB1Periph_I2C2);
52 52 return (i2c_t) 1;
53 53 break;
54 54 case 2:
55 55 _INIT_DEV(RCC_APB1Periph_I2C3);
56 56 return (i2c_t) 2;
57 57 break;
58 58 default:
59 59 break;
60 60 }
61 61 return -1;
62 62 }
63 63
64 64 i2c_t i2copenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL)
65 65 {
66 66 i2c_t dev = i2copen(count);
67 printf("dev = %d\n\r",dev);
68 67 if(dev!=-1)
69 68 {
70 69 i2cenable(count);
71 70 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
72 71 _dev_->CR1 = (1<<15);
73 72 _dev_->CR1 &=~(1<<15);
74 73 i2cdisable(count);
75 74 i2csetpins(dev,SDA,SCL);
76 75 i2csetspeed(dev,speed);
77 76 i2cenable(count);
77 _dev_->CR1|=1<<15;
78 _dev_->CR1&=~(1<<15);
78 79 }
79 80 return dev;
80 81 }
81 82
82 83 int i2cclose(i2c_t dev)
83 84 {
84 85 switch((int)dev)
85 86 {
86 87 case (int)0:
87 88 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
88 89 break;
89 90 case (int)1:
90 91 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
91 92 break;
92 93 case (int)2:
93 94 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE);
94 95 break;
95 96 default:
96 97 break;
97 98 }
98 99 return 1;
99 100 }
100 101
101 102 int i2csetpins(i2c_t dev, uint32_t SDA, uint32_t SCL)
102 103 {
103 104 if((dev<3)&&(dev>=0))
104 105 {
105 106 gpio_t SDApin,SCLpin;
106 107 SDApin = gpioopen(SDA);
107 108 SCLpin = gpioopen(SCL);
108 109 SDApin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype;
109 110 SCLpin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype;
110 111 gpiosetconfig(&SDApin);
111 112 gpiosetconfig(&SCLpin);
112 113 uint8_t gpioAFi2cx = GPIO_AF_I2C1;
113 114 switch((int)dev)
114 115 {
115 116 case 0:
116 117 gpioAFi2cx = GPIO_AF_I2C1;
117 118 break;
118 119 case 1:
119 120 gpioAFi2cx = GPIO_AF_I2C2;
120 121 break;
121 122 case 2:
122 123 gpioAFi2cx = GPIO_AF_I2C3;
123 124 break;
124 125 default:
125 126 break;
126 127 }
127 128 GPIO_PinAFConfig(GPIOGETPORT(SDApin), (uint8_t)(SDApin & 0xF), gpioAFi2cx);
128 129 GPIO_PinAFConfig(GPIOGETPORT(SCLpin), (uint8_t)(SCLpin & 0xF), gpioAFi2cx);
129 130 return 0;
130 131 }
131 132 return -1;
132 133 }
133 134
134 135 int i2cenable(i2c_t dev)
135 136 {
136 137 if((dev<3)&&(dev>=0))
137 138 {
138 139 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
139 140 _dev_->CR1 |=1 ;
140 141 return 0;
141 142 }
142 143 return -1;
143 144 }
144 145
145 146 int i2cdisable(i2c_t dev)
146 147 {
147 148 if((dev<3)&&(dev>=0))
148 149 {
149 150 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
150 151 _dev_->CR1 &= ~1;
151 152 return 0;
152 153 }
153 154 return -1;
154 155 }
155 156
156 157
157 158 int i2csetspeed(i2c_t dev,uint32_t speed)
158 159 {
159 160 if((dev<3)&&(dev>=0))
160 161 {
161 162 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
162 163 int32_t APB1Freq=getAPB1Freq()/1000000;
163 164 if((APB1Freq>1)&&(APB1Freq<43))
164 165 {
165 int enabled=((_dev_->CR1&1)==1);
166 166 i2cdisable(dev);
167 _dev_->CR2 &= ~(0x1f);
168 _dev_->CR2 |= APB1Freq;
167 uint16_t tmpreg=_dev_->CR2;
168 tmpreg &= ~(0x1f);
169 tmpreg |= APB1Freq;
170 _dev_->CR2=tmpreg;
171 tmpreg=_dev_->TRISE;
172 tmpreg &= ~(0x3f);
173 tmpreg |= APB1Freq+1;
174 _dev_->TRISE = tmpreg;
175 tmpreg=_dev_->CCR;
176 APB1Freq=getAPB1Freq();
169 177 if(speed>100000) //100kHz= standard mode, 400kHz= fast mode
170 178 {
171 179 if(speed<=400000)
172 180 {
173 _dev_->CCR |= 1<<15;
174 _dev_->CCR &= ~(1<<14);
175 _dev_->CCR &= ~(0xfff);
176 _dev_->CCR |= 0xfff & (APB1Freq/(3*speed));
181 tmpreg |= 1<<15;
182 tmpreg &= ~(1<<14);
183 tmpreg &= ~(0xfff);
184 tmpreg |= 0xfff & (APB1Freq/(3*speed));
177 185 }
178 186 }
179 187 else
180 188 {
181 _dev_->CCR &= ~(1<<15);
182 _dev_->CCR &= ~(0xfff);
183 _dev_->CCR |= 0xfff & (APB1Freq/(2*speed));
189 tmpreg &= ~(1<<15);
190 tmpreg &= ~(0xfff);
191 tmpreg |= 0xfff & (APB1Freq/(2*speed));
184 192 }
185 if(enabled)i2cenable(dev);
193 _dev_->CCR=tmpreg;
186 194 return 0;
187 195 }
188 196 }
189 197 return -1;
190 198 }
191 199
192 200 int i2cwrite(i2c_t dev,char address,char* data,int count)
193 201 {
194 202 if((dev<3)&&(dev>=0))
195 203 {
196 204 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
197 205 _dev_->CR1 |= 1<<8;
198 206 while((_dev_->SR1&1)==0);
199 207 _dev_->DR= address<<1;
200 208 while((_dev_->SR1 & (1<<3))==0);
201 209 address=_dev_->SR2;
202 210 for(int i=0;i<count;i++)
203 211 {
204 212 while((_dev_->SR1 & (1<<7))==0);
205 213 _dev_->DR= data[i];
206 214 }
207 215 while((_dev_->SR1 & (1<<7))==0);
208 216 while((_dev_->SR1 & (1<<2))==0);
209 217 _dev_->CR1 |= 1<<9;
210 218 return count;
211 219 }
212 220 return -1;
213 221 }
214 222
215 223 int i2cread(i2c_t dev,char address,char* data,int count)
216 224 {
217 225 if((dev<3)&&(dev>=0))
218 226 {
219 227 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
220 228 _dev_->CR1 |= (1<<8) | (1<<10);
221 229 if(count==1)
222 230 {
223 231 _dev_->CR1 &= ~(1<<10);
224 232 }
225 233 while((_dev_->SR1&1)==0);
226 234 _dev_->DR= (address<<1) + 1;
227 235 while((_dev_->SR1 & (1<<3))==0);
228 236 address=_dev_->SR2;
229 237 for(int i=0;i<count-1;i++)
230 238 {
231 239 while((_dev_->SR1 & (1<<6))==0);
232 240 data[i]=_dev_->DR;
233 241 }
234 242 _dev_->CR1 &= ~(1<<10);
235 243 _dev_->CR1 |= 1<<9;
236 244 while((_dev_->SR1 & (1<<6))==0);
237 245 data[count-1]=_dev_->DR;
238 246 return count;
239 247 }
240 248 return -1;
241 249 }
242 250
243 251
244 252
245 253
246 254
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