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Clone from http://pc-instru.lpp.polytechnique.fr:5000/libuc2

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Jeandet Alexis -
r101:0f3d6936517a dev_alexis
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@@ -29,20 +29,22
29 #include <timer.h>
29 #include <timer.h>
30 #include <gpio.h>
30 #include <gpio.h>
31 #include <math.h>
31 #include <math.h>
32 int16_t __attribute__ ((aligned (4))) data[512];
32 int16_t __attribute__ ((aligned (4))) data[4096];
33 int libuc_main()
33 int libuc_main()
34 {
34 {
35 /**
35 /**
36 Depending on the board the printf can be directed on one uart or LCD screen or
36 Depending on the board the printf can be directed on one uart or LCD screen or
37 any other stream device.
37 any other stream device.
38 */
38 */
39 printf("DAC example\n\r");
39 printf("DAC example \n\r");
40 for(int i=0;i<512;i++)
40 for(int i=0;i<4096;i++)
41 {
41 {
42 data[i]=(int16_t)(2000.0*cos(i/10.0))+2000.0;
42 data[i]=(2048+i)%4096;
43 }
43 }
44 data[0]=4000;
44 dacopen(PA4);
45 dacopen(PA4);
45 dacsetconfig(timer8, 512, DAC1,DAC1_12bit_right_align , 100000,(void*)data);
46 dacsetconfig(timer8, 4096, DAC1,DAC1_12bit_right_align , 100000,(void*)&data);
47 while (1);
46 return 0;
48 return 0;
47 }
49 }
48
50
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@@ -38,11 +38,11
38 .fpu fpv4-sp-d16
38 .fpu fpv4-sp-d16
39
39
40 .section .stack
40 .section .stack
41 .align 3
41 .align 4
42 #ifdef __STACK_SIZE
42 #ifdef __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
44 #else
44 #else
45 .equ Stack_Size, 0x2000
45 .equ Stack_Size, 0x7F00
46 #endif
46 #endif
47 .globl __StackTop
47 .globl __StackTop
48 .globl __StackLimit
48 .globl __StackLimit
@@ -57,7 +57,7
57 #ifdef __HEAP_SIZE
57 #ifdef __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
59 #else
59 #else
60 .equ Heap_Size, 0x2000
60 .equ Heap_Size, 0x7F00
61 #endif
61 #endif
62 .globl __HeapBase
62 .globl __HeapBase
63 .globl __HeapLimit
63 .globl __HeapLimit
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@@ -11,7 +11,6
11 #include <uart.h>
11 #include <uart.h>
12 #include <stdint.h>
12 #include <stdint.h>
13 #include <bsp.h>
13 #include <bsp.h>
14 #include <core.h>
15
14
16 #undef errno
15 #undef errno
17
16
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@@ -90,30 +90,30 uint32_t getAPB2Freq()
90
90
91 uint32_t getCpuFreq()
91 uint32_t getCpuFreq()
92 {
92 {
93 uint32_t cpufreq = OSC0;
93 uint32_t _freq_ = OSC0;
94 uint32_t PLLN,PLLM,PLLP;
94 uint32_t PLLN,PLLM,PLLP;
95
95
96 if((RCC->CFGR & 0xC) == 8) //PLL used as sys clk
96 if((RCC->CFGR & 0xC) == 8) //PLL used as sys clk
97 {
97 {
98 uint32_t pllinput=INTOSC;
98 uint32_t _pllin_=INTOSC;
99 if((RCC->PLLCFGR & (1<<22)) == (1<<22))
99 if((RCC->PLLCFGR & (1<<22)) == (1<<22))
100 {
100 {
101 pllinput=OSC0;
101 _pllin_=OSC0;
102 }
102 }
103 PLLN = (RCC->PLLCFGR>>6) & 0x1FF;
103 PLLN = (RCC->PLLCFGR>>6) & 0x1FF;
104 PLLM = RCC->PLLCFGR & 0x3F;
104 PLLM = RCC->PLLCFGR & 0x3F;
105 PLLP = 1<<(((RCC->PLLCFGR>>16) & 3 )+1);
105 PLLP = 1<<(((RCC->PLLCFGR>>16) & 3 )+1);
106 cpufreq = (pllinput * PLLN )/(PLLM*PLLP);
106 _freq_ = (_pllin_ * PLLN )/(PLLM*PLLP);
107 }
107 }
108 else if((RCC->CFGR & 0xC) == 0) //HSI used as sys clk
108 else if((RCC->CFGR & 0xC) == 0) //HSI used as sys clk
109 {
109 {
110 cpufreq=INTOSC;
110 _freq_=INTOSC;
111 }
111 }
112 if((RCC->CFGR & (1<<7))==1<<7)
112 if((RCC->CFGR & (1<<7))==(1<<7))
113 {
113 {
114 return cpufreq>>((RCC->CFGR & (7<<4))>>4);
114 return _freq_>>((RCC->CFGR & (7<<4))>>4);
115 }
115 }
116 return cpufreq;
116 return _freq_;
117 }
117 }
118
118
119 void reset_AHB1()
119 void reset_AHB1()
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@@ -42,7 +42,7
42 #ifdef __STACK_SIZE
42 #ifdef __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
44 #else
44 #else
45 .equ Stack_Size, 0x2000
45 .equ Stack_Size, 0x7F00
46 #endif
46 #endif
47 .globl __StackTop
47 .globl __StackTop
48 .globl __StackLimit
48 .globl __StackLimit
@@ -57,7 +57,7
57 #ifdef __HEAP_SIZE
57 #ifdef __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
59 #else
59 #else
60 .equ Heap_Size, 0x2000
60 .equ Heap_Size, 0x7F00
61 #endif
61 #endif
62 .globl __HeapBase
62 .globl __HeapBase
63 .globl __HeapLimit
63 .globl __HeapLimit
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@@ -11,9 +11,6
11 #include <dac.h>
11 #include <dac.h>
12
12
13
13
14 #define DAC_DHR12R2_ADDRESS 0x40007414
15 #define DAC_DHR8R1_ADDRESS 0x40007410
16
17
14
18 const TIM_TypeDef* _timer_dev_table[14]={TIM1,TIM2,TIM3,TIM4,TIM5,TIM6,TIM7,
15 const TIM_TypeDef* _timer_dev_table[14]={TIM1,TIM2,TIM3,TIM4,TIM5,TIM6,TIM7,
19 TIM8,TIM9,TIM10,TIM11,TIM12,TIM13,TIM14};
16 TIM8,TIM9,TIM10,TIM11,TIM12,TIM13,TIM14};
@@ -35,58 +32,72 int dacopen(uint32_t pin)
35
32
36 int dacsetconfig(int timer, int buffer_size, int dac, uint32_t dac_type, uint32_t samplingFreq, void *data)
33 int dacsetconfig(int timer, int buffer_size, int dac, uint32_t dac_type, uint32_t samplingFreq, void *data)
37 {
34 {
38 #include <core.h>
35 //#include <core.h>
39 DAC_InitTypeDef DAC_InitStructure;
36 DAC_InitTypeDef DAC_InitStructure;
40 TIM_TypeDef* tim = (TIM_TypeDef*)_timer_dev_table[timer];
37 // TIM_TypeDef* tim = (TIM_TypeDef*)_timer_dev_table[timer];
38 TIM_TypeDef* tim = TIM6;
41 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
39 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
42 DMA_InitTypeDef DMA_InitStructure;
40 DMA_InitTypeDef DMA_InitStructure;
43 if(timer>=timer2 && timer <= timer7)RCC_APB1PeriphClockCmd((1<<(timer-1)), ENABLE);
41 if(timer>=timer2 && timer <= timer7)RCC_APB1PeriphClockCmd((1<<(timer-1)), ENABLE);
44 if(timer==timer8)RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
42 if(timer==timer8)RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
45 uint32_t timfreq = getCpuFreq()/2;
43 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);
46 uint32_t period = timfreq/samplingFreq - 1;
44 unsigned int __inputFreq__ = 80000000;//getCpuFreq()/2;
47 uint16_t PrescalerValue=0;
45 unsigned int period = __inputFreq__/samplingFreq - 1;
48 while (period>=0x0FFFF)
46 unsigned int PrescalerValue=0;
49 {
47 // while (period>=0x0FFFF)
50 PrescalerValue++;
48 // {
51 timfreq = getCpuFreq()/(2*(PrescalerValue+1));
49 // PrescalerValue++;
52 period = (timfreq/samplingFreq) - 1;
50 // __inputFreq__ = getCpuFreq()/(2*(PrescalerValue+1));
53 }
51 // period = (__inputFreq__/samplingFreq) - 1;
54 printf("period = %d \n\r prescaler = %d \n\r",period,PrescalerValue);
52 // }
53
54 printf("period = %d \n\r prescaler = 0x%x 0x%x\n\r",period,data,__get_MSP());
55 TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
55 TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
56 TIM_TimeBaseStructure.TIM_Period = 10;
56 TIM_TimeBaseStructure.TIM_Period = 0xff;
57 TIM_TimeBaseStructure.TIM_Prescaler = 0;
57 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)0;
58 TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
58 TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
59 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
59 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
60 TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
60 TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
61 TIM_SelectOutputTrigger(tim, TIM_TRGOSource_Update);
61 TIM_SelectOutputTrigger(TIM6, TIM_TRGOSource_Update);
62 TIM_ARRPreloadConfig(tim, ENABLE);
62 // TIM_ARRPreloadConfig(tim, ENABLE);
63 TIM_Cmd(tim, ENABLE);
63 TIM_Cmd(TIM6, ENABLE);
64
64
65 if (timer == timer2)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO;
65 // if (timer == timer2)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO;
66 if (timer == timer4)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T4_TRGO;
66 // if (timer == timer4)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T4_TRGO;
67 if (timer == timer5)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T5_TRGO;
67 // if (timer == timer5)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T5_TRGO;
68 if (timer == timer6)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
68 // if (timer == timer6)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
69 if (timer == timer7)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO;
69 // if (timer == timer7)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO;
70 if (timer == timer8)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T8_TRGO;
70 // if (timer == timer8)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T8_TRGO;
71 DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
72
71 DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
73 DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
72 DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
74 DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
73 if (dac == DAC1){
75 if (dac == DAC1){
76 printf("DAC1 Init ");
74 DAC_Init(DAC_Channel_1, &DAC_InitStructure);
77 DAC_Init(DAC_Channel_1, &DAC_InitStructure);
75 DMA_DeInit(DMA1_Stream5);
78 DMA_DeInit(DMA1_Stream5);
76 }
79 }
77
80
78 if (dac == DAC2){
81 if (dac == DAC2){
82 printf("DAC2 Init ");
79 DAC_Init(DAC_Channel_2, &DAC_InitStructure);
83 DAC_Init(DAC_Channel_2, &DAC_InitStructure);
80 DMA_DeInit(DMA1_Stream6);
84 DMA_DeInit(DMA1_Stream6);
81 }
85 }
82
86 if (dac == DAC1){
87 DMA_DeInit(DMA1_Stream5);
88 DMA_Cmd(DMA1_Stream5, DISABLE);
89 }
90 if (dac == DAC2){
91 DMA_DeInit(DMA1_Stream6);
92 DMA_Cmd(DMA1_Stream6, DISABLE);
93 }
83 DMA_InitStructure.DMA_Channel = DMA_Channel_7;
94 DMA_InitStructure.DMA_Channel = DMA_Channel_7;
84 DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)dac_type;
95 // DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)dac_type;
96 DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC1_12bit_right_align;
85 DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)data;
97 DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)data;
86 DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
98 DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
87 DMA_InitStructure.DMA_BufferSize = buffer_size;
99 DMA_InitStructure.DMA_BufferSize = buffer_size;
88 DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
100 DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
89 DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
90 DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
101 DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
91 DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
102 DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
92 DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
103 DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
@@ -96,21 +107,32 int dacsetconfig(int timer, int buffer_s
96 DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
107 DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
97 DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
108 DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
98 DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
109 DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
110 DMA_Init(DMA1_Stream5, &DMA_InitStructure);
111 /* Enable DMA1_Stream6 */
112 DMA_Cmd(DMA1_Stream5, ENABLE);
99
113
100 if (dac == DAC1){
114 /* Enable DAC Channel2 */
101 DMA_Init(DMA1_Stream5, &DMA_InitStructure);
115 DAC_Cmd(DAC_Channel_1, ENABLE);
102 DMA_Cmd(DMA1_Stream5, ENABLE);
116
103 DAC_DMACmd(DAC_Channel_1, ENABLE);
117 /* Enable DMA for DAC Channel2 */
104 DAC_Cmd(DAC_Channel_1, ENABLE);
118 DAC_DMACmd(DAC_Channel_1, ENABLE);
105
119
106 }
120 // if (dac == DAC1){
107 if (dac == DAC2){
121 // printf("DAC1 DMA Init");
108 DMA_Init(DMA1_Stream6, &DMA_InitStructure);
122 // DMA_Init(DMA1_Stream5, &DMA_InitStructure);
109 DMA_Cmd(DMA1_Stream6, ENABLE);
123 // DMA_Cmd(DMA1_Stream5, ENABLE);
110 DAC_DMACmd(DAC_Channel_2, ENABLE);
124 // DAC_Cmd(DAC_Channel_1, ENABLE);
111 DAC_Cmd(DAC_Channel_2, ENABLE);
125 // DAC_DMACmd(DAC_Channel_1, ENABLE);
112
126
113 }
127 // }
128 // if (dac == DAC2){
129 // printf("DAC2 DMA Init");
130 // DMA_Init(DMA1_Stream6, &DMA_InitStructure);
131 // DMA_Cmd(DMA1_Stream6, ENABLE);
132 // DAC_Cmd(DAC_Channel_2, ENABLE);
133 // DAC_DMACmd(DAC_Channel_2, ENABLE);
134
135 // }
114 return 0;
136 return 0;
115
137
116 }
138 }
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