HG_REPOSITORIES/LPP/INSTRUMENTATION/VHD_Lib Files · boards/em-LeonLPP-A3PE3kL-v2/em-LeonLPP-A3PE3kL_testData29.pdc

EM Design : GRSPW 2 ports, WFP, FILTER, BW/SP/R OK...

EM Design : GRSPW 2 ports, WFP, FILTER, BW/SP/R OK (Redmine : 2013-07-22-leon3mp-grspw-wfrm.pdb)

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/ boards / em-LeonLPP-A3PE3kL-v2 / em-LeonLPP-A3PE3kL_testData29.pdc

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				set_io clk50MHz -pinname B3 -fixed yes -DIRECTION Inout
				set_io data_29 -pinname J18 -fixed yes -DIRECTION Inout

				set_io {led[0]} -pinname K17 -fixed yes -DIRECTION Inout
				set_io {led[1]} -pinname L18 -fixed yes -DIRECTION Inout
				set_io {led[2]} -pinname M17 -fixed yes -DIRECTION Inout

				set_io Reset -pinname N18 -fixed yes -DIRECTION Inout

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