HG_REPOSITORIES/LPP/INSTRUMENTATION/VHD_Lib Commit - r202:6582fbd4a734

commit before update

paul -

r202:6582fbd4a734 paul

parent child

Context file:

r202:6582fbd4a734

lib/lpp/lpp_memory/SSRAM_plugin.vhd +2 -5

             Type stateT is (idle,st1,st2,st3,st4);
             signal state : stateT;
-            SIGNAL nclk : STD_LOGIC;
             begin
             process(clk , mem_ctrlr_o.RAMSN(0))
                 end if;
             end process;
-            nclk <= NOT clk;
             ssram_clk_pad : outpad generic map (tech => tech)
-                port map (SSRAM_CLK,nclk);
+                port map (SSRAM_CLK,not clk);
             nBWaint  <=  mem_ctrlr_o.WRN(3)or mem_ctrlr_o.ramsn(0);
             ZZ_pad : outpad generic map (tech => tech)
                 port map (ZZ, '0');
-            end architecture;
+            end architecture;
  No newline at end of file

General Comments 0

You need to be logged in to leave comments. Login now

No TODOs yet

	Repositories
g s	Goto summary page
g c	Goto changelog page
g f	Goto files page
g F	Goto files page with file search activated
g p	Goto pull requests page
g o	Goto repository settings
g O	Goto repository access permissions settings
t s	Toggle sidebar on some pages