HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/EGSE_ICI/tsmc13.rc

Renamed em-LeonLPP-A3PE3kL-v3-core1 boards in LFR-EM boards...

Renamed em-LeonLPP-A3PE3kL-v3-core1 boards in LFR-EM boards Renamed LFR-em-WFP_MS designs in SOLO_LFR_LFR-EM designs Updated LFR-EM boards constraints => PDC file => SDC file for the place and route Updated SOLO_LFR_LFR-EM designs => added DATA_SHAPING_SATURATION in LPP_FILTER => changed boards number : LPP_LFR_BOARD_LFR_EM & X"015B"

Alexis Jeandet - - Load All Authors

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r217:13429b36c676 alexis


                r662:f19abbf47ea7

SOLO_LFR_01-5B (LFR-EM) default

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				set_attribute lib_search_path {. /usr/local/synlibs/TSMG13F210D3_1.1/lib}
				set_attribute library {"tsmg13f210t3_wc_108V_125C.lib" "/home/jiri/ibm/vhdl/temic/atc18/allmem.lib" } /
				include leon3mp.rc
				include atc18cond.rc
				define_clock -period 5000 -name clock1 clk
				synthesize -to_mapped
				report_area
				report_timing

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