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Débug de la FIFO...
Débug de la FIFO /!\ syncram_2p, signaux d'écritue/lecture actif a l'état haut Différent de RAM_CEL actif a l'état bas .
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r14:46dea010b1a4 default
r103:e52d1f932b5e martin
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leon3mp.xcf
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/ designs / leon3-APB_LCD-digilent-xc3s1600e / leon3mp.xcf
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NET clk_50mhz PERIOD = 20.000 ;
NET ddr_clk_fb PERIOD = 8.0 ns;
#TIMESPEC "TS_sepclk1" = FROM "clkgen0_clkin" TO "ddrsp0_ddr_phy0_clk" TIG;
#TIMESPEC "TS_sepclk2" = FROM "ddrsp0_ddr_phy0_clk" TO "clkgen0_clkin" TIG;
NET "clkm" TNM_NET = "clkm";
NET "clkml" TNM_NET = "clkml";
TIMESPEC "TS_clkm_clkml" = FROM "clkm" TO "clkml" TIG;
TIMESPEC "TS_clkml_clkm" = FROM "clkml" TO "clkm" TIG;
NET "lock" TIG;