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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-- jean-christophe.pellion@easii-ic.com
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----------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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LIBRARY grlib;
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USE grlib.amba.ALL;
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LIBRARY lpp;
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USE lpp.lpp_lfr_pkg.ALL;
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USE lpp.lpp_ad_conv.ALL;
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PACKAGE lpp_debug_lfr_pkg IS
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COMPONENT lpp_debug_dma_singleOrBurst
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GENERIC (
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tech : INTEGER;
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hindex : INTEGER;
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pindex : INTEGER;
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paddr : INTEGER;
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pmask : INTEGER);
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PORT (
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HCLK : IN STD_ULOGIC;
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HRESETn : IN STD_ULOGIC;
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ahbmi : IN AHB_Mst_In_Type;
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ahbmo : OUT AHB_Mst_Out_Type;
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apbi : IN apb_slv_in_type;
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apbo : OUT apb_slv_out_type;
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out_ren : OUT STD_LOGIC;
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out_send : OUT STD_LOGIC;
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out_done : OUT STD_LOGIC;
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out_dmaout_okay : OUT STD_LOGIC
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);
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END COMPONENT;
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COMPONENT lpp_debug_lfr
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GENERIC (
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tech : INTEGER;
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hindex : INTEGER;
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pindex : INTEGER;
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paddr : INTEGER;
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pmask : INTEGER);
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PORT (
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HCLK : IN STD_ULOGIC;
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HRESETn : IN STD_ULOGIC;
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apbi : IN apb_slv_in_type;
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apbo : OUT apb_slv_out_type;
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sample_B : OUT Samples14v(2 DOWNTO 0);
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sample_E : OUT Samples14v(4 DOWNTO 0));
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END COMPONENT;
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END;
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