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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-- jean-christophe.pellion@easii-ic.com
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----------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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LIBRARY grlib;
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USE grlib.amba.ALL;
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USE grlib.stdlib.ALL;
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USE grlib.devices.ALL;
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LIBRARY lpp;
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USE lpp.lpp_bootloader_pkg.ALL;
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USE lpp.apb_devices_list.ALL;
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ENTITY lpp_bootloader IS
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GENERIC (
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pindex : INTEGER := 1;
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paddr : INTEGER := 1;
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pmask : INTEGER := 16#fff#;
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hindex : INTEGER := 0;
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haddr : INTEGER := 0;
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hmask : INTEGER := 16#fff#
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);
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PORT (
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-- AMBA AHB system signals
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HCLK : IN STD_ULOGIC;
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HRESETn : IN STD_ULOGIC;
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-- AMBA APB Slave Interface
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apbi : IN apb_slv_in_type;
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apbo : OUT apb_slv_out_type;
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-- AMBA AHB Slave Interface
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ahbsi : IN ahb_slv_in_type;
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ahbso : OUT ahb_slv_out_type
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);
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END lpp_bootloader;
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ARCHITECTURE Beh OF lpp_bootloader IS
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CONSTANT REVISION : INTEGER := 1;
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CONSTANT pconfig : apb_config_type := (
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0 => ahb_device_reg (VENDOR_LPP, LPP_BOOTLOADER_TYPE, 0, REVISION, 0),
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1 => apb_iobar(paddr, pmask));
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TYPE lpp_bootloader_regs IS RECORD
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config_wait_on_boot : STD_LOGIC;
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config_start_execution : STD_LOGIC;
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addr_start_execution : STD_LOGIC_VECTOR(31 DOWNTO 0);
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-- addr_fp : STD_LOGIC_VECTOR(31 DOWNTO 0);
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END RECORD;
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SIGNAL reg : lpp_bootloader_regs;
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SIGNAL prdata : STD_LOGIC_VECTOR(31 DOWNTO 0);
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BEGIN -- Beh
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-----------------------------------------------------------------------------
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-- AHBROM
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-----------------------------------------------------------------------------
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ahbrom_1 : bootrom
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GENERIC MAP (
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hindex => hindex,
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haddr => haddr,
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hmask => hmask,
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pipe => 0,
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tech => 0,
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kbytes => 1)
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PORT MAP (
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rst => HRESETn,
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clk => HCLK,
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ahbsi => ahbsi,
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ahbso => ahbso);
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-----------------------------------------------------------------------------
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-- APB REG
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-----------------------------------------------------------------------------
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lpp_bootloader_apbreg : PROCESS (HCLK, HRESETn)
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VARIABLE paddr : STD_LOGIC_VECTOR(7 DOWNTO 2);
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BEGIN -- PROCESS lpp_dma_top
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IF HRESETn = '0' THEN -- asynchronous reset (active low)
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reg.config_wait_on_boot <= '1';
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reg.config_start_execution <= '0';
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reg.addr_start_execution <= X"40000000";
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prdata <= (OTHERS => '0');
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ELSIF HCLK'EVENT AND HCLK = '1' THEN -- rising clock edge
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paddr := "000000";
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paddr(7 DOWNTO 2) := apbi.paddr(7 DOWNTO 2);
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prdata <= (OTHERS => '0');
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IF apbi.psel(pindex) = '1' THEN
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-- APB DMA READ --
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CASE paddr(7 DOWNTO 2) IS
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WHEN "000000" => prdata(0) <= reg.config_wait_on_boot;
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prdata(31 DOWNTO 1) <= (OTHERS => '0');
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WHEN "000001" => prdata(0) <= reg.config_start_execution;
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prdata(31 DOWNTO 1) <= (OTHERS => '0');
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WHEN "000010" => prdata <= reg.addr_start_execution;
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WHEN OTHERS => NULL;
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END CASE;
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IF (apbi.pwrite AND apbi.penable) = '1' THEN
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-- APB DMA WRITE --
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CASE paddr(7 DOWNTO 2) IS
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WHEN "000000" => reg.config_wait_on_boot <= apbi.pwdata(0);
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WHEN "000001" => reg.config_start_execution <= apbi.pwdata(0);
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WHEN "000010" => reg.addr_start_execution <= apbi.pwdata;
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WHEN OTHERS => NULL;
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END CASE;
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END IF;
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END IF;
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END IF;
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END PROCESS lpp_bootloader_apbreg;
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apbo.pirq <= (OTHERS => '0');
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apbo.pindex <= pindex;
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apbo.pconfig <= pconfig;
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apbo.prdata <= prdata;
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END Beh;
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