##// END OF EJS Templates
Few fixes....
Few fixes. Whole LFR simulation WIP.

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Makefile.inc
17 lines | 378 B | text/x-povray | MakefileLexer
TECHNOLOGY=Spartan6
ISETECH="Spartan6"
PACKAGE=ftg256
PART=XC6SLX25
SPEED=-3
SYNFREQ=25
MANUFACTURER=Xilinx
MGCPART=XC6SLX25$(PACKAGE)
MGCTECHNOLOGY=SPARTAN-6
MGCPACKAGE=$(PACKAGE)
config_USB_as_FIFO:
ftdi_eeprom --flash-eeprom $(VHDLIB)/boards/$(BOARD)/ft2232h_JTAG_FIFO.conf
config_USB_as_UART:
ftdi_eeprom --flash-eeprom $(VHDLIB)/boards/$(BOARD)/ft2232h_JTAG_UART.conf