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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-- jean-christophe.pellion@easii-ic.com
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----------------------------------------------------------------------------
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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LIBRARY lpp;
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USE lpp.general_purpose.ALL;
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USE lpp.window_function_pkg.ALL;
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USE lpp.data_type_pkg.ALL;
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ENTITY window_function IS
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GENERIC (
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DATA_SIZE : INTEGER := 16;
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PARAM_SIZE : INTEGER := 10;
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WINDOWS_PARAM : array_std_logic_vector_16b(0 TO 255)
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);
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PORT (
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clk : IN STD_LOGIC;
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rstn : IN STD_LOGIC;
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restart_window : IN STD_LOGIC;
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data_in : IN STD_LOGIC_VECTOR(DATA_SIZE-1 DOWNTO 0);
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data_in_valid : IN STD_LOGIC;
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data_out : OUT STD_LOGIC_VECTOR(DATA_SIZE-1 DOWNTO 0);
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data_out_valid : OUT STD_LOGIC
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);
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END window_function;
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ARCHITECTURE beh OF window_function IS
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CONSTANT NB_POINT_BY_WINDOW : INTEGER := 256;
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SIGNAL param_counter : INTEGER RANGE 0 TO NB_POINT_BY_WINDOW-1;
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SIGNAL data_x_param : STD_LOGIC_VECTOR(DATA_SIZE + PARAM_SIZE - 1 DOWNTO 0);
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SIGNAL windows_param_selected_s : STD_LOGIC_VECTOR(15 DOWNTO 0);
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SIGNAL windows_param_selected : STD_LOGIC_VECTOR(PARAM_SIZE-1 DOWNTO 0);
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SIGNAL data_in_valid_s : STD_LOGIC;
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SIGNAL data_in_s : STD_LOGIC_VECTOR(DATA_SIZE-1 DOWNTO 0);
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BEGIN
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PROCESS (clk, rstn)
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BEGIN -- PROCESS
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IF rstn = '0' THEN -- asynchronous reset (active low)
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param_counter <= 0;
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ELSIF clk'EVENT AND clk = '1' THEN -- rising clock edge
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IF restart_window = '1' THEN
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param_counter <= 0;
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ELSE
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IF data_in_valid = '1' THEN
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IF param_counter < 255 THEN
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param_counter <= param_counter + 1;
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ELSE
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param_counter <= 0;
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END IF;
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END IF;
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END IF;
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END IF;
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END PROCESS;
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data_in_valid_s <= data_in_valid;
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data_in_s <= data_in;
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windows_param_selected_s <= WINDOWS_PARAM(param_counter);
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windows_param_selected <= windows_param_selected_s(15 DOWNTO 16 - PARAM_SIZE);
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WINDOWS_Multiplier : Multiplier
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GENERIC MAP (
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Input_SZ_A => DATA_SIZE,
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Input_SZ_B => PARAM_SIZE)
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PORT MAP (
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clk => clk,
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reset => rstn,
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mult => data_in_valid_s,
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OP1 => data_in_s,
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OP2 => windows_param_selected,
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RES => data_x_param);
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data_out <= data_x_param(DATA_SIZE + PARAM_SIZE-1 DOWNTO PARAM_SIZE);
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PROCESS (clk, rstn)
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BEGIN -- PROCESS
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IF rstn = '0' THEN -- asynchronous reset (active low)
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data_out_valid <= '0';
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ELSIF clk'EVENT AND clk = '1' THEN -- rising clock edge
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data_out_valid <= data_in_valid_s;
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END IF;
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END PROCESS;
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END beh;
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