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Update SOLO_LFR_LFR-EM timings constraints...
Update SOLO_LFR_LFR-EM timings constraints (due to the fact that we used a A3PE3000L FPGA on the LFR-EM board)
Alexis Jeandet -
r674:b0efa9138022 default
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/ lib / lpp / dsp / lpp_fft_rtax
CoreFFT.vhd Loading ...
CoreFFT_simu.vhd Loading ...
CoreFFT_simu_light.vhd Loading ...
Driver_FFT.vhd Loading ...
FFT.vhd Loading ...
Linker_FFT.vhd Loading ...
actar.vhd Loading ...
actram.vhd Loading ...
fftDp.vhd Loading ...
fftSm.vhd Loading ...
fftTop.vhd Loading ...
fft_components.vhd Loading ...
lpp_fft.vhd Loading ...
primitives.vhd Loading ...
twiddle.vhd Loading ...
vhdlsim.txt Loading ...
vhdlsyn.txt Loading ...