HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/SOLO_LFR_MINI-LFR/run.do

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

Update SOLO_LFR_LFR-EM timings constraints...

Update SOLO_LFR_LFR-EM timings constraints (due to the fact that we used a A3PE3000L FPGA on the LFR-EM board)

Alexis Jeandet - - Load All Authors

File last commit:

r656:a69a331fccb2 SOLO_LFR_01-5A (MINI-LFR) default


                r674:b0efa9138022

default

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             run.do
        
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      vcom -quiet  -93  -work work MINI_LFR_top.vhd 

      vcom -quiet  -93  -work work testbench.vhd

      vsim work.testbench

      log -r *

      do wave.do

      run 65 ms

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				vcom -quiet -93 -work work MINI_LFR_top.vhd
				vcom -quiet -93 -work work testbench.vhd

				vsim work.testbench

				log -r *

				do wave.do

				run 65 ms