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Update SOLO_LFR_LFR-EM timings constraints...
Update SOLO_LFR_LFR-EM timings constraints (due to the fact that we used a A3PE3000L FPGA on the LFR-EM board)
jeandet - - Load All Authors

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r168:0b190be76d60 alexis
r674:b0efa9138022 default
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leon3mp.xcf
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NET "clk27" TNM_NET = "clk27";
TIMESPEC "TS_clk27" = PERIOD "clk27" 37.00 ns HIGH 50 %;
NET "clk200p" TNM_NET = "clk200p";
TIMESPEC "TS_clk200p" = PERIOD "clk200p" 5.00 ns HIGH 50 %;
NET "erx_clk" TNM_NET = "erx_clk";
TIMESPEC "TS_erx_clk" = PERIOD "erx_clk" 8.00 ns HIGH 50 %;