##// END OF EJS Templates
Update SOLO_LFR_LFR-EM timings constraints...
Update SOLO_LFR_LFR-EM timings constraints (due to the fact that we used a A3PE3000L FPGA on the LFR-EM board)

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r168:0b190be76d60 alexis
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config.vhd.in
18 lines | 391 B | text/plain | TextLexer
#include "config.h"
#include "tkconfig.h"
-----------------------------------------------------------------------------
-- LEON3 Demonstration design test bench configuration
-- Copyright (C) 2009 Aeroflex Gaisler
------------------------------------------------------------------------------
library techmap;
use techmap.gencomp.all;
package config is
#include "config.vhd.h"
end;