HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · boards/MiniSpartan6p/Makefile.inc

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

Update SOLO_LFR_LFR-EM timings constraints...

Update SOLO_LFR_LFR-EM timings constraints (due to the fact that we used a A3PE3000L FPGA on the LFR-EM board)

Jeandet Alexis - - Load All Authors

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r661:9097fee4c1b6 default


                r674:b0efa9138022

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             Makefile.inc
        
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      TECHNOLOGY=Spartan6

      ISETECH="Spartan6"

      PACKAGE=ftg256

      PART=XC6SLX25

      SPEED=-3

      SYNFREQ=25

      MANUFACTURER=Xilinx

      MGCPART=XC6SLX25$(PACKAGE)

      MGCTECHNOLOGY=SPARTAN-6

      MGCPACKAGE=$(PACKAGE)

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				TECHNOLOGY=Spartan6
				ISETECH="Spartan6"
				PACKAGE=ftg256
				PART=XC6SLX25
				SPEED=-3
				SYNFREQ=25

				MANUFACTURER=Xilinx
				MGCPART=XC6SLX25$(PACKAGE)
				MGCTECHNOLOGY=SPARTAN-6
				MGCPACKAGE=$(PACKAGE)