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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Martin Morlot
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-- Mail : martin.morlot@lpp.polytechnique.fr
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-------------------------------------------------------------------------------
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library IEEE;
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use IEEE.numeric_std.all;
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use IEEE.std_logic_1164.all;
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use lpp.lpp_matrix.all;
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entity SpectralMatrix is
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generic(
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Input_SZ : integer := 16;
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Result_SZ : integer := 32);
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port(
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clk : in std_logic;
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reset : in std_logic;
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FIFO1 : in std_logic_vector(Input_SZ-1 downto 0);
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FIFO2 : in std_logic_vector(Input_SZ-1 downto 0);
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Full : in std_logic_vector(1 downto 0);
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Empty : in std_logic_vector(1 downto 0);
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Statu : in std_logic_vector(3 downto 0);
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ReadFIFO : out std_logic_vector(1 downto 0);
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WriteFIFO : out std_logic;
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Start : out std_logic;
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-- Read : out std_logic;
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-- Take : out std_logic;
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-- Valid : out std_logic;
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Res : out std_logic_vector(Result_SZ-1 downto 0);
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-- Received : out std_logic;
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-- Conjugate : out std_logic;
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-- OP1 : out std_logic_vector(3 downto 0);
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-- OP2 : out std_logic_vector(3 downto 0);
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Result : out std_logic_vector(Result_SZ-1 downto 0)
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);
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end SpectralMatrix;
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architecture ar_SpectralMatrix of SpectralMatrix is
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signal Start_int : std_logic;
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signal Read_int : std_logic;
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signal Take_int : std_logic;
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signal Received_int : std_logic;
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signal Valid_int : std_logic;
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signal Conjugate_int : std_logic;
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--signal OP1 : std_logic_vector(Input_SZ-1 downto 0);
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--signal OP2 : std_logic_vector(Input_SZ-1 downto 0);
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signal Resultat : std_logic_vector(Result_SZ-1 downto 0);
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--signal Res : std_logic_vector(Result_SZ-1 downto 0);
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begin
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ST0 : Starter
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port map(clk,reset,Full,Empty,Conjugate_int,Received_int,Start_int);
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--IN0 : SelectInputs
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-- generic map(Input_SZ)
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-- port map(clk,Start,Read,B1,B2,B3,E1,E2,Conjugate,Take,ReadFIFO,Statu,OP1,OP2);
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IN1 : DriveInputs
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port map(clk,Start_int,Read_int,Conjugate_int,Take_int,ReadFIFO);
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CALC0 : Matrix
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generic map(Input_SZ)
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port map(clk,Start_int,FIFO1,FIFO2,Take_int,Received_int,Conjugate_int,Valid_int,Read_int,Resultat);
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RES0 : GetResult
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generic map(Result_SZ)
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port map(clk,Start_int,Valid_int,Conjugate_int,Resultat,WriteFIFO,Received_int,Result);
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With Statu select
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Conjugate_int <= '1' when "0001",
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'1' when "0011",
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'1' when "0110",
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'1' when "1010",
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'1' when "1111",
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'0' when others;
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Start <= Start_int;
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--Read <= Read_int;
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--Take <= Take_int;
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--Received <= Received_int;
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--Valid <= Valid_int;
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--Conjugate <= Conjugate_int;
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Res <= Resultat;
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end ar_SpectralMatrix;
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