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971A_lqfp.bsd
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--
-- Device: LXT971A
-- Package: LQFP
-- File Name: 971A_lqfp.bsdl
--
-- Revision History
-- 1.0 - Tim Jackson (4/29/2002)
-- Legacy file 971Alqfp.txt renamed to 971A_lqfp.bsdl.
-- Updated attribute IDCODE_REGISTER to handle revision ids 1
-- and 2 and their appropriate jedec continuation codes.
-- Changed PWRDWN to a compliance enable and added a design
-- warning to that effect.
--
-- Notes
-- This file has successfully compiled on the Agilent Technologies 3070
-- BSDL compiler.
--
-- Disclaimer
-- Intel Corporation ("Intel") hereby grants the user of this BSDL file
-- ("User") a non-exclusive, nontransferable license to use the file
-- under the following terms. User may only to use the BSDL file and
-- is not granted rights to sell, copy (except as needed to run the BSDL
-- file), rent, lease or sub-license the BSDL file in whole or in part,
-- or in modified form to anyone. User may modify the BSDL file to suit
-- its specific applications, but rights to derivative works and such
-- modifications shall belong to Intel. This BSDL file is provided on an
-- "AS IS" basis and Intel makes absolutely no warranty with respect to
-- the information contained herein. INTEL DISCLAIMS AND USER WAIVES
-- ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING WARRANTIES OF
-- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND ANY WARRANTY
-- OF NON-INFRINGEMENT OF THE INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD
-- PARTY. THE ENTIRE RISK AS TO QUALITY AND PERFORMANCE IS WITH USER.
-- ACCORDINGLY, IN NO EVENT SHALL INTEL BE LIABLE FOR ANY DIRECT OR
-- INDIRECT DAMAGES, WHETHER IN CONTRACT OR TORT, INCLUDING, WITHOUT
-- LIMITATION, LOST PROFITS, BUSINESS INTERRUPTION, OR LOST INFORMATION)
-- ARISING OUT OF THE USE OF OR INABILITY TO USE THE FILE, EVEN IF INTEL
-- HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
--
-- This file is the legal property of Copyright (c) 2002, Intel
-- Corporation.
--
entity shark is
generic (PHYSICAL_PIN_MAP : string := "LQFP64");
port (
GND : linkage bit_vector (1 to 7);
VCCIO : linkage bit_vector (1 to 2);
VCCA : linkage bit_vector (1 to 2);
VCCD : linkage bit ;
NC : linkage bit_vector (1 to 3);
XI : linkage bit ;
XO : linkage bit ;
MDDIS : in bit ;
Reset : in bit ;
TXSLEW0: in bit ;
TXSLEW1: in bit ;
ADDR0 : in bit ;
ADDR1 : in bit ;
ADDR2 : in bit ;
ADDR3 : in bit ;
ADDR4 : in bit ;
RBIAS : linkage bit ;
TPFOP : linkage bit ;
TPFON : linkage bit ;
TPFIP : linkage bit ;
TPFIN : linkage bit ;
SD_TP : in bit ;
TDI : in bit ;
TDO : out bit ;
TMS : in bit ;
TCK : in bit ;
TRST : in bit ;
SLEEP : in bit ;
PAUSE : in bit ;
TEST0 : in bit ;
TEST1 : in bit ;
LEDCFG2: inout bit ;
LEDCFG1: inout bit ;
LEDCFG0: inout bit ;
PWRDWN : in bit ;
MDIO : inout bit ;
MDC : in bit ;
RXD3 : out bit ;
RXD2 : out bit ;
RXD1 : out bit ;
RXD0 : out bit ;
RX_DV : out bit ;
RX_CLK : out bit ;
RX_ER : out bit ;
TX_ER : in bit ;
TX_CLK : out bit ;
TX_EN : in bit ;
TXD0 : in bit ;
TXD1 : in bit ;
TXD2 : in bit ;
TXD3 : in bit ;
COL : out bit ;
CRS : out bit ;
MDINT : out bit
);
use STD_1149_1_1994.all;
use LXT971A_BSCAN.all;
attribute COMPONENT_CONFORMANCE of shark: entity is "STD_1149_1_1993";
-- Pin mappings
attribute PIN_MAP of shark: entity is PHYSICAL_PIN_MAP;
constant LQFP64: PIN_MAP_STRING:=
"GND : (7,11,18,25,41,50,61),"&
"VCCIO : (8,40) ,"&
"VCCA : (21,22) ,"&
"VCCD : 51 ,"&
"NC : (9,10,44) ,"&
"XI : 1 ,"&
"XO : 2 ,"&
"MDDIS : 3 ,"&
"Reset : 4 ,"&
"TXSLEW0: 5 ,"&
"TXSLEW1: 6 ,"&
"ADDR0 : 12 ,"&
"ADDR1 : 13 ,"&
"ADDR2 : 14 ,"&
"ADDR3 : 15 ,"&
"ADDR4 : 16 ,"&
"RBIAS : 17 ,"&
"TPFOP : 19 ,"&
"TPFON : 20 ,"&
"TPFIP : 23 ,"&
"TPFIN : 24 ,"&
"SD_TP : 26 ,"&
"TDI : 27 ,"&
"TDO : 28 ,"&
"TMS : 29 ,"&
"TCK : 30 ,"&
"TRST : 31 ,"&
"SLEEP : 32 ,"&
"PAUSE : 33 ,"&
"TEST0 : 34 ,"&
"TEST1 : 35 ,"&
"LEDCFG2: 36 ,"&
"LEDCFG1: 37 ,"&
"LEDCFG0: 38 ,"&
"PWRDWN : 39 ,"&
"MDIO : 42 ,"&
"MDC : 43 ,"&
"RXD3 : 45 ,"&
"RXD2 : 46 ,"&
"RXD1 : 47 ,"&
"RXD0 : 48 ,"&
"RX_DV : 49 ,"&
"RX_CLK : 52 ,"&
"RX_ER : 53 ,"&
"TX_ER : 54 ,"&
"TX_CLK : 55 ,"&
"TX_EN : 56 ,"&
"TXD0 : 57 ,"&
"TXD1 : 58 ,"&
"TXD2 : 59 ,"&
"TXD3 : 60 ,"&
"COL : 62 ,"&
"CRS : 63 ,"&
"MDINT : 64 ";
-- IEEE 1149.1 pin definition
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
-- IEEE 1149.1 compliance enable
attribute COMPLIANCE_PATTERNS of shark: entity is
"(PWRDWN) (0)";
-- IEEE 1149.1 definition for LV Software TAP
attribute INSTRUCTION_LENGTH of shark: entity is 16;
attribute INSTRUCTION_OPCODE of shark: entity is
"IDCODE (1111111111111110)," &
"BYPASS (1111111111111111)," &
"EXTEST (0000000000000000,1111111111101000)," &
"SAMPLE (1111111111111000)," &
"HIGHZ (1111111111001111)," &
"CLAMP (1111111111101111)" ;
attribute INSTRUCTION_CAPTURE of shark: entity is "xxxxxxxxxxxxxx01";
attribute IDCODE_REGISTER of shark: entity is
"0001" & -- revision id 1
"0000001111001011" & -- part number
"11101111110" & -- manufacturer's ID
"1," & -- required by 1149.1
"0010" & -- revision id 2
"0000001111001011" & -- part number
"00001111110" & -- manufacturer's ID
"1"; -- required by 1149.1
attribute REGISTER_ACCESS of shark: entity is
"BYPASS (HIGHZ, CLAMP) " ;
--Boundary scan definition
attribute BOUNDARY_LENGTH of shark: entity is 40;
attribute BOUNDARY_REGISTER of shark: entity is
-- num cell port function safe [ccell disval rslt]
" 0 (BC_2 , MDDIS , input , X ) ,"&
" 1 (BC_2 , Reset , input , X ) ,"&
" 2 (BC_2 , TXSLEW0 , input , X ) ,"&
" 3 (BC_2 , TXSLEW1 , input , X ) ,"&
" 4 (BC_2 , ADDR0 , input , X ) ,"&
" 5 (BC_2 , ADDR1 , input , X ) ,"&
" 6 (BC_2 , ADDR2 , input , X ) ,"&
" 7 (BC_2 , ADDR3 , input , X ) ,"&
" 8 (BC_2 , ADDR4 , input , X ) ,"&
" 9 (BC_2 , SD_TP , input , X ) ,"&
" 10 (BC_2 , SLEEP , input , X ) ,"&
" 11 (BC_2 , PAUSE , input , X ) ,"&
" 12 (BC_2 , TEST0 , input , X ) ,"&
" 13 (BC_2 , TEST1 , input , X ) ,"&
" 14 (BC_2 , * , control , 1 ) ,"&
" 15 (LV_BC_7 , LEDCFG2 , bidir , X , 14 , 1 , Z ),"&
" 16 (LV_BC_7 , LEDCFG1 , bidir , X , 14 , 1 , Z ),"&
" 17 (LV_BC_7 , LEDCFG0 , bidir , X , 14 , 1 , Z ),"&
" 18 (BC_2 , * , internal , 0 ) ,"&
" 19 (LV_BC_7 , MDIO , bidir , X , 14 , 1 , Z ),"&
" 20 (BC_2 , MDC , input , X ) ,"&
" 21 (BC_2 , * , internal , X ) ,"&
" 22 (BC_2 , RXD3 , output3 , X , 14 , 1 , Z ),"&
" 23 (BC_2 , RXD2 , output3 , X , 14 , 1 , Z ),"&
" 24 (BC_2 , RXD1 , output3 , X , 14 , 1 , Z ),"&
" 25 (BC_2 , RXD0 , output3 , X , 14 , 1 , Z ),"&
" 26 (BC_2 , RX_DV , output3 , X , 14 , 1 , Z ),"&
" 27 (BC_2 , RX_CLK , output3 , X , 14 , 1 , Z ),"&
" 28 (BC_2 , RX_ER , output3 , X , 14 , 1 , Z ),"&
" 29 (BC_2 , TX_ER , input , X ) ,"&
" 30 (BC_2 , TX_CLK , output3 , X , 14 , 1 , Z ),"&
" 31 (BC_2 , TX_EN , input , X ) ,"&
" 32 (BC_2 , TXD0 , input , X ) ,"&
" 33 (BC_2 , TXD1 , input , X ) ,"&
" 34 (BC_2 , TXD2 , input , X ) ,"&
" 35 (BC_2 , TXD3 , input , X ) ,"&
" 36 (BC_2 , * , internal , 0 ) ,"&
" 37 (BC_2 , COL , output3 , X , 14 , 1 , Z ),"&
" 38 (BC_2 , CRS , output3 , X , 14 , 1 , Z ),"&
" 39 (BC_2 , MDINT , output3 , X , 14 , 1 , Z ) ";
-- 1149.1 Design Warnings
attribute DESIGN_WARNING of shark: entity is
"PWRDWN pin should be kept low to allow proper operation" &
"of TAP circuitry. There is a compliance enable on this" &
"pin to force the safe value. The boundary scan cell" &
"associated with the PWRDWN pin has been changed to an" &
"internal pin. It is cell number 18 in the boundary scan" &
"register description and has a safe value of 0 specified";
end shark;