HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · tests/Validation_LFR_Filter_Ram_Init

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

MiniSpartan6:...

MiniSpartan6: added ftdi chip config to switch between UART and Async FIFO. added few WIP designs with either spwlight core, FIFO_deom IP... Libs: added SpaceWire Light IP (Works really well!) started design of ahb_ftdi_fifo -> same protocol than AHBUART but over FTDI's Async FIFO interface. This might lead to much faster transfers UP to 12MB/s.

jeandet -


            r681:9d85f9f8f05a

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Name	Size	Modified	Last Commit	Author
/ tests / Validation_LFR_Filter_Ram_Init
Makefile	Loading ...
PlotResults.ipynb	Loading ...
archivate.py	Loading ...
generate.py	Loading ...
run.do.in	Loading ...
tb.vhd	Loading ...

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