HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · tests/Test_APB_ADVANCED_TRIGGER_v/Makefile

Fixed APB mistakes on APB_ADVANCED_TRIGGER....

Fixed APB mistakes on APB_ADVANCED_TRIGGER. Addev vectored version of APB_ADVANCED_TRIGGER-> APB_ADVANCED_TRIGGER_v. Added preliminary support for MiniSpartan6+ board from Scarab Hardware.

Jeandet Alexis - - Load All Authors

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      VHDLIB=../..

      SCRIPTSDIR=$(VHDLIB)/scripts/

      GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)

      TOP=testbench

      BOARD=MiniSpartan6p

      include $(VHDLIB)/boards/$(BOARD)/Makefile.inc

      DEVICE=$(PART)-$(PACKAGE)$(SPEED)

      UCF=./default.ucf

      UCF_PLANAHEAD=$(UCF)

      QSF=

      EFFORT=high

      XSTOPT=-uc testbench.xcf

      SYNPOPT="set_option -pipe 1; set_option -retiming 1; set_option -write_apr_constraint 0"

      VHDLSYNFILES= onboardTest.vhd

      VHDLSIMFILES= tb.vhd

      SIMTOP=testbench

      CLEAN=soft-clean

      TECHLIBS = unisim

      LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \

      	tmtc openchip hynix ihp gleichmann micron usbhc  opencores fmf ftlib gsi

      DIRSKIP = b1553 pcif leon2 leon3v3 leon2ft crypto satcan ddr usb ata i2c \

      	pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 srmmu atf \

      	grlfpc \

      	./dsp/lpp_fft_rtax \

      	./amba_lcd_16x2_ctrlr \

      	./general_purpose/lpp_AMR \

      	./general_purpose/lpp_balise \

      	./general_purpose/lpp_delay \

      	./lpp_bootloader \

      	./lpp_sim/CY7C1061DV33 \

      	./lpp_uart \

      	./lpp_usb \

      	./dsp/lpp_fft \

      	./lpp_leon3_soc \

      	./lpp_debug_lfr

      FILESKIP = i2cmst.vhd \

      	APB_MULTI_DIODE.vhd \

      	APB_MULTI_DIODE.vhd \

      	Top_MatrixSpec.vhd \

      	APB_FFT.vhd \

      	lpp_lfr_ms_FFT.vhd \

      	lpp_lfr_apbreg.vhd \

      	CoreFFT.vhd \

      	lpp_lfr_ms.vhd \

      	lpp_lfr_sim_pkg.vhd \

      	mtie_maps.vhd \

      	ftsrctrlc.vhd \

      	ftsdctrl.vhd \

      	ftsrctrl8.vhd \

      	ftmctrl.vhd \

      	ftsdctrl64.vhd \

      	ftahbram.vhd \

      	ftahbram2.vhd \

      	sramft.vhd \

      	nandfctrlx.vhd

      include $(GRLIB)/bin/Makefile

      include $(GRLIB)/software/leon3/Makefile

      ##################  project specific targets ##########################

      test:ghdl-run

      flash:

      	xc3sprog -c ftdi -p0 testbench.bit

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				VHDLIB=../..
				SCRIPTSDIR=$(VHDLIB)/scripts/
				GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
				TOP=testbench
				BOARD=MiniSpartan6p
				include $(VHDLIB)/boards/$(BOARD)/Makefile.inc
				DEVICE=$(PART)-$(PACKAGE)$(SPEED)
				UCF=./default.ucf
				UCF_PLANAHEAD=$(UCF)
				QSF=
				EFFORT=high
				XSTOPT=-uc testbench.xcf
				SYNPOPT="set_option -pipe 1; set_option -retiming 1; set_option -write_apr_constraint 0"
				VHDLSYNFILES= onboardTest.vhd
				VHDLSIMFILES= tb.vhd
				SIMTOP=testbench
				CLEAN=soft-clean

				TECHLIBS = unisim

				LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
				tmtc openchip hynix ihp gleichmann micron usbhc opencores fmf ftlib gsi

				DIRSKIP = b1553 pcif leon2 leon3v3 leon2ft crypto satcan ddr usb ata i2c \
				pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 srmmu atf \
				grlfpc \
				./dsp/lpp_fft_rtax \
				./amba_lcd_16x2_ctrlr \
				./general_purpose/lpp_AMR \
				./general_purpose/lpp_balise \
				./general_purpose/lpp_delay \
				./lpp_bootloader \
				./lpp_sim/CY7C1061DV33 \
				./lpp_uart \
				./lpp_usb \
				./dsp/lpp_fft \
				./lpp_leon3_soc \
				./lpp_debug_lfr

				FILESKIP = i2cmst.vhd \
				APB_MULTI_DIODE.vhd \
				APB_MULTI_DIODE.vhd \
				Top_MatrixSpec.vhd \
				APB_FFT.vhd \
				lpp_lfr_ms_FFT.vhd \
				lpp_lfr_apbreg.vhd \
				CoreFFT.vhd \
				lpp_lfr_ms.vhd \
				lpp_lfr_sim_pkg.vhd \
				mtie_maps.vhd \
				ftsrctrlc.vhd \
				ftsdctrl.vhd \
				ftsrctrl8.vhd \
				ftmctrl.vhd \
				ftsdctrl64.vhd \
				ftahbram.vhd \
				ftahbram2.vhd \
				sramft.vhd \
				nandfctrlx.vhd

				include $(GRLIB)/bin/Makefile
				include $(GRLIB)/software/leon3/Makefile

				################## project specific targets ##########################


				test:ghdl-run

				flash:
				xc3sprog -c ftdi -p0 testbench.bit