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Fixed APB mistakes on APB_ADVANCED_TRIGGER....
Fixed APB mistakes on APB_ADVANCED_TRIGGER. Addev vectored version of APB_ADVANCED_TRIGGER-> APB_ADVANCED_TRIGGER_v. Added preliminary support for MiniSpartan6+ board from Scarab Hardware.

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r661:9097fee4c1b6 default
r661:9097fee4c1b6 default
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default.ucf
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# Clocks
NET "CLK50" PERIOD = 20 ns | LOC = "K3";
#NET "CLK32" PERIOD = 31.25 ns | LOC = "J4";
# LEDs
NET "LEDS<0>" LOC="P11" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<1>" LOC="N9" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<2>" LOC="M9" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<3>" LOC="P9" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<4>" LOC="T8" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<5>" LOC="N8" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<6>" LOC="P8" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
NET "LEDS<7>" LOC="P7" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;
# DIP Switches
NET "SW<1>" LOC="L1" | IOSTANDARD=LVTTL | PULLUP;
NET "SW<2>" LOC="L3" | IOSTANDARD=LVTTL | PULLUP;
NET "SW<3>" LOC="L4" | IOSTANDARD=LVTTL | PULLUP;
NET "SW<4>" LOC="L5" | IOSTANDARD=LVTTL | PULLUP;
NET "uart_rxd" LOC="M7" | IOSTANDARD=LVTTL;
NET "uart_txd" LOC="N6" | IOSTANDARD=LVTTL;
# SDRAM
NET "dram_udqm" LOC="F15" | IOSTANDARD=LVTTL;
NET "dram_clk" LOC="G16" | IOSTANDARD=LVTTL;
NET "dram_cke" LOC="H16" | IOSTANDARD=LVTTL;
NET "dram_ba_1" LOC="T14" | IOSTANDARD=LVTTL;
NET "dram_ba_0" LOC="R14" | IOSTANDARD=LVTTL;
NET "dram_cs_n" LOC="R1" | IOSTANDARD=LVTTL;
NET "dram_ras_n" LOC="R2" | IOSTANDARD=LVTTL;
NET "dram_cas_n" LOC="T4" | IOSTANDARD=LVTTL;
NET "dram_we_n" LOC="R5" | IOSTANDARD=LVTTL;
NET "dram_ldqm" LOC="T5" | IOSTANDARD=LVTTL;
NET "dram_addr<0>" LOC="T15" | IOSTANDARD=LVTTL;
NET "dram_addr<1>" LOC="R16" | IOSTANDARD=LVTTL;
NET "dram_addr<2>" LOC="P15" | IOSTANDARD=LVTTL;
NET "dram_addr<3>" LOC="P16" | IOSTANDARD=LVTTL;
NET "dram_addr<4>" LOC="N16" | IOSTANDARD=LVTTL;
NET "dram_addr<5>" LOC="M15" | IOSTANDARD=LVTTL;
NET "dram_addr<6>" LOC="M16" | IOSTANDARD=LVTTL;
NET "dram_addr<7>" LOC="L16" | IOSTANDARD=LVTTL;
NET "dram_addr<8>" LOC="K15" | IOSTANDARD=LVTTL;
NET "dram_addr<9>" LOC="K16" | IOSTANDARD=LVTTL;
NET "dram_addr<10>" LOC="R15" | IOSTANDARD=LVTTL;
NET "dram_addr<11>" LOC="J16" | IOSTANDARD=LVTTL;
NET "dram_addr<12>" LOC="H15" | IOSTANDARD=LVTTL;
NET "dram_dq<0>" LOC="T13" | IOSTANDARD=LVTTL;
NET "dram_dq<1>" LOC="T12" | IOSTANDARD=LVTTL;
NET "dram_dq<2>" LOC="R12" | IOSTANDARD=LVTTL;
NET "dram_dq<3>" LOC="T9" | IOSTANDARD=LVTTL;
NET "dram_dq<4>" LOC="R9" | IOSTANDARD=LVTTL;
NET "dram_dq<5>" LOC="T7" | IOSTANDARD=LVTTL;
NET "dram_dq<6>" LOC="R7" | IOSTANDARD=LVTTL;
NET "dram_dq<7>" LOC="T6" | IOSTANDARD=LVTTL;
NET "dram_dq<8>" LOC="F16" | IOSTANDARD=LVTTL;
NET "dram_dq<9>" LOC="E15" | IOSTANDARD=LVTTL;
NET "dram_dq<10>" LOC="E16" | IOSTANDARD=LVTTL;
NET "dram_dq<11>" LOC="D16" | IOSTANDARD=LVTTL;
NET "dram_dq<12>" LOC="B16" | IOSTANDARD=LVTTL;
NET "dram_dq<13>" LOC="B15" | IOSTANDARD=LVTTL;
NET "dram_dq<14>" LOC="C16" | IOSTANDARD=LVTTL;
NET "dram_dq<15>" LOC="C15" | IOSTANDARD=LVTTL;