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------------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2003 - 2008, Gaisler Research
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-- Copyright (C) 2008 - 2010, Aeroflex Gaisler
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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--------------------------------------------------------------------------------
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-- Package: StdIO
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-- File: stdio.vhd
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-- Author: Gaisler Research
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-- Description: Package for common I/O functions
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--------------------------------------------------------------------------------
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-- pragma translate_off
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library Std;
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use Std.Standard.all;
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use Std.TextIO.all;
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library IEEE;
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use IEEE.Std_Logic_1164.all;
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-- pragma translate_on
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package StdIO is
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-- pragma translate_off
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_ULogic_Vector;
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variable GOOD: out Boolean);
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_ULogic_Vector);
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_Logic_Vector;
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variable GOOD: out Boolean);
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_Logic_Vector);
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procedure HWrite(
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variable L: inout Line;
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constant VALUE: in Std_ULogic_Vector;
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constant JUSTIFIED: in SIDE := RIGHT;
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constant FIELD: in WIDTH := 0);
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procedure HWrite(
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variable L: inout Line;
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constant VALUE: in Std_Logic_Vector;
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constant JUSTIFIED: in SIDE := RIGHT;
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constant FIELD: in WIDTH := 0);
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procedure Write(
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variable L: inout Line;
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constant VALUE: in Std_ULogic;
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constant JUSTIFIED: in SIDE := RIGHT;
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constant FIELD: in WIDTH := 0);
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-- pragma translate_on
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end package StdIO;
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package body StdIO is
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-- pragma translate_off
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function ToChar(N: Std_ULogic_Vector(0 to 3)) return Character is
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begin
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case N is
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when "0000" => return('0');
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when "0001" => return('1');
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when "0010" => return('2');
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when "0011" => return('3');
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when "0100" => return('4');
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when "0101" => return('5');
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when "0110" => return('6');
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when "0111" => return('7');
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when "1000" => return('8');
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when "1001" => return('9');
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when "1010" => return('A');
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when "1011" => return('B');
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when "1100" => return('C');
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when "1101" => return('D');
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when "1110" => return('E');
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when "1111" => return('F');
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when others => return('X');
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end case;
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end ToChar;
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function FromChar(C: Character) return Std_ULogic_Vector is
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variable R: Std_ULogic_Vector(0 to 3);
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begin
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case C is
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when '0' => R := "0000";
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when '1' => R := "0001";
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when '2' => R := "0010";
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when '3' => R := "0011";
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when '4' => R := "0100";
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when '5' => R := "0101";
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when '6' => R := "0110";
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when '7' => R := "0111";
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when '8' => R := "1000";
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when '9' => R := "1001";
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when 'A' => R := "1010";
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when 'B' => R := "1011";
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when 'C' => R := "1100";
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when 'D' => R := "1101";
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when 'E' => R := "1110";
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when 'F' => R := "1111";
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when 'a' => R := "1010";
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when 'b' => R := "1011";
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when 'c' => R := "1100";
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when 'd' => R := "1101";
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when 'e' => R := "1110";
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when 'f' => R := "1111";
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when others => R := "XXXX";
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end case;
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return R;
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end FromChar;
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_ULogic_Vector;
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variable GOOD: out Boolean) is
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variable B: Boolean;
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variable C: Character;
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constant SL: Integer := VALUE'Length;
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variable SV: Std_ULogic_Vector(0 to SL-1);
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variable S: String(1 to SL/4-1);
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begin
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if VALUE'Length mod 4 /= 0 then
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GOOD := False;
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SV := (others => 'X');
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VALUE := SV;
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return;
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end if;
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loop
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Read(L, C, B);
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exit when ((C /= ' ') and (C /= CR) and (C /= HT)) or (not B);
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end loop;
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SV(0 to 3) := FromChar(C);
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if Is_X(SV(0 to 3)) or (not B) then
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GOOD := False;
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SV := (others => 'X');
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VALUE := SV;
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return;
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end if;
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Read(L, S, B);
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if not B then
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GOOD := False;
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SV := (others => 'X');
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VALUE := SV;
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return;
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end if;
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for i in 1 to SL/4-1 loop
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SV(4*i to 4*i+3) := FromChar(S(i));
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if Is_X(SV(4*i to 4*i+3)) then
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GOOD := False;
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SV := (others => 'X');
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VALUE := SV;
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return;
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end if;
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end loop;
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GOOD := True;
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VALUE := SV;
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end HRead;
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_ULogic_Vector) is
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variable GOOD: Boolean;
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begin
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HRead(L, VALUE, GOOD);
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assert GOOD
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report "HREAD: access incorrect";
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end HRead;
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_Logic_Vector;
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variable GOOD: out Boolean) is
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variable V: Std_ULogic_Vector(0 to Value'Length-1);
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begin
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HRead(L, V, GOOD);
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VALUE := Std_Logic_Vector(V);
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end HRead;
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procedure HRead(
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variable L: inout Line;
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variable VALUE: out Std_Logic_Vector) is
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variable GOOD: Boolean;
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variable V: Std_ULogic_Vector(0 to Value'Length-1);
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begin
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HRead(L, V, GOOD);
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VALUE := Std_Logic_Vector(V);
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assert GOOD
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report "HREAD: access incorrect";
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end HRead;
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procedure HWrite(
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variable L: inout Line;
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constant VALUE: in Std_ULogic_Vector;
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constant JUSTIFIED: in SIDE := RIGHT;
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constant FIELD: in WIDTH := 0) is
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constant PL: Integer := 4-(VALUE'Length mod 4);
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constant PV: Std_ULogic_Vector(1 to PL) := (others => '0');
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constant TL: Integer := PL + VALUE'Length;
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constant TV: Std_ULogic_Vector(0 to TL-1) := PV & Value;
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variable S: String(1 to TL/4);
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begin
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if PL /= 4 then
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for i in 0 to TL/4 -1 loop
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S(i+1) := ToChar(TV(4*i to 4*i+3));
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end loop;
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Write(L, S(1 to TL/4), JUSTIFIED, FIELD);
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else
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for i in 1 to TL/4 -1 loop
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S(i+1) := ToChar(TV(4*i to 4*i+3));
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end loop;
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Write(L, S(2 to TL/4), JUSTIFIED, FIELD);
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end if;
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end HWrite;
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procedure HWrite(
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variable L: inout Line;
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constant VALUE: in Std_Logic_Vector;
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constant JUSTIFIED: in SIDE := RIGHT;
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constant FIELD: in WIDTH := 0) is
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begin
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HWrite(L, Std_ULogic_Vector(VALUE), JUSTIFIED, FIELD);
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end HWrite;
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procedure Write(
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variable L: inout Line;
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constant VALUE: in Std_ULogic;
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constant JUSTIFIED: in SIDE := RIGHT;
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constant FIELD: in WIDTH := 0) is
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type Char_Array is array (Std_ULogic) of Character;
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constant ToChar: Char_Array := "UX01ZWLH-";
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begin
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Write(L, ToChar(VALUE), JUSTIFIED, FIELD);
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end Write;
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-- pragma translate_on
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end package body StdIO;
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