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WF picker IP + Reg...
WF picker IP + Reg -> the IP is in the reg lib/lpp/lpp_top_lfr_wf_picker.vhd

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r100:fc97c34d69e3 martin
r167:7b2690121175 merge JC
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top.npl
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JDF G
PROJECT top
DESIGN top
DEVFAM PROASIC3
DEVICE PROASIC3
DEVSPEED Std
DEVPKG ""
DEVTOPLEVELMODULETYPE HDL
DEVSIMULATOR Modelsim
DEVGENERATEDSIMULATIONMODEL VHDL
SOURCE config.vhd
SOURCE ahbrom.vhd
SOURCE leon3mp.vhd
SUBLIB grlib VhdlLibrary vhdl
LIBFILE ..\..\lib\grlib\stdlib\version.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\stdlib\config.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\stdlib\stdlib.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\sparc\sparc.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\modgen\multlib.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\modgen\leaves.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\amba.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\devices.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\defmst.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\apbctrl.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\ahbctrl.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\dma2ahb_pkg.vhd grlib vhdl
LIBFILE ..\..\lib\grlib\amba\dma2ahb.vhd grlib vhdl
SUBLIB synplify VhdlLibrary vhdl
SUBLIB techmap VhdlLibrary vhdl
LIBFILE ..\..\lib\techmap\gencomp\gencomp.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\gencomp\netcomp.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\inferred\memory_inferred.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\inferred\ddr_inferred.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\inferred\mul_inferred.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\inferred\ddr_phy_inferred.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\allclkgen.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\allddr.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\allmem.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\allmul.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\allpads.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\alltap.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\clkgen.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\clkmux.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\clkand.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\ddr_ireg.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\ddr_oreg.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\ddrphy.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram64.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram_2p.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram_dp.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncfifo.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\regfile_3p.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\tap.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\techbuf.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\nandtree.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\clkpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\clkpad_ds.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\inpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\inpad_ds.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\iodpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\iopad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\iopad_ds.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\lvds_combo.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\odpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\outpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\outpad_ds.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\toutpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\skew_outpad.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\grspwc_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\grspwc2_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\grlfpw_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\grfpw_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\leon4_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\mul_61x61.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\cpu_disas_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\grusbhc_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\ringosc.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\ssrctrl_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\system_monitor.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\grgates.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\inpad_ddr.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\outpad_ddr.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\iopad_ddr.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram128bw.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram128.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\syncram156bw.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\techmult.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\spictrl_net.vhd techmap vhdl
LIBFILE ..\..\lib\techmap\maps\scanreg.vhd techmap vhdl
SUBLIB spw VhdlLibrary vhdl
LIBFILE ..\..\lib\spw\comp\spwcomp.vhd spw vhdl
LIBFILE ..\..\lib\spw\wrapper\grspw_gen.vhd spw vhdl
LIBFILE ..\..\lib\spw\wrapper\grspw2_gen.vhd spw vhdl
SUBLIB eth VhdlLibrary vhdl
LIBFILE ..\..\lib\eth\comp\ethcomp.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\greth_pkg.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\eth_rstgen.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\eth_edcl_ahb_mst.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\eth_ahb_mst.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\greth_tx.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\greth_rx.vhd eth vhdl
LIBFILE ..\..\lib\eth\core\grethc.vhd eth vhdl
LIBFILE ..\..\lib\eth\wrapper\greth_gen.vhd eth vhdl
LIBFILE ..\..\lib\eth\wrapper\greth_gbit_gen.vhd eth vhdl
SUBLIB opencores VhdlLibrary vhdl
LIBFILE ..\..\lib\opencores\occomp\occomp.vhd opencores vhdl
LIBFILE ..\..\lib\opencores\can\cancomp.vhd opencores vhdl
LIBFILE ..\..\lib\opencores\can\can_top.vhd opencores vhdl
SUBLIB gaisler VhdlLibrary vhdl
LIBFILE ..\..\lib\gaisler\arith\arith.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\arith\mul32.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\arith\div32.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\memctrl\memctrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\memctrl\sdctrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\memctrl\sdctrl64.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\memctrl\sdmctrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\memctrl\srctrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\memctrl\spimctrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\leon3.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmuconfig.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmuiface.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\libmmu.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\libiu.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\libcache.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\libproc3.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\cachemem.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmu_icache.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmu_dcache.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmu_acache.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmutlbcam.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmulrue.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmulru.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmutlb.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmutw.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmu.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mmu_cache.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\cpu_disasx.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\iu3.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\grfpwx.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\mfpwx.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\grlfpwx.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\tbufmem.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\dsu3x.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\dsu3.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\proc3.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\leon3s.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\leon3cg.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\irqmp.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\grfpwxsh.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\grfpushwx.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3\leon3sh.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\leon3ft\leon3ft.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\can\can.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\can\can_mod.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\can\can_oc.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\can\can_mc.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\can\canmux.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\can\can_rd.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\misc.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\rstgen.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\gptimer.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbram.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbdpram.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbtrace.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbtrace_mb.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbtrace_mmb.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbmst.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\grgpio.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbstat.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\logan.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\apbps2.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\charrom_package.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\charrom.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\apbvga.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\svgactrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\i2cmst_gen.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\spictrlx.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\spictrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\i2cslv.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\wild.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\wild2ahb.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\grsysmon.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\gracectrl.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\grgpreg.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahbmst2.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\misc\ahb_mst_iface.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\net\net.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\uart\uart.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\uart\libdcom.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\uart\apbuart.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\uart\dcom.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\uart\dcom_uart.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\uart\ahbuart.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\jtag.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\libjtagcom.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\jtagcom.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\ahbjtag.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\ahbjtag_bsd.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\bscanregs.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\jtag\bscanregsbd.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\greth\ethernet_mac.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\greth\greth.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\greth\greth_mb.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\greth\greth_gbit.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\greth\greth_gbit_mb.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\greth\grethm.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\spacewire\spacewire.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\spacewire\grspw.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\spacewire\grspw2.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\spacewire\grspwm.vhd gaisler vhdl
LIBFILE ..\..\lib\gaisler\gr1553b\gr1553b_pkg.vhd gaisler vhdl
SUBLIB esa VhdlLibrary vhdl
LIBFILE ..\..\lib\esa\memoryctrl\memoryctrl.vhd esa vhdl
LIBFILE ..\..\lib\esa\memoryctrl\mctrl.vhd esa vhdl
SUBLIB fmf VhdlLibrary vhdl
SUBLIB spansion VhdlLibrary vhdl
SUBLIB gsi VhdlLibrary vhdl
SUBLIB lpp VhdlLibrary vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\FRAME_CLK.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_16x2_CFG.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_16x2_DRVR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_16x2_ENGINE.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_2x16_DRIVER.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\LCD_CLK_GENERATOR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\Top_LCD.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\amba_lcd_16x2_ctrlr.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\amba_lcd_16x2_ctrlr\apb_lcd_ctrlr.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\APB_IIR_CEL.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FILTER.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FILTER_RAM_CTRLR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FILTERcfg.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\FilterCTRLR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\IIR_CEL_CTRLR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\IIR_CEL_FILTER.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\RAM.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\RAM_CEL.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\RAM_CTRLR2.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\Top_Filtre_IIR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\iir_filter\iir_filter.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\APB_FFT.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\APB_FFT_half.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\CoreFFT.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\Driver_FFT.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\Flag_Extremum.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\Linker_FFT.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\actar.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\actram.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\fftDp.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\fftSm.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\fft_components.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\lpp_fft.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\primitives.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\dsp\lpp_fft\twiddle.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\ADDRcntr.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\ALU.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\Adder.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\Clk_divider.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\MAC.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_CONTROLER.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_MUX.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_MUX2.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\MAC_REG.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\MUX2.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\Multiplier.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\REG.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\Shifter.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\general_purpose.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_AMR\APB_AMR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_AMR\Clock_multi.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_AMR\Dephaseur.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_AMR\Gene_Rz.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_AMR\bclk_reg.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_AMR\lpp_AMR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_balise\APB_Balise.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_balise\lpp_balise.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_delay\APB_Delay.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_delay\TimerDelay.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\general_purpose\lpp_delay\lpp_delay.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\AD7688_drvr.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\AD7688_spi_if.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\ADS7886_drvr.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\WriteGen_ADC.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\lpp_ad_Conv.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_ad_Conv\lpp_apb_ad_conv.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_amba\APB_MULTI_DIODE.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_amba\APB_SIMPLE_DIODE.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_amba\apb_devices_list.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_amba\lpp_amba.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\APB_CNA.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\CNA_TabloC.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\Convertisseur_config.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\Gene_SYNC.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\Serialize.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\Systeme_Clock.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_cna\lpp_cna.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\ALU_Driver.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\ALU_v2.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\APB_Matrix.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\DriveInputs.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\GetResult.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\MAC_v2.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\Matrix.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\SpectralMatrix.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\Starter.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\TopMatrix_PDR.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\Top_MatrixSpec.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\TwoComplementer.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_matrix\lpp_matrix.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_memory\APB_FIFO.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_memory\SSRAM_plugin.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_memory\lppFIFOx5.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_memory\lpp_FIFO.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_memory\lpp_memory.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_uart\APB_UART.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_uart\BaudGen.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_uart\Shift_REG.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_uart\UART.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_uart\lpp_uart.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_usb\APB_USB.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_usb\RWbuf.vhd lpp vhdl
LIBFILE ..\..\lib\lpp\.\lpp_usb\lpp_usb.vhd lpp vhdl
SUBLIB work VhdlLibrary vhdl
DEPASSOC top ..\..\boards\Projet-Blanc-M7A3P1K\top.ucf
[Normal]
_SynthFsmEncode=xstvhd, PROASIC3, VHDL.t_synthesize, 1102507235, None
p_xstBusDelimiter=xstvhd, PROASIC3, VHDL.t_synthesize, 1102507235, ()
xilxMapAllowLogicOpt=xstvhd, PROASIC3, VHDL.t_placeAndRouteDes, 1102861051, True
xilxMapCoverMode=xstvhd, PROASIC3, VHDL.t_placeAndRouteDes, 1102861051, Speed
xilxMapTimingDrivenPacking=xstvhd, PROASIC3, VHDL.t_placeAndRouteDes, 1102861051, True
xilxNgdbld_AUL=xstvhd, PROASIC3, VHDL.t_placeAndRouteDes, 1102861051, True
xilxNgdbldMacro=xstvhd, PROASIC3, VHDL.t_ngdbuild, 1105377047, ..\..\netlists\xilinx\PROASIC3
xilxPAReffortLevel=xstvhd, PROASIC3, VHDL.t_placeAndRouteDes, 1102861051, Medium
[STRATEGY-LIST]
Normal=True
DEVSYNTHESISTOOL XST (VHDL/Verilog)