HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/leon3-APB_LCD-digilent-xc3s1600e/leon3mp_designer_act.tcl

LPP IIR FILTER v2.0.0...

LPP IIR FILTER v2.0.0 ADConv v1.1.0 - Re-design of the IIR Filter to compute more "rapidly" (in term of number of cycle) - Re-design of the ADConv to respect the resync rules - Add a global TB for IIR Filter and ADConv in designs/Projet-LeonLFR-AP3K-Sheldon_sim-all

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             leon3mp_designer_act.tcl
        
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             / designs / leon3-APB_LCD-digilent-xc3s1600e / leon3mp_designer_act.tcl
          
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      new_design -name "leon3mp" -family "Spartan3E" 

      set_device -die "xc3s1600e" -package " " -speed "-4" -voltage "1.5" -iostd "LVTTL" -jtag "yes" -probe "yes" -trst "yes" -temprange "" -voltrange "" 

      if {[file exist leon3mp.pdc]} {

      import_source -format "edif" -edif_flavor "GENERIC"  -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf} -format "pdc" -abort_on_error "no" {leon3mp.pdc}

      } else {

      import_source -format "edif" -edif_flavor "GENERIC"  -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf}

      }

      save_design {leon3mp.adb}

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				new_design -name "leon3mp" -family "Spartan3E"
				set_device -die "xc3s1600e" -package " " -speed "-4" -voltage "1.5" -iostd "LVTTL" -jtag "yes" -probe "yes" -trst "yes" -temprange "" -voltrange ""
				if {[file exist leon3mp.pdc]} {
				import_source -format "edif" -edif_flavor "GENERIC" -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf} -format "pdc" -abort_on_error "no" {leon3mp.pdc}
				} else {
				import_source -format "edif" -edif_flavor "GENERIC" -merge_physical "no" -merge_timing "no" {synplify/leon3mp.edf}
				}
				save_design {leon3mp.adb}