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Added missing files (sdc/pdc/makefile) for LFR-EQM boards...
Added missing files (sdc/pdc/makefile) for LFR-EQM boards Improved Validation IIR LFR design Update LFR Filter, first implementation of filter RAM Init.

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r129:8459a437c1f1 alexis
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leon3mp.ucf
42 lines | 1.6 KiB | text/plain | TextLexer
#NET "clkm" TNM_NET = "clkm";
CONFIG VCCAUX=2.5;
CONFIG MCB_PERFORMANCE= EXTENDED;
NET "clk27" period = 37.000 ;
NET "clk33" period = 30.000 ;
NET "clk200p" period = 5.000 ;
NET "clk33" LOC = "N19" | IOSTANDARD = LVCMOS25;
# XST versions of MIG false paths
#Please uncomment the below TIG if used in a design which enables self-refresh mode
#NET "mig_gen.ddrc/MCB_inst/memc?_wrapper_inst/memc?_mcb_raw_wrapper_inst/gen_term_calib.mcb_soft_calibration_top_inst/mcb_soft_calibration_inst/SELFREFRESH_MCB_REQ" TIG;
NET "reset" LOC = "h8" | IOSTANDARD = LVCMOS15;
NET "clk200p" LOC = "k21" | IOSTANDARD =LVDS_25;
NET "clk200n" LOC = "k22" | IOSTANDARD =LVDS_25;
NET "txd1" LOC = "h17" | IOSTANDARD = LVCMOS25;
NET "rxd1" LOC = "b21" | IOSTANDARD = LVCMOS25;
NET "ctsn1" LOC = "f18" | IOSTANDARD = LVCMOS25;
NET "rtsn1" LOC = "f19" | IOSTANDARD = LVCMOS25;
NET "switch(3)" LOC = "e4" | IOSTANDARD = LVCMOS15; # DIP switch s2-4
NET "switch(2)" LOC = "w6" | IOSTANDARD = LVCMOS25; # DIP switch s2-3
NET "switch(1)" LOC = "y6" | IOSTANDARD = LVCMOS25; # DIP switch s2-2
NET "switch(0)" LOC = "c18" | IOSTANDARD = LVCMOS25; # DIP switch s2-1
NET "button(0)" LOC = "f3" | IOSTANDARD = LVCMOS15;
NET "button(1)" LOC = "g6" | IOSTANDARD = LVCMOS15;
NET "button(2)" LOC = "f5" | IOSTANDARD = LVCMOS15;
NET "button(3)" LOC = "c1" | IOSTANDARD = LVCMOS15;
NET "led(3)" LOC = "w15" | IOSTANDARD = LVCMOS25;
NET "led(2)" LOC = "d21" | IOSTANDARD = LVCMOS25;
NET "led(1)" LOC = "ab4" | IOSTANDARD = LVCMOS25; # normally used for ERRORN
NET "led(0)" LOC = "d17" | IOSTANDARD = LVCMOS25; # normally used for DSUACT