##// END OF EJS Templates
Added missing files (sdc/pdc/makefile) for LFR-EQM boards...
Added missing files (sdc/pdc/makefile) for LFR-EQM boards Improved Validation IIR LFR design Update LFR Filter, first implementation of filter RAM Init.

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r639:5ffe6bd0368c default
r639:5ffe6bd0368c default
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Makefile_RTAX.inc
41 lines | 733 B | text/x-povray | PovrayLexer
PACKAGE=CQFP352
SPEED=Std
SYNFREQ=50
TECHNOLOGY=Axcelerator
DESIGNER_PACKAGE=CQFP
DESIGNER_PINS=352
DESIGNER_VOLTAGE=COM
DESIGNER_TEMP=COM
#ifeq ("$(FPGA_RTAX4000)","S")
# LIBERO_DIE=70800rts
# PART=RTAX4000S
# LIBERO_PACKAGE=cqfp$(DESIGNER_PINS)r
#endif
#ifeq ("$(FPGA_RTAX4000)","D")
LIBERO_DIE=70800d
PART=RTAX4000D
LIBERO_PACKAGE=cq$(DESIGNER_PINS)
#endif
MANUFACTURER=Actel
MGCPART=$(PART)
MGCTECHNOLOGY=Axcelerator
MGCPACKAGE= {$(DESIGNER_PINS) $(DESIGNER_PACKAGE)}
## RTAX4000S OPTIONS
#LIBERO_DIE=70800rts
#PART=RTAX4000S
## RTAX4000D OPTIONS
#LIBERO_DIE=70800d
#PART=RTAX4000D
# RTAX4000D
#LIBERO_PACKAGE=cq$(DESIGNER_PINS)
# RTAX4000S
#LIBERO_PACKAGE=cqfp$(DESIGNER_PINS)r