HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · designs/ProjetBlanc-LeonLPP-M7A3P1k/simulation/modelsim.ini.sav

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HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib

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Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

DAC CAL input data via Registre_data Driver C

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/ designs / ProjetBlanc-LeonLPP-M7A3P1k / simulation / modelsim.ini.sav

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				[Library]
				others = $MODEL_TECH/../modelsim.ini

				proasic3 = C:/Actel/LIBERO~1.1/Designer/lib/modelsim/precompiled/vhdl/proasic3
				syncad_vhdl_lib = C:\Actel\LIBERO~1.1\Designer/lib/actel/syncad_vhdl_lib

				[vcom]
				VHDL93 = 1

				[vsim]
				IterationLimit = 5000

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