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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-- jean-christophe.pellion@easii-ic.com
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-------------------------------------------------------------------------------
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LIBRARY IEEE;
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USE IEEE.STD_LOGIC_1164.ALL;
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USE ieee.numeric_std.ALL;
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LIBRARY grlib;
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USE grlib.amba.ALL;
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USE grlib.stdlib.ALL;
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USE grlib.devices.ALL;
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USE GRLIB.DMA2AHB_Package.ALL;
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LIBRARY lpp;
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USE lpp.lpp_waveform_pkg.ALL;
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LIBRARY techmap;
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USE techmap.gencomp.ALL;
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ENTITY lpp_waveform_genaddress_single IS
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GENERIC (
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nb_burst_available_size : INTEGER);
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PORT (
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clk : IN STD_LOGIC;
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rstn : IN STD_LOGIC;
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run : IN STD_LOGIC;
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-------------------------------------------------------------------------
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-- CONFIG
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-------------------------------------------------------------------------
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nb_data_by_buffer : IN STD_LOGIC_VECTOR(nb_burst_available_size-1 DOWNTO 0);
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addr_data_f3 : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
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-------------------------------------------------------------------------
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-- CTRL
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-------------------------------------------------------------------------
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empty : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
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empty_almost : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
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data_ren : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
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--burst : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
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-------------------------------------------------------------------------
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-- STATUS
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-------------------------------------------------------------------------
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status_full : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
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status_full_ack : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
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status_full_err : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
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-------------------------------------------------------------------------
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-- ADDR DATA OUT
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-------------------------------------------------------------------------
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data_f0_data_out_valid_burst : OUT STD_LOGIC;
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data_f1_data_out_valid_burst : OUT STD_LOGIC;
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data_f2_data_out_valid_burst : OUT STD_LOGIC;
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data_f3_data_out_valid_burst : OUT STD_LOGIC;
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data_f0_data_out_valid : OUT STD_LOGIC;
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data_f1_data_out_valid : OUT STD_LOGIC;
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data_f2_data_out_valid : OUT STD_LOGIC;
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data_f3_data_out_valid : OUT STD_LOGIC;
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data_f0_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
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data_f1_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
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data_f2_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
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data_f3_addr_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0)
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);
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END lpp_waveform_genaddress_single;
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ARCHITECTURE beh OF lpp_waveform_genaddress_single IS
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BEGIN -- beh
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END beh;
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