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LFR-EQM 2.1.82 - b...
LFR-EQM 2.1.82 - b > SMP_CLK @ 24576MHz/25 = 983.03Hz > OEn active during one cycle > sample ADC_DATA one cycle after the OEn SMP_CLK --------|___________ CLK_25Mhz-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_| ADC_OEn ------------|___|----- ADC_DATA ****************{data} ADC_DATA_reg****************{data}

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vhdlsyn.txt
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lpp_lfr_management.vhd
lpp_lfr_management_apbreg_pkg.vhd
apb_lfr_management.vhd
lfr_time_management.vhd
fine_time_counter.vhd
coarse_time_counter.vhd
fine_time_max_value_gen.vhd