##// END OF EJS Templates
HG_REPOSITORIES » LPP » INSTRUMENTATION » USERS » PELLION » VHD_Lib
RSS

Clone from http://pc-instru.lpp.polytechnique.fr:5000/VHD_Lib

LFR-EQM 2.1.82 - b...
LFR-EQM 2.1.82 - b > SMP_CLK @ 24576MHz/25 = 983.03Hz > OEn active during one cycle > sample ADC_DATA one cycle after the OEn SMP_CLK --------|___________ CLK_25Mhz-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_| ADC_OEn ------------|___|----- ADC_DATA ****************{data} ADC_DATA_reg****************{data}
Alexis - - Load All Authors

File last commit:

r20:4ef18b3e796e default
r600:1d46c91bda8b simu_with_Leon3
Show More
AD7688_drvr.prj
5 lines | 279 B | text/plain | TextLexer
/ designs / leon3-APB_LCD-digilent-xc3s1600e / AD7688_drvr.prj
History | Annotation | Raw |Copy content |Copy permalink
vhdl lpp "../../lib/lpp/lpp_ad_Conv/lpp_ad_Conv.vhd"
vhdl lpp "../../lib/lpp/general_purpose/general_purpose.vhd"
vhdl lpp "../../lib/lpp/lpp_ad_Conv/AD7688_spi_if.vhd"
vhdl lpp "../../lib/lpp/general_purpose/Clk_divider.vhd"
vhdl lpp "../../lib/lpp/lpp_ad_Conv/AD7688_drvr.vhd"