HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · boards/SP601/fpga.cmd

LFR-EQM 2.1.82 - b...

LFR-EQM 2.1.82 - b > SMP_CLK @ 24576MHz/25 = 983.03Hz > OEn active during one cycle > sample ADC_DATA one cycle after the OEn SMP_CLK --------|___________ CLK_25Mhz-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_| ADC_OEn ------------|___|----- ADC_DATA ****************{data} ADC_DATA_reg****************{data}

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simu_with_Leon3

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             fpga.cmd
        
                    7 lines
            
             | 142 B
            
                | application/x-dos-batch
            
             |
                BatchLexer

/ boards / SP601 / fpga.cmd

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				setMode -bs
				setCable -port auto
				Identify
				identifyMPM
				assignFile -p 1 -file "xilinx-sp601-xc6slx16.bit"
				Program -p 1 -defaultVersion 0
				quit

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