##// END OF EJS Templates
LFR-EQM 2.1.82 - b...
LFR-EQM 2.1.82 - b > SMP_CLK @ 24576MHz/25 = 983.03Hz > OEn active during one cycle > sample ADC_DATA one cycle after the OEn SMP_CLK --------|___________ CLK_25Mhz-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_|-|_| ADC_OEn ------------|___|----- ADC_DATA ****************{data} ADC_DATA_reg****************{data}

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r238:7261cc5a3ccc martin
r600:1d46c91bda8b simu_with_Leon3
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Makefile
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#------------------------------------------------------------------------------
#-- This file is a part of the LPP VHDL IP LIBRARY
#-- Copyright (C) 2010, Laboratory of Plasmas Physic - CNRS
#--
#-- This program is free software; you can redistribute it and/or modify
#-- it under the terms of the GNU General Public License as published by
#-- the Free Software Foundation; either version 3 of the License, or
#-- (at your option) any later version.
#--
#-- This program is distributed in the hope that it will be useful,
#-- but WITHOUT ANY WARRANTY; without even the implied warranty of
#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
#-- GNU General Public License for more details.
#--
#-- You should have received a copy of the GNU General Public License
#-- along with this program; if not, write to the Free Software
#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#------------------------------------------------------------------------------
all:
make all -C ScanAPB
make all -C APB_lcd_ctrlr
make all -C BenchFIFO
make all -C BenchUART
make all -C BenchFFT
make all -C BenchGPIO
make all -C BenchMatrix
make all -C BenchFFT+Matrix
make all -C BenchDAC_CAL