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-- ADS1274_DRIVER.vhd
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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library lpp;
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use lpp.lpp_ad_conv.all;
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use lpp.general_purpose.all;
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entity DUAL_ADS1278_DRIVER is
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port(
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Clk : in std_logic;
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reset : in std_logic;
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SpiClk : out std_logic;
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DIN : in std_logic_vector(1 downto 0);
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SmplClk : in std_logic;
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OUT00 : out std_logic_vector(23 downto 0);
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OUT01 : out std_logic_vector(23 downto 0);
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OUT02 : out std_logic_vector(23 downto 0);
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OUT03 : out std_logic_vector(23 downto 0);
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OUT04 : out std_logic_vector(23 downto 0);
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OUT05 : out std_logic_vector(23 downto 0);
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OUT06 : out std_logic_vector(23 downto 0);
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OUT07 : out std_logic_vector(23 downto 0);
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OUT10 : out std_logic_vector(23 downto 0);
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OUT11 : out std_logic_vector(23 downto 0);
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OUT12 : out std_logic_vector(23 downto 0);
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OUT13 : out std_logic_vector(23 downto 0);
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OUT14 : out std_logic_vector(23 downto 0);
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OUT15 : out std_logic_vector(23 downto 0);
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OUT16 : out std_logic_vector(23 downto 0);
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OUT17 : out std_logic_vector(23 downto 0);
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FSynch : out std_logic
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);
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end DUAL_ADS1278_DRIVER;
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architecture ar_DUAL_ADS1278_DRIVER of DUAL_ADS1278_DRIVER is
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signal Vec00,Vec01,Vec02,Vec03,Vec04,Vec05,Vec06,Vec07,Vec10,Vec11,Vec12,Vec13,Vec14,Vec15,Vec16,Vec17 : std_logic_vector(23 downto 0);
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signal SmplClk_Reg : std_logic:= '0';
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signal N : integer range 0 to 23*8 := 0;
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signal SPI_CLk : std_logic;
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signal SmplClk_clkd : std_logic:= '0';
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begin
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CLKDIV0 : Clk_Divider2
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generic map(16)
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port map(Clk,SPI_CLk);
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FSynch <= SmplClk_clkd;
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SpiClk <= SPI_CLk;
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process(reset,SPI_CLk)
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begin
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if reset = '0' then
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Vec00 <= (others => '0');
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Vec01 <= (others => '0');
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Vec02 <= (others => '0');
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Vec03 <= (others => '0');
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Vec04 <= (others => '0');
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Vec05 <= (others => '0');
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Vec06 <= (others => '0');
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Vec07 <= (others => '0');
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Vec10 <= (others => '0');
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Vec11 <= (others => '0');
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Vec12 <= (others => '0');
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Vec13 <= (others => '0');
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Vec14 <= (others => '0');
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Vec15 <= (others => '0');
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Vec16 <= (others => '0');
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Vec17 <= (others => '0');
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N <= 0;
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elsif SPI_CLk'event and SPI_CLk = '1' then
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-- SmplClk_clkd <= SmplClk;
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-- SmplClk_Reg <= SmplClk_clkd;
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--if ((SmplClk_clkd = '1' and SmplClk_Reg = '0') or (N /= 0)) then
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if ((SmplClk_clkd = '1' and SmplClk_Reg = '0') or (N /= 0)) then
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--Vec0(0) <= DIN(0);
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--Vec1(0) <= DIN(1);
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--Vec2(0) <= DIN(2);
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--Vec3(0) <= DIN(3);
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--Vec0(23 downto 1) <= Vec0(22 downto 0);
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--Vec1(23 downto 1) <= Vec1(22 downto 0);
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--Vec2(23 downto 1) <= Vec2(22 downto 0);
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--Vec3(23 downto 1) <= Vec3(22 downto 0);
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Vec00(0) <= DIN(0);
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Vec00(23 downto 1) <= Vec00(22 downto 0);
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Vec01(0) <= Vec00(23);
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Vec01(23 downto 1) <= Vec01(22 downto 0);
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Vec02(0) <= Vec01(23);
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Vec02(23 downto 1) <= Vec02(22 downto 0);
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Vec03(0) <= Vec02(23);
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Vec03(23 downto 1) <= Vec03(22 downto 0);
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Vec04(0) <= Vec03(23);
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Vec04(23 downto 1) <= Vec04(22 downto 0);
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Vec05(0) <= Vec04(23);
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Vec05(23 downto 1) <= Vec05(22 downto 0);
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Vec06(0) <= Vec05(23);
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Vec06(23 downto 1) <= Vec06(22 downto 0);
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Vec07(0) <= Vec06(23);
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Vec07(23 downto 1) <= Vec07(22 downto 0);
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Vec10(0) <= DIN(1);
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Vec10(23 downto 1) <= Vec10(22 downto 0);
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Vec11(0) <= Vec10(23);
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Vec11(23 downto 1) <= Vec11(22 downto 0);
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Vec12(0) <= Vec11(23);
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Vec12(23 downto 1) <= Vec12(22 downto 0);
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Vec13(0) <= Vec12(23);
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Vec13(23 downto 1) <= Vec13(22 downto 0);
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Vec14(0) <= Vec13(23);
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Vec14(23 downto 1) <= Vec14(22 downto 0);
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Vec15(0) <= Vec14(23);
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Vec15(23 downto 1) <= Vec15(22 downto 0);
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Vec16(0) <= Vec15(23);
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Vec16(23 downto 1) <= Vec16(22 downto 0);
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Vec17(0) <= Vec16(23);
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Vec17(23 downto 1) <= Vec17(22 downto 0);
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if N = (23*8) then
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N <= 0;
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else
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N <= N+1;
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end if;
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end if;
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end if;
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end process;
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process(SPI_CLk)
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begin
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if SPI_CLk'event and SPI_CLk ='0' then
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SmplClk_clkd <= SmplClk;
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SmplClk_Reg <= SmplClk_clkd;
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end if;
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end process;
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process(SPI_CLk)
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begin
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if SPI_CLk'event and SPI_CLk ='1' then
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if N = 0 then
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OUT00 <= Vec00;
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OUT01 <= Vec01;
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OUT02 <= Vec02;
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OUT03 <= Vec03;
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OUT04 <= Vec04;
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OUT05 <= Vec05;
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OUT06 <= Vec06;
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OUT07 <= Vec07;
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OUT10 <= Vec10;
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OUT11 <= Vec11;
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OUT12 <= Vec12;
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OUT13 <= Vec13;
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OUT14 <= Vec14;
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OUT15 <= Vec15;
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OUT16 <= Vec16;
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OUT17 <= Vec17;
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end if;
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end if;
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end process;
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end ar_DUAL_ADS1278_DRIVER;
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