##// END OF EJS Templates
add HK debug
pellion -
r533:c48ab309a6b7 (LFR-EM) WFP_MS_1-1-60 JC
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@@ -391,7 +391,7 BEGIN -- beh
391 pirq_ms => 6,
391 pirq_ms => 6,
392 pirq_wfp => 14,
392 pirq_wfp => 14,
393 hindex => 2,
393 hindex => 2,
394 top_lfr_version => X"01013B") -- aa.bb.cc version
394 top_lfr_version => X"01013C") -- aa.bb.cc version
395 -- AA : BOARD NUMBER
395 -- AA : BOARD NUMBER
396 -- 0 => MINI_LFR
396 -- 0 => MINI_LFR
397 -- 1 => EM
397 -- 1 => EM
@@ -151,6 +151,9 ARCHITECTURE Behavioral OF apb_lfr_manag
151 SIGNAL DAC_CFG : STD_LOGIC_VECTOR(3 DOWNTO 0);
151 SIGNAL DAC_CFG : STD_LOGIC_VECTOR(3 DOWNTO 0);
152 SIGNAL DAC_CAL_EN_s : STD_LOGIC;
152 SIGNAL DAC_CAL_EN_s : STD_LOGIC;
153
153
154 SIGNAL HK_debug_mode : STD_LOGIC;
155 SIGNAL HK_sel_debug : STD_LOGIC_VECTOR(1 DOWNTO 0);
156
154 BEGIN
157 BEGIN
155
158
156 LFR_soft_rstn <= NOT r.LFR_soft_reset;
159 LFR_soft_rstn <= NOT r.LFR_soft_reset;
@@ -214,7 +217,9 BEGIN
214 Rdata(0) <= r.ctrl;
217 Rdata(0) <= r.ctrl;
215 Rdata(1) <= r.soft_reset;
218 Rdata(1) <= r.soft_reset;
216 Rdata(2) <= r.LFR_soft_reset;
219 Rdata(2) <= r.LFR_soft_reset;
217 Rdata(31 DOWNTO 3) <= (OTHERS => '0');
220 Rdata(3) <= HK_debug_mode;
221 Rdata(5 DOWNTO 4) <= HK_sel_debug;
222 Rdata(31 DOWNTO 6) <= (OTHERS => '0');
218 WHEN ADDR_LFR_MANAGMENT_TIME_LOAD =>
223 WHEN ADDR_LFR_MANAGMENT_TIME_LOAD =>
219 Rdata(30 DOWNTO 0) <= r.coarse_time_load(30 DOWNTO 0);
224 Rdata(30 DOWNTO 0) <= r.coarse_time_load(30 DOWNTO 0);
220 WHEN ADDR_LFR_MANAGMENT_TIME_COARSE =>
225 WHEN ADDR_LFR_MANAGMENT_TIME_COARSE =>
@@ -260,6 +265,8 BEGIN
260 r.ctrl <= apbi.pwdata(0);
265 r.ctrl <= apbi.pwdata(0);
261 r.soft_reset <= apbi.pwdata(1);
266 r.soft_reset <= apbi.pwdata(1);
262 r.LFR_soft_reset <= apbi.pwdata(2);
267 r.LFR_soft_reset <= apbi.pwdata(2);
268 HK_debug_mode <= apbi.pwdata(3);
269 HK_sel_debug <= apbi.pwdata(5 DOWNTO 4);
263 WHEN ADDR_LFR_MANAGMENT_TIME_LOAD =>
270 WHEN ADDR_LFR_MANAGMENT_TIME_LOAD =>
264 r.coarse_time_load <= apbi.pwdata(30 DOWNTO 0);
271 r.coarse_time_load <= apbi.pwdata(30 DOWNTO 0);
265 coarsetime_reg_updated <= '1';
272 coarsetime_reg_updated <= '1';
@@ -440,7 +447,6 BEGIN
440 -- for 14, the update frequency is
447 -- for 14, the update frequency is
441 -- 4Hz and update for each
448 -- 4Hz and update for each
442 -- HK is 1.33Hz
449 -- HK is 1.33Hz
443
444 BEGIN -- PROCESS
450 BEGIN -- PROCESS
445 IF resetn = '0' THEN -- asynchronous reset (active low)
451 IF resetn = '0' THEN -- asynchronous reset (active low)
446
452
@@ -458,9 +464,27 BEGIN
458 IF previous_fine_time_bit = NOT(fine_time_s(BIT_FREQUENCY_UPDATE)) THEN
464 IF previous_fine_time_bit = NOT(fine_time_s(BIT_FREQUENCY_UPDATE)) THEN
459 previous_fine_time_bit <= fine_time_s(BIT_FREQUENCY_UPDATE);
465 previous_fine_time_bit <= fine_time_s(BIT_FREQUENCY_UPDATE);
460 CASE HK_sel_s IS
466 CASE HK_sel_s IS
461 WHEN "00" => r.HK_temp_0 <= HK_sample; HK_sel_s <= "01";
467 WHEN "00" =>
462 WHEN "01" => r.HK_temp_1 <= HK_sample; HK_sel_s <= "10";
468 r.HK_temp_0 <= HK_sample;
463 WHEN "10" => r.HK_temp_2 <= HK_sample; HK_sel_s <= "00";
469 IF HK_debug_mode = '1' THEN
470 HK_sel_s <= HK_sel_debug;
471 ELSE
472 HK_sel_s <= "01";
473 END IF;
474 WHEN "01" =>
475 r.HK_temp_1 <= HK_sample;
476 IF HK_debug_mode = '1' THEN
477 HK_sel_s <= HK_sel_debug;
478 ELSE
479 HK_sel_s <= "10";
480 END IF;
481 WHEN "10" =>
482 r.HK_temp_2 <= HK_sample;
483 IF HK_debug_mode = '1' THEN
484 HK_sel_s <= HK_sel_debug;
485 ELSE
486 HK_sel_s <= "00";
487 END IF;
464 WHEN OTHERS => NULL;
488 WHEN OTHERS => NULL;
465 END CASE;
489 END CASE;
466 END IF;
490 END IF;
@@ -504,4 +528,4 BEGIN
504 );
528 );
505
529
506 DAC_CAL_EN <= DAC_CAL_EN_s;
530 DAC_CAL_EN <= DAC_CAL_EN_s;
507 END Behavioral; No newline at end of file
531 END Behavioral;
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