@@ -0,0 +1,181 | |||
|
1 | ------------------------------------------------------------------------------ | |
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |
|
4 | -- | |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
|
6 | -- it under the terms of the GNU General Public License as published by | |
|
7 | -- the Free Software Foundation; either version 2 of the License, or | |
|
8 | -- (at your option) any later version. | |
|
9 | -- | |
|
10 | -- This program is distributed in the hope that it will be useful, | |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | -- GNU General Public License for more details. | |
|
14 | -- | |
|
15 | -- You should have received a copy of the GNU General Public License | |
|
16 | -- along with this program; if not, write to the Free Software | |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | ---------------------------------------------------------------------------------- | |
|
20 | -- Company: | |
|
21 | -- Engineer: | |
|
22 | -- | |
|
23 | -- Create Date: 08:44:41 10/14/2010 | |
|
24 | -- Design Name: | |
|
25 | -- Module Name: Top_LCD - Behavioral | |
|
26 | -- Project Name: | |
|
27 | -- Target Devices: | |
|
28 | -- Tool versions: | |
|
29 | -- Description: | |
|
30 | -- | |
|
31 | -- Dependencies: | |
|
32 | -- | |
|
33 | -- Revision: | |
|
34 | -- Revision 0.01 - File Created | |
|
35 | -- Additional Comments: | |
|
36 | -- | |
|
37 | ---------------------------------------------------------------------------------- | |
|
38 | library IEEE; | |
|
39 | use IEEE.STD_LOGIC_1164.ALL; | |
|
40 | use ieee.numeric_std.all; | |
|
41 | library grlib; | |
|
42 | use grlib.amba.all; | |
|
43 | use grlib.stdlib.all; | |
|
44 | use grlib.devices.all; | |
|
45 | library lpp; | |
|
46 | use lpp.amba_lcd_16x2_ctrlr.all; | |
|
47 | use lpp.LCD_16x2_CFG.all; | |
|
48 | use lpp.lpp_amba.all; | |
|
49 | ||
|
50 | entity apb_lcd_ctrlr is | |
|
51 | generic ( | |
|
52 | pindex : integer := 0; | |
|
53 | paddr : integer := 0; | |
|
54 | pmask : integer := 16#fff#; | |
|
55 | pirq : integer := 0; | |
|
56 | abits : integer := 8); | |
|
57 | port ( | |
|
58 | rst : in std_ulogic; | |
|
59 | clk : in std_ulogic; | |
|
60 | apbi : in apb_slv_in_type; | |
|
61 | apbo : out apb_slv_out_type; | |
|
62 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |
|
63 | LCD_RS : out STD_LOGIC; | |
|
64 | LCD_RW : out STD_LOGIC; | |
|
65 | LCD_E : out STD_LOGIC; | |
|
66 | LCD_RET : out STD_LOGIC; | |
|
67 | LCD_CS1 : out STD_LOGIC; | |
|
68 | LCD_CS2 : out STD_LOGIC; | |
|
69 | SF_CE0 : out std_logic | |
|
70 | ); | |
|
71 | end apb_lcd_ctrlr; | |
|
72 | ||
|
73 | architecture Behavioral of apb_lcd_ctrlr is | |
|
74 | ||
|
75 | signal FramBUFF : STD_LOGIC_VECTOR(16*2*8-1 downto 0); | |
|
76 | signal CMD : std_logic_vector(10 downto 0); | |
|
77 | signal Exec : std_logic; | |
|
78 | signal Ready : std_logic; | |
|
79 | signal LCD_CTRL : LCD_DRVR_CTRL_BUSS; | |
|
80 | ||
|
81 | ||
|
82 | ||
|
83 | constant REVISION : integer := 1; | |
|
84 | ||
|
85 | constant pconfig : apb_config_type := ( | |
|
86 | 0 => ahb_device_reg (VENDOR_LPP, LPP_LCD_CTRLR, 0, REVISION, 0), | |
|
87 | 1 => apb_iobar(paddr, pmask)); | |
|
88 | ||
|
89 | ||
|
90 | --type FRM_Buff_El is std_logic_vector(31 downto 0); | |
|
91 | type FRM_Buff_Reg is array(31 downto 0) of std_logic_vector(31 downto 0); | |
|
92 | ||
|
93 | ||
|
94 | type LCD_ctrlr_Reg is record | |
|
95 | CTRL_Reg : std_logic_vector(31 downto 0); | |
|
96 | FRAME_BUFF : FRM_Buff_Reg; | |
|
97 | end record; | |
|
98 | ||
|
99 | signal r : LCD_ctrlr_Reg; | |
|
100 | ||
|
101 | ||
|
102 | begin | |
|
103 | ||
|
104 | LCD_data <= LCD_CTRL.LCD_DATA; | |
|
105 | LCD_RS <= LCD_CTRL.LCD_RS; | |
|
106 | LCD_RW <= LCD_CTRL.LCD_RW; | |
|
107 | LCD_E <= LCD_CTRL.LCD_E; | |
|
108 | ||
|
109 | ||
|
110 | LCD_RET <= '0'; | |
|
111 | LCD_CS1 <= '0'; | |
|
112 | LCD_CS2 <= '0'; | |
|
113 | ||
|
114 | SF_CE0 <= '1'; | |
|
115 | ||
|
116 | CMD(7 downto 0) <= r.CTRL_Reg(7 downto 0); --CMD value | |
|
117 | CMD(9 downto 8) <= r.CTRL_Reg(9 downto 8); --CMD tempo value | |
|
118 | ||
|
119 | r.CTRL_Reg(10) <= Ready; | |
|
120 | ||
|
121 | Driver0 : LCD_16x2_ENGINE | |
|
122 | generic map(50000) | |
|
123 | Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL); | |
|
124 | ||
|
125 | FRM_BF : for i in 0 to 15 generate | |
|
126 | FramBUFF((8*(i+1))-1 downto 8*i) <= r.FRAME_BUFF(i)(7 downto 0); | |
|
127 | end generate; | |
|
128 | ||
|
129 | ||
|
130 | process(rst,clk) | |
|
131 | begin | |
|
132 | if rst = '0' then | |
|
133 | r.CTRL_Reg(9 downto 0) <= (others => '0'); | |
|
134 | apbo.prdata <= (others => '0'); | |
|
135 | Exec <= '0'; | |
|
136 | elsif clk'event and clk = '1' then | |
|
137 | ||
|
138 | --APB Write OP | |
|
139 | if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then | |
|
140 | case apbi.paddr(7 downto 2) is | |
|
141 | when "000000" => | |
|
142 | r.CTRL_Reg(9 downto 0) <= apbi.pwdata(9 downto 0); | |
|
143 | when others => | |
|
144 | writeC: for i in 1 to 32 loop | |
|
145 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |
|
146 | r.FRAME_BUFF(i-1) <= apbi.pwdata; | |
|
147 | end if; | |
|
148 | end loop; | |
|
149 | end case; | |
|
150 | end if; | |
|
151 | ||
|
152 | --APB READ OP | |
|
153 | if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then | |
|
154 | case apbi.paddr(7 downto 2) is | |
|
155 | when "000000" => | |
|
156 | apbo.prdata <= r.CTRL_Reg; | |
|
157 | when others => | |
|
158 | readC: for i in 1 to 32 loop | |
|
159 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |
|
160 | apbo.prdata(7 downto 0) <= r.FRAME_BUFF(i-1)(7 downto 0); | |
|
161 | Exec <= '1'; | |
|
162 | end if; | |
|
163 | end loop; | |
|
164 | end case; | |
|
165 | else | |
|
166 | Exec <= '0'; | |
|
167 | end if; | |
|
168 | ||
|
169 | end if; | |
|
170 | apbo.pconfig <= pconfig; | |
|
171 | end process; | |
|
172 | ||
|
173 | ||
|
174 | ||
|
175 | end Behavioral; | |
|
176 | ||
|
177 | ||
|
178 | ||
|
179 | ||
|
180 | ||
|
181 |
@@ -1,137 +1,167 | |||
|
1 | 1 | ------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the LPP VHDL IP LIBRARY |
|
3 | 3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 2 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | |
|
20 | 20 | library ieee; |
|
21 | 21 | use ieee.std_logic_1164.all; |
|
22 | ||
|
22 | library grlib; | |
|
23 | use grlib.amba.all; | |
|
24 | use grlib.stdlib.all; | |
|
25 | use grlib.devices.all; | |
|
23 | 26 | |
|
24 | 27 | |
|
25 | 28 | package amba_lcd_16x2_ctrlr is |
|
26 | 29 | |
|
27 | 30 | |
|
28 | 31 | type LCD_DRVR_CTRL_BUSS is |
|
29 | 32 | record |
|
30 | 33 | LCD_RW : std_logic; |
|
31 | 34 | LCD_RS : std_logic; |
|
32 | 35 | LCD_E : std_logic; |
|
33 | 36 | LCD_DATA : std_logic_vector(7 downto 0); |
|
34 | 37 | end record; |
|
35 | 38 | |
|
36 | 39 | type LCD_DRVR_SYNCH_BUSS is |
|
37 | 40 | record |
|
38 | 41 | DRVR_READY : std_logic; |
|
39 | 42 | LCD_INITIALISED : std_logic; |
|
40 | 43 | end record; |
|
41 | 44 | |
|
42 | 45 | |
|
43 | 46 | type LCD_DRVR_CMD_BUSS is |
|
44 | 47 | record |
|
45 | 48 | Word : std_logic_vector(7 downto 0); |
|
46 | 49 | CMD_Data : std_logic; --CMD = '0' and data = '1' |
|
47 | 50 | Exec : std_logic; |
|
48 | 51 | Duration : std_logic_vector(1 downto 0); |
|
49 | 52 | end record; |
|
50 | 53 | type LCD_CFG_Tbl is array(0 to 4) of std_logic_vector(7 downto 0); |
|
51 | 54 | |
|
52 | 55 | |
|
53 | 56 | |
|
54 | 57 | component LCD_16x2_DRIVER is |
|
55 | 58 | generic( |
|
56 | 59 | OSC_Freq_MHz : integer:=60 |
|
57 | 60 | ); |
|
58 | 61 | Port ( reset : in STD_LOGIC; |
|
59 | 62 | clk : in STD_LOGIC; |
|
60 | 63 | LCD_CTRL : out LCD_DRVR_CTRL_BUSS; |
|
61 | 64 | SYNCH : out LCD_DRVR_SYNCH_BUSS; |
|
62 | 65 | DRIVER_CMD : in LCD_DRVR_CMD_BUSS |
|
63 | 66 | ); |
|
64 | 67 | end component; |
|
65 | 68 | |
|
66 | 69 | |
|
67 | 70 | |
|
68 | 71 | component amba_lcd_16x2_driver is |
|
69 | 72 | Port ( reset : in STD_LOGIC; |
|
70 | 73 | clk : in STD_LOGIC; |
|
71 | 74 | Bp0 : in STD_LOGIC; |
|
72 | 75 | Bp1 : in STD_LOGIC; |
|
73 | 76 | Bp2 : in STD_LOGIC; |
|
74 | 77 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); |
|
75 | 78 | LCD_RS : out STD_LOGIC; |
|
76 | 79 | LCD_RW : out STD_LOGIC; |
|
77 | 80 | LCD_E : out STD_LOGIC; |
|
78 | 81 | LCD_RET : out STD_LOGIC; |
|
79 | 82 | LCD_CS1 : out STD_LOGIC; |
|
80 | 83 | LCD_CS2 : out STD_LOGIC; |
|
81 | 84 | SF_CE0 : out std_logic |
|
82 | 85 | ); |
|
83 | 86 | end component; |
|
84 | 87 | |
|
85 | 88 | |
|
86 | 89 | |
|
87 | 90 | component FRAME_CLK_GEN is |
|
88 | 91 | generic(OSC_freqKHz : integer := 50000); |
|
89 | 92 | Port ( clk : in STD_LOGIC; |
|
90 | 93 | reset : in STD_LOGIC; |
|
91 | 94 | FRAME_CLK : out STD_LOGIC); |
|
92 | 95 | end component; |
|
93 | 96 | |
|
94 | 97 | |
|
95 | 98 | |
|
96 | 99 | component LCD_2x16_DRIVER is |
|
97 | 100 | generic( |
|
98 | 101 | OSC_Freq_MHz : integer:=60; |
|
99 | 102 | Refresh_RateHz : integer:=5 |
|
100 | 103 | ); |
|
101 | 104 | Port ( clk : in STD_LOGIC; |
|
102 | 105 | reset : in STD_LOGIC; |
|
103 | 106 | FramBUFF : in STD_LOGIC_VECTOR(16*2*8-1 downto 0); |
|
104 | 107 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); |
|
105 | 108 | LCD_RS : out STD_LOGIC; |
|
106 | 109 | LCD_RW : out STD_LOGIC; |
|
107 | 110 | LCD_E : out STD_LOGIC; |
|
108 | 111 | LCD_RET : out STD_LOGIC; |
|
109 | 112 | LCD_CS1 : out STD_LOGIC; |
|
110 | 113 | LCD_CS2 : out STD_LOGIC; |
|
111 | 114 | STATEOUT: out std_logic_vector(3 downto 0); |
|
112 | 115 | refreshPulse : out std_logic |
|
113 | 116 | ); |
|
114 | 117 | end component; |
|
115 | 118 | |
|
116 | 119 | |
|
117 | 120 | component LCD_CLK_GENERATOR is |
|
118 | 121 | generic(OSC_freqKHz : integer := 50000); |
|
119 | 122 | Port ( clk : in STD_LOGIC; |
|
120 | 123 | reset : in STD_LOGIC; |
|
121 | 124 | clk_1us : out STD_LOGIC); |
|
122 | 125 | end component; |
|
123 | 126 | |
|
124 | 127 | component LCD_16x2_ENGINE is |
|
125 | 128 | generic(OSC_freqKHz : integer := 50000); |
|
126 | 129 | Port ( clk : in STD_LOGIC; |
|
127 | 130 | reset : in STD_LOGIC; |
|
128 | 131 | DATA : in std_logic_vector(16*2*8-1 downto 0); |
|
129 | 132 | CMD : in std_logic_vector(10 downto 0); |
|
130 | 133 | Exec : in std_logic; |
|
131 | 134 | Ready : out std_logic; |
|
132 | 135 | LCD_CTRL : out LCD_DRVR_CTRL_BUSS |
|
133 | 136 | ); |
|
134 | 137 | end component; |
|
135 | 138 | |
|
136 | 139 | |
|
140 | ||
|
141 | component apb_lcd_ctrlr is | |
|
142 | generic ( | |
|
143 | pindex : integer := 0; | |
|
144 | paddr : integer := 0; | |
|
145 | pmask : integer := 16#fff#; | |
|
146 | pirq : integer := 0; | |
|
147 | abits : integer := 8); | |
|
148 | port ( | |
|
149 | rst : in std_ulogic; | |
|
150 | clk : in std_ulogic; | |
|
151 | apbi : in apb_slv_in_type; | |
|
152 | apbo : out apb_slv_out_type; | |
|
153 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |
|
154 | LCD_RS : out STD_LOGIC; | |
|
155 | LCD_RW : out STD_LOGIC; | |
|
156 | LCD_E : out STD_LOGIC; | |
|
157 | LCD_RET : out STD_LOGIC; | |
|
158 | LCD_CS1 : out STD_LOGIC; | |
|
159 | LCD_CS2 : out STD_LOGIC; | |
|
160 | SF_CE0 : out std_logic | |
|
161 | ); | |
|
162 | end component; | |
|
163 | ||
|
164 | ||
|
165 | ||
|
166 | ||
|
137 | 167 | end; |
@@ -1,8 +1,9 | |||
|
1 | 1 | amba_lcd_16x2_ctrlr.vhd |
|
2 | apb_lcd_ctrlr.vhd | |
|
2 | 3 | FRAME_CLK.vhd |
|
3 | 4 | LCD_16x2_CFG.vhd |
|
4 | 5 | LCD_16x2_DRVR.vhd |
|
5 | 6 | LCD_16x2_ENGINE.vhd |
|
6 | 7 | LCD_2x16_DRIVER.vhd |
|
7 | 8 | LCD_CLK_GENERATOR.vhd |
|
8 | 9 | Top_LCD.vhd |
@@ -1,75 +1,76 | |||
|
1 | 1 | ------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the LPP VHDL IP LIBRARY |
|
3 | 3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 2 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | |
|
20 | 20 | library ieee; |
|
21 | 21 | use ieee.std_logic_1164.all; |
|
22 | 22 | library grlib; |
|
23 | 23 | use grlib.amba.all; |
|
24 | 24 | -- pragma translate_off |
|
25 | 25 | use std.textio.all; |
|
26 | 26 | -- pragma translate_on |
|
27 | 27 | |
|
28 | 28 | |
|
29 | 29 | |
|
30 | 30 | package lpp_amba is |
|
31 | 31 | |
|
32 | 32 | constant VENDOR_LPP : amba_vendor_type := 16#19#; |
|
33 | 33 | |
|
34 | 34 | -- LPP device ids |
|
35 | 35 | |
|
36 | 36 | constant ROCKET_TM : amba_device_type := 16#001#; |
|
37 | 37 | constant otherCore : amba_device_type := 16#002#; |
|
38 | 38 | constant LPP_SIMPLE_DIODE : amba_device_type := 16#003#; |
|
39 | 39 | constant LPP_MULTI_DIODE : amba_device_type := 16#004#; |
|
40 | constant LPP_LCD_CTRLR : amba_device_type := 16#005#; | |
|
40 | 41 | |
|
41 | 42 | |
|
42 | 43 | component APB_SIMPLE_DIODE is |
|
43 | 44 | generic ( |
|
44 | 45 | pindex : integer := 0; |
|
45 | 46 | paddr : integer := 0; |
|
46 | 47 | pmask : integer := 16#fff#; |
|
47 | 48 | pirq : integer := 0; |
|
48 | 49 | abits : integer := 8); |
|
49 | 50 | port ( |
|
50 | 51 | rst : in std_ulogic; |
|
51 | 52 | clk : in std_ulogic; |
|
52 | 53 | apbi : in apb_slv_in_type; |
|
53 | 54 | apbo : out apb_slv_out_type; |
|
54 | 55 | LED : out std_ulogic |
|
55 | 56 | ); |
|
56 | 57 | end component; |
|
57 | 58 | |
|
58 | 59 | |
|
59 | 60 | component APB_MULTI_DIODE is |
|
60 | 61 | generic ( |
|
61 | 62 | pindex : integer := 0; |
|
62 | 63 | paddr : integer := 0; |
|
63 | 64 | pmask : integer := 16#fff#; |
|
64 | 65 | pirq : integer := 0; |
|
65 | 66 | abits : integer := 8); |
|
66 | 67 | port ( |
|
67 | 68 | rst : in std_ulogic; |
|
68 | 69 | clk : in std_ulogic; |
|
69 | 70 | apbi : in apb_slv_in_type; |
|
70 | 71 | apbo : out apb_slv_out_type; |
|
71 | 72 | LED : out std_logic_vector(2 downto 0) |
|
72 | 73 | ); |
|
73 | 74 | end component; |
|
74 | 75 | |
|
75 | 76 | end; |
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