@@ -0,0 +1,10 | |||||
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1 | SOLO\_LFR\_MINI-LFR is the implementation of Solar Orbiter LFR analyser for the board MINI-LFR. | |||
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2 | ||||
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3 | You can find information about : | |||
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4 | ||||
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5 | - MINI-LFR board in the redmine here : | |||
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6 | [Mini_LFR](https://hephaistos.lpp.polytechnique.fr/redmine/projects/mini-lfr/wiki) | |||
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7 | - the bistream Generation : | |||
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8 | [Bitstream_Generation](https://hephaistos.lpp.polytechnique.fr/redmine/projects/vhdlib/wiki/Mini_LFR_-_Bitstream_Generation) | |||
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9 | ||||
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10 |
1 | NO CONTENT: file renamed from boards/MINI-LFR/MINI-LFR.sdc to boards/MINI-LFR/MINI-LFR_PlaceAndRoute.sdc |
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NO CONTENT: file renamed from boards/MINI-LFR/MINI-LFR.sdc to boards/MINI-LFR/MINI-LFR_PlaceAndRoute.sdc |
@@ -494,7 +494,7 BEGIN -- beh | |||||
494 | pirq_ms => 6, |
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494 | pirq_ms => 6, | |
495 | pirq_wfp => 14, |
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495 | pirq_wfp => 14, | |
496 | hindex => 2, |
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496 | hindex => 2, | |
497 |
top_lfr_version => |
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497 | top_lfr_version => LPP_LFR_BOARD_MINI_LFR & X"015A") -- aa.bb.cc version | |
498 | PORT MAP ( |
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498 | PORT MAP ( | |
499 | clk => clk_25, |
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499 | clk => clk_25, | |
500 | rstn => LFR_rstn, |
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500 | rstn => LFR_rstn, | |
@@ -629,4 +629,4 BEGIN -- beh | |||||
629 | END GENERATE ahbo_m_ext_not_used; |
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629 | END GENERATE ahbo_m_ext_not_used; | |
630 | END GENERATE all_ahbo_m_ext; |
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630 | END GENERATE all_ahbo_m_ext; | |
631 |
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631 | |||
632 |
END beh; |
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632 | END beh; No newline at end of file |
@@ -14,8 +14,8 VHDLSYNFILES= MINI_LFR_top.vhd | |||||
14 | VHDLSIMFILES= testbench.vhd |
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14 | VHDLSIMFILES= testbench.vhd | |
15 | SIMTOP=testbench |
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15 | SIMTOP=testbench | |
16 | PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc |
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16 | PDC=$(VHDLIB)/boards/$(BOARD)/default.pdc | |
17 | SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI-LFR.sdc |
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17 | SDCFILE=$(VHDLIB)/boards/$(BOARD)/MINI-LFR_PlaceAndRoute.sdc | |
18 | SDC=$(VHDLIB)/boards/$(BOARD)/MINI-LFR.sdc |
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18 | SDC=$(VHDLIB)/boards/$(BOARD)/MINI-LFR_PlaceAndRoute.sdc | |
19 | BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut |
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19 | BITGEN=$(VHDLIB)/boards/$(BOARD)/default.ut | |
20 | CLEAN=soft-clean |
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20 | CLEAN=soft-clean | |
21 |
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21 |
1 | NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/run.do to designs/SOLO_LFR_MINI-LFR/run.do |
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NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/run.do to designs/SOLO_LFR_MINI-LFR/run.do |
1 | NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/testbench.vhd to designs/SOLO_LFR_MINI-LFR/testbench.vhd |
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NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/testbench.vhd to designs/SOLO_LFR_MINI-LFR/testbench.vhd |
1 | NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/wave.do to designs/SOLO_LFR_MINI-LFR/wave.do |
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NO CONTENT: file renamed from designs/MINI-LFR_WFP_MS/wave.do to designs/SOLO_LFR_MINI-LFR/wave.do |
@@ -13,6 +13,13 LIBRARY techmap; | |||||
13 | USE techmap.gencomp.ALL; |
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13 | USE techmap.gencomp.ALL; | |
14 |
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14 | |||
15 | PACKAGE lpp_lfr_pkg IS |
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15 | PACKAGE lpp_lfr_pkg IS | |
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16 | ||||
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17 | constant LPP_LFR_BOARD_MINI_LFR : std_logic_vector(7 downto 0) := X"00"; -- with fpga A3PE3000 | |||
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18 | constant LPP_LFR_BOARD_LFR_EM : std_logic_vector(7 downto 0) := X"01"; -- with fpga A3PE3000 | |||
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19 | constant LPP_LFR_BOARD_LFR_EQM : std_logic_vector(7 downto 0) := X"02"; -- with fpga A3PE3000 | |||
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20 | constant LPP_LFR_BOARD_LFR_FM : std_logic_vector(7 downto 0) := X"03"; -- with fpga RTAX4000D | |||
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21 | constant LPP_LFR_BOARD_DISCOSPACE : std_logic_vector(7 downto 0) := X"04"; -- with fpga A3PE3000 | |||
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22 | ||||
16 |
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23 | ----------------------------------------------------------------------------- | |
17 | -- TEMP |
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24 | -- TEMP | |
18 | ----------------------------------------------------------------------------- |
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25 | ----------------------------------------------------------------------------- |
1 | NO CONTENT: file was removed |
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NO CONTENT: file was removed |
1 | NO CONTENT: file was removed |
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