@@ -1,25 +1,32 | |||
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1 | 1 | #include <stdio.h> |
|
2 | 2 | #include "lpp_apb_functions.h" |
|
3 | 3 | #include "apb_dac_Driver.h" |
|
4 | #include "apb_fifo_Driver.h" | |
|
4 | 5 | |
|
5 | 6 | int main() |
|
6 | 7 | { |
|
7 | 8 | printf("\nDebut Main\n\n"); |
|
8 | int i; | |
|
9 | int tablo CAL_SignalData | |
|
9 | ||
|
10 | // int Tabl [256] = {0x9800,0x1B06,0x1C64,0x1B6A,0x18C8,0x1625,0x1529,0x1685,0x1988,0x1C8A,0x1DE3,0x1CE3,0x1A39,0x178E,0x168A,0x17DC,0x1AD4,0x1DCB,0x1F18,0x1E0B,0x1B53,0x189A,0x1787,0x18CA,0x1BB2,0x1E98,0x1FD4,0x1EB5,0x1BEC,0x1921,0x17FB,0x192B,0x1C00,0x1ED3,0x1FFB,0x1EC9,0x1BEC,0x190D,0x17D4,0x18F0,0x1BB2,0x1E72,0x1F87,0x1E42,0x1B53,0x1862,0x1718,0x1823,0x1AD4,0x1D84,0x1E8A,0x1D36,0x1A39,0x173A,0x15E3,0x16E2,0x1988,0x1C2D,0x1D29,0x1BCD,0x18C8,0x15C2,0x1464,0x155E,0x1800,0x1AA2,0x1B9C,0x1A3E,0x1738,0x1433,0x12D7,0x13D3,0x1678,0x191E,0x1A1D,0x18C6,0x15C7,0x12CA,0x1176,0x127C,0x152C,0x17DD,0x18E8,0x179E,0x14AD,0x11BE,0x1079,0x118E,0x144E,0x1710,0x182C,0x16F3,0x1414,0x1137,0x1005,0x112D,0x1400,0x16D5,0x1805,0x16DF,0x1414,0x114B,0x102C,0x1168,0x144E,0x1736,0x1879,0x1766,0x14AD,0x11F5,0x10E8,0x1235,0x152C,0x1824,0x1976,0x1872,0x15C7,0x131D,0x121D,0x1376,0x1678,0x197B,0x1AD7,0x19DB,0x1738,0x1496,0x139C,0x14FA,0x1800,0x1B06,0x1C64,0x1B6A,0x18C8,0x1625,0x1529,0x1685,0x1988,0x1C8A,0x1DE3,0x1CE3,0x1A39,0x178E,0x168A,0x17DC,0x1AD4,0x1DCB,0x1F18,0x1E0B,0x1B53,0x189A,0x1787,0x18CA,0x1BB2,0x1E98,0x1FD4,0x1EB5,0x1BEC,0x1921,0x17FB,0x192B,0x1C00,0x1ED3,0x1FFB,0x1EC9,0x1BEC,0x190D,0x17D4,0x18F0,0x1BB2,0x1E72,0x1F87,0x1E42,0x1B53,0x1862,0x1718,0x1823,0x1AD4,0x1D84,0x1E8A,0x1D36,0x1A39,0x173A,0x15E3,0x16E2,0x1988,0x1C2D,0x1D29,0x1BCD,0x18C8,0x15C2,0x1464,0x155E,0x1800,0x1AA2,0x1B9C,0x1A3E,0x1738,0x1433,0x12D7,0x13D3,0x1678,0x191E,0x1A1D,0x18C6,0x15C7,0x12CA,0x1176,0x127C,0x152C,0x17DD,0x18E8,0x179E,0x14AD,0x11BE,0x1079,0x118E,0x144E,0x1710,0x182C,0x16F3,0x1414,0x1137,0x1005,0x112D,0x1400,0x16D5,0x1805,0x16DF,0x1414,0x114B,0x102C,0x1168,0x144E,0x1736,0x1879,0x1766,0x14AD,0x11F5,0x10E8,0x1235,0x152C,0x1824,0x1976,0x1872,0x15C7,0x131D,0x121D,0x1376,0x1678,0x197B,0x1AD7,0x19DB,0x1738,0x1496,0x139C,0x14FA}; | |
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11 | //(10Khz + 625hz) | |
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12 | ||
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13 | int Tabl [256] = {0x9800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258,0x1800,0x1DA8,0x1FFF,0x1DA8,0x1800,0x1258,0x1000,0x1258}; | |
|
14 | //(10Khz) | |
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15 | ||
|
16 | // int Tabl [256] = {0x9800,0x1864,0x18C9,0x192D,0x1990,0x19F2,0x1A53,0x1AB2,0x1B10,0x1B6C,0x1BC5,0x1C1D,0x1C72,0x1CC4,0x1D13,0x1D5F,0x1DA8,0x1DED,0x1E2F,0x1E6D,0x1EA7,0x1EDD,0x1F0E,0x1F3B,0x1F64,0x1F88,0x1FA8,0x1FC3,0x1FD9,0x1FEA,0x1FF6,0x1FFE,0x1FFF,0x1FFE,0x1FF6,0x1FEA,0x1FD9,0x1FC3,0x1FA8,0x1F88,0x1F64,0x1F3B,0x1F0E,0x1EDD,0x1EA7,0x1E6D,0x1E2F,0x1DED,0x1DA8,0x1D5F,0x1D13,0x1CC4,0x1C72,0x1C1D,0x1BC5,0x1B6C,0x1B10,0x1AB2,0x1A53,0x19F2,0x1990,0x192D,0x18C9,0x1864,0x1800,0x179C,0x1737,0x16D3,0x1670,0x160E,0x15AD,0x154E,0x14F0,0x1494,0x143B,0x13E3,0x138E,0x133C,0x12ED,0x12A1,0x1258,0x1213,0x11D1,0x1193,0x1159,0x1123,0x10F2,0x10C5,0x109C,0x1078,0x1058,0x103D,0x1027,0x1016,0x100A,0x1002,0x1000,0x1002,0x100A,0x1016,0x1027,0x103D,0x1058,0x1078,0x109C,0x10C5,0x10F2,0x1123,0x1159,0x1193,0x11D1,0x1213,0x1258,0x12A1,0x12ED,0x133C,0x138E,0x13E3,0x143B,0x1494,0x14F0,0x154E,0x15AD,0x160E,0x1670,0x16D3,0x1737,0x179C,0x1800,0x1864,0x18C9,0x192D,0x1990,0x19F2,0x1A53,0x1AB2,0x1B10,0x1B6C,0x1BC5,0x1C1D,0x1C72,0x1CC4,0x1D13,0x1D5F,0x1DA8,0x1DED,0x1E2F,0x1E6D,0x1EA7,0x1EDD,0x1F0E,0x1F3B,0x1F64,0x1F88,0x1FA8,0x1FC3,0x1FD9,0x1FEA,0x1FF6,0x1FFE,0x1FFF,0x1FFE,0x1FF6,0x1FEA,0x1FD9,0x1FC3,0x1FA8,0x1F88,0x1F64,0x1F3B,0x1F0E,0x1EDD,0x1EA7,0x1E6D,0x1E2F,0x1DED,0x1DA8,0x1D5F,0x1D13,0x1CC4,0x1C72,0x1C1D,0x1BC5,0x1B6C,0x1B10,0x1AB2,0x1A53,0x19F2,0x1990,0x192D,0x18C9,0x1864,0x1800,0x179C,0x1737,0x16D3,0x1670,0x160E,0x15AD,0x154E,0x14F0,0x1494,0x143B,0x13E3,0x138E,0x133C,0x12ED,0x12A1,0x1258,0x1213,0x11D1,0x1193,0x1159,0x1123,0x10F2,0x10C5,0x109C,0x1078,0x1058,0x103D,0x1027,0x1016,0x100A,0x1002,0x1000,0x1002,0x100A,0x1016,0x1027,0x103D,0x1058,0x1078,0x109C,0x10C5,0x10F2,0x1123,0x1159,0x1193,0x11D1,0x1213,0x1258,0x12A1,0x12ED,0x133C,0x138E,0x13E3,0x143B,0x1494,0x14F0,0x154E,0x15AD,0x160E,0x1670,0x16D3,0x1737,0x179C}; | |
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17 | //(625hz) | |
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10 | 18 | |
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11 | 19 | DAC_Device* dac0 = openDAC(0); |
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20 | FIFO_Device* fifo0 = openFIFO(0); | |
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12 | 21 | |
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13 | printf("\nSTART\n\n"); | |
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22 | dac0->ClkConfigReg = 0; | |
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23 | ||
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24 | FillFifo(fifo0,0,Tabl,256); | |
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14 | 25 | |
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15 | while(1) | |
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16 | { | |
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17 | for (i = 0 ; i < 251 ; i++) | |
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18 | { | |
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19 | while(!((dac0->ConfigReg & DAC_ready) == DAC_ready)); | |
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20 | dac0->DataReg = tablo[i]; | |
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21 | while((dac0->ConfigReg & DAC_ready) == DAC_ready); | |
|
22 | } | |
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23 | } | |
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26 | fifo0->FIFOreg[(2*0)+FIFO_Ctrl] = FIFO_ReUse; | |
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27 | // printf("%x\n",fifo0->FIFOreg[(2*0)+FIFO_Ctrl]); | |
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28 | ||
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29 | dac0->ConfigReg = DAC_enable; | |
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30 | ||
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24 | 31 | return 0; |
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25 | 32 | } |
@@ -1,59 +1,47 | |||
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1 | 1 | /*------------------------------------------------------------------------------ |
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2 | 2 | -- This file is a part of the LPP VHDL IP LIBRARY |
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3 | 3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
4 | 4 | -- |
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5 | 5 | -- This program is free software; you can redistribute it and/or modify |
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6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Martin Morlot |
|
20 | 20 | -- Mail : martin.morlot@lpp.polytechnique.fr |
|
21 | 21 | -----------------------------------------------------------------------------*/ |
|
22 |
#ifndef APB_ |
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23 |
#define APB_ |
|
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22 | #ifndef APB_DAC_DRIVER_H | |
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23 | #define APB_DAC_DRIVER_H | |
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24 | 24 | |
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25 | #define DAC_ready 3 | |
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26 | 25 | #define DAC_enable 1 |
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27 | 26 | #define DAC_disable 0 |
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28 | 27 | |
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29 | #define CAL_SignalData [251] = {0x9555,0x1800,0x19AA,0x1B15,0x1C0A,0x1C66,0x1C1F,0x1B44,0x19FC,0x187F,0x170F,0x15EA,0x1542,0x1537,0x15CE,0x16F2,0x187A,0x1A2B,0x1BC2,0x1D04,0x1DBF,0x1DDB,0x1D56,0x1C49,0x1AE3,0x195F,0x1800,0x1700,0x168D,0x16BA,0x1785,0x18D0,0x1A69,0x1C12,0x1D8A,0x1E98,0x1F13,\ | |
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30 | 0x1EEB,0x1E28,0x1CEC,0x1FFF,0x19E8,0x189F,0x17C8,0x1788,0x17EA,0x18E2,0x1A48,0x1BE7,0x1D7C,0x1ECA,0x1F9C,0x1FD2,0x1F64,0x1E66,0x1D00,0x1B6E,0x19EF,0x18C1,0x1817,0x180A,0x189D,0x19BA,0x1B33,0x1CCC,0x1E44,0x1F5F,0x1FEE,0x1FDC,0x1F2B,0x1DF6,0x1C6E,0x1AD1,0x1960,0x1855,0x17D9,0x1800,\ | |
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31 | 0x18C1,0x19FD,0x1B80,0x1D0A,0x1E5C,0x1F3D,0x1F87,0x1F2E,0x1E3E,0x1CDA,0x1B39,0x199C,0x1842,0x1760,0x1717,0x1771,0x185D,0x19B1,0x1B36,0x1CAA,0x1DCF,0x1E73,0x1E79,0x1DDD,0x1CB4,0x1B2B,0x197C,0x17EA,0x16B1,0x15FF,0x15EE,0x167C,0x178F,0x18F7,0x1A78,0x1BCF,0x1CC4,0x1D2A,0x1CED,0x1C14,\ | |
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32 | 0x1ABC,0x191A,0x176B,0x15F0,0x14E2,0x1467,0x1490,0x1552,0x1689,0x1800,0x1977,0x1AAE,0x1B70,0x1B99,0x1B1E,0x1A10,0x1895,0x16E6,0x1544,0x13EC,0x1313,0x12D6,0x133C,0x1431,0x1588,0x1709,0x1871,0x1984,0x1A12,0x1A01,0x194F,0x1816,0x1684,0x14D5,0x134C,0x1223,0x1187,0x118D,0x1231,0x1356,\ | |
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33 | 0x14CA,0x164F,0x17A3,0x188F,0x18E9,0x18A0,0x17BE,0x1664,0x14C7,0x1326,0x11C2,0x10D2,0x1079,0x10C3,0x11A4,0x12F6,0x1480,0x1603,0x173F,0x1800,0x1827,0x17AB,0x16A0,0x152F,0x1392,0x120A,0x10D5,0x1024,0x1012,0x10A1,0x11BC,0x1334,0x14CD,0x1646,0x1763,0x17F6,0x17E9,0x173F,0x1611,0x1492,\ | |
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34 | 0x1300,0x119A,0x109C,0x102E,0x1064,0x1136,0x1284,0x1419,0x15B8,0x171E,0x1816,0x1878,0x1838,0x1761,0x1618,0x1494,0x1314,0x11D8,0x1115,0x10ED,0x1168,0x1276,0x13EE,0x1597,0x1730,0x187B,0x1946,0x1973,0x1900,0x1800,0x16A1,0x151D,0x13B7,0x12AA,0x1225,0x1241,0x12FC,0x143E,0x15D5,0x1786,\ | |
|
35 | 0x190E,0x1A32,0x1AC9,0x1ABE,0x1A16,0x18F1,0x1781,0x1604,0x14BC,0x13E1,0x139A,0x13F6,0x14EB,0x1656}; | |
|
36 | //Sinus (10Khz + 625hz) | |
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37 | ||
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38 | 28 | /*=================================================== |
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39 | 29 | T Y P E S D E F |
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40 | 30 | ====================================================*/ |
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41 | 31 | |
|
42 | /** Structure repr�sentant le registre du CNA */ | |
|
43 | struct DAC_Driver | |
|
32 | struct DAC_REG | |
|
44 | 33 | { |
|
45 | int configReg; /**< Registre de configuration: Flag Ready [1] ; Flag Enable [0] */ | |
|
46 | int dataReg; /**< Registre de donn�e sur 16 bits */ | |
|
34 | int ConfigReg; | |
|
35 | int ClkConfigReg; | |
|
47 | 36 | }; |
|
48 | 37 | |
|
49 |
typedef volatile struct DAC_ |
|
|
38 | typedef volatile struct DAC_REG DAC_Device; | |
|
50 | 39 | |
|
51 | 40 | /*=================================================== |
|
52 | 41 | F U N C T I O N S |
|
53 | 42 | ====================================================*/ |
|
54 | 43 | |
|
55 | /** Ouvre l'acc� au CNA */ | |
|
56 | 44 | DAC_Device* openDAC(int count); |
|
57 | 45 | |
|
58 | 46 | |
|
59 | 47 | #endif |
@@ -1,49 +1,32 | |||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |
|
4 | -- | |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
|
6 | -- it under the terms of the GNU General Public License as published by | |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
|
8 | -- (at your option) any later version. | |
|
9 | -- | |
|
10 | -- This program is distributed in the hope that it will be useful, | |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | -- GNU General Public License for more details. | |
|
14 | -- | |
|
15 | -- You should have received a copy of the GNU General Public License | |
|
16 | -- along with this program; if not, write to the Free Software | |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | -- Author : Martin Morlot | |
|
20 | -- Mail : martin.morlot@lpp.polytechnique.fr | |
|
21 | -----------------------------------------------------------------------------*/ | |
|
22 | #include "apb_dac_Driver.h" | |
|
23 | #include "lpp_apb_functions.h" | |
|
24 | #include <stdio.h> | |
|
25 | ||
|
26 | ||
|
27 | DAC_Device* openDAC(int count) | |
|
28 | { | |
|
29 | DAC_Device* dac0; | |
|
30 | dac0 = (DAC_Device*) apbgetdevice(LPP_CNA,VENDOR_LPP,count); | |
|
31 | dac0->ConfigReg = DAC_enable; | |
|
32 | return dac0; | |
|
33 | } | |
|
34 | ||
|
35 | /*int DacConst() | |
|
36 | { | |
|
37 | DAC_Device* dac3; | |
|
38 | int Value = 0x1FFF; | |
|
39 | dac3 = (DAC_Device*)0x80000800; | |
|
40 | dac3->configReg = DAC_enable; | |
|
41 | while(1) | |
|
42 | { | |
|
43 | printf("\nEntrer une valeur entre 4096 et 8191 : "); | |
|
44 | scanf("%d",&Value); | |
|
45 | dac3->dataReg = Value; | |
|
46 | } | |
|
47 | return 0; | |
|
48 | } */ | |
|
49 | ||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |
|
4 | -- | |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
|
6 | -- it under the terms of the GNU General Public License as published by | |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
|
8 | -- (at your option) any later version. | |
|
9 | -- | |
|
10 | -- This program is distributed in the hope that it will be useful, | |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | -- GNU General Public License for more details. | |
|
14 | -- | |
|
15 | -- You should have received a copy of the GNU General Public License | |
|
16 | -- along with this program; if not, write to the Free Software | |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | -- Author : Martin Morlot | |
|
20 | -- Mail : martin.morlot@lpp.polytechnique.fr | |
|
21 | -----------------------------------------------------------------------------*/ | |
|
22 | #include "apb_dac_Driver.h" | |
|
23 | #include "lpp_apb_functions.h" | |
|
24 | #include <stdio.h> | |
|
25 | ||
|
26 | DAC_Device* openDAC(int count) | |
|
27 | { | |
|
28 | DAC_Device* dac0; | |
|
29 | dac0 = (DAC_Device*) apbgetdevice(LPP_CNA,VENDOR_LPP,count); | |
|
30 | dac0->ConfigReg = DAC_disable; | |
|
31 | return dac0; | |
|
32 | } |
@@ -1,59 +1,47 | |||
|
1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the LPP VHDL IP LIBRARY |
|
3 | 3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Martin Morlot |
|
20 | 20 | -- Mail : martin.morlot@lpp.polytechnique.fr |
|
21 | 21 | -----------------------------------------------------------------------------*/ |
|
22 |
#ifndef APB_ |
|
|
23 |
#define APB_ |
|
|
22 | #ifndef APB_DAC_DRIVER_H | |
|
23 | #define APB_DAC_DRIVER_H | |
|
24 | 24 | |
|
25 | #define DAC_ready 3 | |
|
26 | 25 | #define DAC_enable 1 |
|
27 | 26 | #define DAC_disable 0 |
|
28 | 27 | |
|
29 | #define CAL_SignalData [251] = {0x9555,0x1800,0x19AA,0x1B15,0x1C0A,0x1C66,0x1C1F,0x1B44,0x19FC,0x187F,0x170F,0x15EA,0x1542,0x1537,0x15CE,0x16F2,0x187A,0x1A2B,0x1BC2,0x1D04,0x1DBF,0x1DDB,0x1D56,0x1C49,0x1AE3,0x195F,0x1800,0x1700,0x168D,0x16BA,0x1785,0x18D0,0x1A69,0x1C12,0x1D8A,0x1E98,0x1F13,\ | |
|
30 | 0x1EEB,0x1E28,0x1CEC,0x1FFF,0x19E8,0x189F,0x17C8,0x1788,0x17EA,0x18E2,0x1A48,0x1BE7,0x1D7C,0x1ECA,0x1F9C,0x1FD2,0x1F64,0x1E66,0x1D00,0x1B6E,0x19EF,0x18C1,0x1817,0x180A,0x189D,0x19BA,0x1B33,0x1CCC,0x1E44,0x1F5F,0x1FEE,0x1FDC,0x1F2B,0x1DF6,0x1C6E,0x1AD1,0x1960,0x1855,0x17D9,0x1800,\ | |
|
31 | 0x18C1,0x19FD,0x1B80,0x1D0A,0x1E5C,0x1F3D,0x1F87,0x1F2E,0x1E3E,0x1CDA,0x1B39,0x199C,0x1842,0x1760,0x1717,0x1771,0x185D,0x19B1,0x1B36,0x1CAA,0x1DCF,0x1E73,0x1E79,0x1DDD,0x1CB4,0x1B2B,0x197C,0x17EA,0x16B1,0x15FF,0x15EE,0x167C,0x178F,0x18F7,0x1A78,0x1BCF,0x1CC4,0x1D2A,0x1CED,0x1C14,\ | |
|
32 | 0x1ABC,0x191A,0x176B,0x15F0,0x14E2,0x1467,0x1490,0x1552,0x1689,0x1800,0x1977,0x1AAE,0x1B70,0x1B99,0x1B1E,0x1A10,0x1895,0x16E6,0x1544,0x13EC,0x1313,0x12D6,0x133C,0x1431,0x1588,0x1709,0x1871,0x1984,0x1A12,0x1A01,0x194F,0x1816,0x1684,0x14D5,0x134C,0x1223,0x1187,0x118D,0x1231,0x1356,\ | |
|
33 | 0x14CA,0x164F,0x17A3,0x188F,0x18E9,0x18A0,0x17BE,0x1664,0x14C7,0x1326,0x11C2,0x10D2,0x1079,0x10C3,0x11A4,0x12F6,0x1480,0x1603,0x173F,0x1800,0x1827,0x17AB,0x16A0,0x152F,0x1392,0x120A,0x10D5,0x1024,0x1012,0x10A1,0x11BC,0x1334,0x14CD,0x1646,0x1763,0x17F6,0x17E9,0x173F,0x1611,0x1492,\ | |
|
34 | 0x1300,0x119A,0x109C,0x102E,0x1064,0x1136,0x1284,0x1419,0x15B8,0x171E,0x1816,0x1878,0x1838,0x1761,0x1618,0x1494,0x1314,0x11D8,0x1115,0x10ED,0x1168,0x1276,0x13EE,0x1597,0x1730,0x187B,0x1946,0x1973,0x1900,0x1800,0x16A1,0x151D,0x13B7,0x12AA,0x1225,0x1241,0x12FC,0x143E,0x15D5,0x1786,\ | |
|
35 | 0x190E,0x1A32,0x1AC9,0x1ABE,0x1A16,0x18F1,0x1781,0x1604,0x14BC,0x13E1,0x139A,0x13F6,0x14EB,0x1656}; | |
|
36 | //Sinus (10Khz + 625hz) | |
|
37 | ||
|
38 | 28 | /*=================================================== |
|
39 | 29 | T Y P E S D E F |
|
40 | 30 | ====================================================*/ |
|
41 | 31 | |
|
42 | /** Structure repr�sentant le registre du CNA */ | |
|
43 | struct DAC_Driver | |
|
32 | struct DAC_REG | |
|
44 | 33 | { |
|
45 | int configReg; /**< Registre de configuration: Flag Ready [1] ; Flag Enable [0] */ | |
|
46 | int dataReg; /**< Registre de donn�e sur 16 bits */ | |
|
34 | int ConfigReg; | |
|
35 | int ClkConfigReg; | |
|
47 | 36 | }; |
|
48 | 37 | |
|
49 |
typedef volatile struct DAC_ |
|
|
38 | typedef volatile struct DAC_REG DAC_Device; | |
|
50 | 39 | |
|
51 | 40 | /*=================================================== |
|
52 | 41 | F U N C T I O N S |
|
53 | 42 | ====================================================*/ |
|
54 | 43 | |
|
55 | /** Ouvre l'acc� au CNA */ | |
|
56 | 44 | DAC_Device* openDAC(int count); |
|
57 | 45 | |
|
58 | 46 | |
|
59 | 47 | #endif |
@@ -1,143 +1,143 | |||
|
1 | 1 | ------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the LPP VHDL IP LIBRARY |
|
3 | 3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------ |
|
19 | 19 | -- Author : Martin Morlot |
|
20 | 20 | -- Mail : martin.morlot@lpp.polytechnique.fr |
|
21 | 21 | ------------------------------------------------------------------------------ |
|
22 | 22 | library ieee; |
|
23 | 23 | use ieee.std_logic_1164.all; |
|
24 | 24 | use IEEE.numeric_std.all; |
|
25 | 25 | library grlib; |
|
26 | 26 | use grlib.amba.all; |
|
27 | 27 | use grlib.stdlib.all; |
|
28 | 28 | use grlib.devices.all; |
|
29 | 29 | library lpp; |
|
30 | 30 | use lpp.lpp_amba.all; |
|
31 | 31 | use lpp.apb_devices_list.all; |
|
32 | 32 | use lpp.general_purpose.all; |
|
33 | 33 | use lpp.lpp_cna.all; |
|
34 | 34 | |
|
35 | 35 | --! Driver APB, va faire le lien entre l'IP VHDL du convertisseur et le bus Amba |
|
36 | 36 | |
|
37 | 37 | entity APB_DAC is |
|
38 | 38 | generic ( |
|
39 | 39 | pindex : integer := 0; |
|
40 | 40 | paddr : integer := 0; |
|
41 | 41 | pmask : integer := 16#fff#; |
|
42 | 42 | pirq : integer := 0; |
|
43 | 43 | abits : integer := 8; |
|
44 | 44 | Nmax : integer := 7; |
|
45 | 45 | cpt_serial : integer := 6); |
|
46 | 46 | port ( |
|
47 | 47 | clk : in std_logic; --! Horloge du composant |
|
48 | 48 | rst : in std_logic; --! Reset general du composant |
|
49 | 49 | apbi : in apb_slv_in_type; --! Registre de gestion des entr�es du bus |
|
50 | 50 | apbo : out apb_slv_out_type; --! Registre de gestion des sorties du bus |
|
51 | 51 | DataIN : in std_logic_vector(15 downto 0); |
|
52 | 52 | Cal_EN : out std_logic; --! Signal Enable du multiplex pour la CAL |
|
53 | 53 | Readn : out std_logic; |
|
54 | 54 | SYNC : out std_logic; --! Signal de synchronisation du convertisseur |
|
55 | 55 | SCLK : out std_logic; --! Horloge systeme du convertisseur |
|
56 | 56 | CLK_VAR : out std_logic; |
|
57 | 57 | DATA : out std_logic --! Donn�e num�rique s�rialis� |
|
58 | 58 | ); |
|
59 | 59 | end entity; |
|
60 | 60 | |
|
61 | 61 | --! @details Les deux registres (apbi,apbo) permettent de g�rer la communication sur le bus |
|
62 | 62 | --! et les sorties seront cabl�es vers le convertisseur. |
|
63 | 63 | |
|
64 | 64 | architecture ar_APB_DAC of APB_DAC is |
|
65 | 65 | |
|
66 | 66 | constant REVISION : integer := 1; |
|
67 | 67 | |
|
68 | 68 | constant pconfig : apb_config_type := ( |
|
69 | 69 | 0 => ahb_device_reg (VENDOR_LPP, LPP_CNA, 0, REVISION, 0), |
|
70 | 70 | 1 => apb_iobar(paddr, pmask)); |
|
71 | 71 | |
|
72 | 72 | signal clkdiv : std_logic; |
|
73 | 73 | signal clkvar : std_logic; |
|
74 | 74 | signal enable : std_logic; |
|
75 | 75 | signal Ready : std_logic; |
|
76 | 76 | signal N : integer range 0 to Nmax; |
|
77 | 77 | |
|
78 | 78 | type DAC_ctrlr_Reg is record |
|
79 | 79 | DAC_Cfg : std_logic_vector(0 downto 0); |
|
80 | 80 | CLK_Cfg : std_logic_vector(2 downto 0); |
|
81 | 81 | end record; |
|
82 | 82 | |
|
83 | 83 | signal Rec : DAC_ctrlr_Reg; |
|
84 | 84 | signal Rdata : std_logic_vector(31 downto 0); |
|
85 | 85 | |
|
86 | 86 | begin |
|
87 | 87 | |
|
88 | 88 | enable <= Rec.DAC_Cfg(0); |
|
89 | 89 | |
|
90 | 90 | N <= to_integer(unsigned(Rec.CLK_Cfg)); |
|
91 | 91 | |
|
92 | 92 | CLK0 : Clock_Divider |
|
93 |
generic map ( |
|
|
94 |
port map (clk,rst,clkdiv); |
|
|
93 | generic map (308) --clkdiv = 80KHz | |
|
94 | port map (clk,rst,clkdiv); | |
|
95 | 95 | |
|
96 | 96 | CLKSET : ClkSetting |
|
97 | 97 | generic map(Nmax) |
|
98 | 98 | port map(clkdiv,rst,N,clkvar); |
|
99 | 99 | |
|
100 | 100 | CONV0 : DacDriver |
|
101 | 101 | -- generic map (cpt_serial) |
|
102 | 102 | port map(clk,rst,clkvar,enable,DataIN,SYNC,SCLK,Readn,Data); |
|
103 | 103 | |
|
104 | 104 | CLK_VAR <= clkvar; |
|
105 | 105 | |
|
106 | 106 | process(rst,clk) |
|
107 | 107 | begin |
|
108 | 108 | if(rst='0')then |
|
109 | 109 | Rec.CLK_Cfg <= (others => '0'); |
|
110 | 110 | |
|
111 | 111 | elsif(clk'event and clk='1')then |
|
112 | 112 | |
|
113 | 113 | |
|
114 | 114 | --APB Write OP |
|
115 | 115 | if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then |
|
116 | 116 | case apbi.paddr(abits-1 downto 2) is |
|
117 | 117 | when "000000" => |
|
118 | 118 | Rec.DAC_Cfg(0) <= apbi.pwdata(0); |
|
119 | 119 | Rec.CLK_Cfg <= apbi.pwdata(6 downto 4); |
|
120 | 120 | when others => |
|
121 | 121 | null; |
|
122 | 122 | end case; |
|
123 | 123 | end if; |
|
124 | 124 | |
|
125 | 125 | --APB Read OP |
|
126 | 126 | if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then |
|
127 | 127 | case apbi.paddr(abits-1 downto 2) is |
|
128 | 128 | when "000000" => |
|
129 | 129 | Rdata(31 downto 7) <= (others => '0'); |
|
130 | 130 | Rdata(6 downto 4) <= Rec.CLK_Cfg; |
|
131 | 131 | Rdata(0 downto 0) <= Rec.DAC_Cfg; |
|
132 | 132 | when others => |
|
133 | 133 | Rdata <= (others => '0'); |
|
134 | 134 | end case; |
|
135 | 135 | end if; |
|
136 | 136 | |
|
137 | 137 | end if; |
|
138 | 138 | apbo.pconfig <= pconfig; |
|
139 | 139 | end process; |
|
140 | 140 | |
|
141 | 141 | apbo.prdata <= Rdata when apbi.penable = '1'; |
|
142 | 142 | Cal_EN <= enable; |
|
143 | 143 | end architecture; No newline at end of file |
@@ -1,59 +1,59 | |||
|
1 | 1 | ------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the LPP VHDL IP LIBRARY |
|
3 | 3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------ |
|
19 | 19 | -- Author : Martin Morlot |
|
20 | 20 | -- Mail : martin.morlot@lpp.polytechnique.fr |
|
21 | 21 | ------------------------------------------------------------------------------ |
|
22 | 22 | library IEEE; |
|
23 | 23 | use IEEE.std_logic_1164.all; |
|
24 | 24 | use IEEE.numeric_std.all; |
|
25 | 25 | use IEEE.std_logic_arith.all; |
|
26 | 26 | use IEEE.std_logic_unsigned.all; |
|
27 | 27 | |
|
28 | 28 | --! Programme qui va permetre de g�n�rer une horloge systeme (sclk) parametrable |
|
29 | 29 | |
|
30 | 30 | entity ClkSetting is |
|
31 | 31 | generic(Nmax : integer := 7); |
|
32 | 32 | port( |
|
33 | 33 | clk, rst : in std_logic; --! Horloge et Reset globale |
|
34 | 34 | N : in integer range 0 to Nmax; |
|
35 | 35 | sclk : out std_logic --! Horloge Systeme g�n�r�e |
|
36 | 36 | ); |
|
37 | 37 | end entity; |
|
38 | 38 | |
|
39 | 39 | --! @details Fonctionne a base d'un compteur (countint) qui va permetre de diviser l'horloge N fois |
|
40 | 40 | architecture ar_ClkSetting of ClkSetting is |
|
41 | 41 | |
|
42 | 42 | signal clockint : std_logic_vector(Nmax downto 0); |
|
43 | 43 | |
|
44 | 44 | begin |
|
45 | 45 | process (clk,rst) |
|
46 | 46 | begin |
|
47 | 47 | if(rst = '0') then |
|
48 | 48 | clockint <= (others => '0'); |
|
49 | 49 | |
|
50 | 50 | elsif (clk' event and clk='1') then |
|
51 | 51 | |
|
52 | 52 | clockint <= clockint + 1; |
|
53 | 53 | |
|
54 | 54 | end if; |
|
55 | 55 | end process; |
|
56 | 56 | |
|
57 | sclk <= clockint(N); | |
|
57 | sclk <= clk when N=0 else clockint(N-1); | |
|
58 | 58 | |
|
59 | 59 | end architecture; No newline at end of file |
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