@@ -511,7 +511,7 BEGIN -- beh | |||||
511 | pirq_ms => 6, |
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511 | pirq_ms => 6, | |
512 | pirq_wfp => 14, |
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512 | pirq_wfp => 14, | |
513 | hindex => 2, |
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513 | hindex => 2, | |
514 |
top_lfr_version => X"00012 |
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514 | top_lfr_version => X"000128") -- aa.bb.cc version | |
515 | PORT MAP ( |
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515 | PORT MAP ( | |
516 | clk => clk_25, |
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516 | clk => clk_25, | |
517 | rstn => LFR_rstn, |
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517 | rstn => LFR_rstn, |
@@ -1,3 +1,25 | |||||
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1 | ------------------------------------------------------------------------------ | |||
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2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
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3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
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4 | -- | |||
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5 | -- This program is free software; you can redistribute it and/or modify | |||
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6 | -- it under the terms of the GNU General Public License as published by | |||
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7 | -- the Free Software Foundation; either version 3 of the License, or | |||
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8 | -- (at your option) any later version. | |||
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9 | -- | |||
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10 | -- This program is distributed in the hope that it will be useful, | |||
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11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
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12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
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13 | -- GNU General Public License for more details. | |||
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14 | -- | |||
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15 | -- You should have received a copy of the GNU General Public License | |||
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16 | -- along with this program; if not, write to the Free Software | |||
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17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
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18 | ------------------------------------------------------------------------------- | |||
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19 | -- Author : Jean-christophe Pellion | |||
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20 | -- Mail : jean-christophe.pellion@lpp.polytechnique.fr | |||
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21 | -- jean-christophe.pellion@easii-ic.com | |||
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22 | ---------------------------------------------------------------------------- | |||
1 | LIBRARY ieee; |
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23 | LIBRARY ieee; | |
2 | USE ieee.std_logic_1164.ALL; |
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24 | USE ieee.std_logic_1164.ALL; | |
3 | USE ieee.numeric_std.ALL; |
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25 | USE ieee.numeric_std.ALL; | |
@@ -8,6 +30,8 USE lpp.iir_filter.ALL; | |||||
8 | USE lpp.FILTERcfg.ALL; |
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30 | USE lpp.FILTERcfg.ALL; | |
9 | USE lpp.lpp_memory.ALL; |
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31 | USE lpp.lpp_memory.ALL; | |
10 | USE lpp.lpp_waveform_pkg.ALL; |
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32 | USE lpp.lpp_waveform_pkg.ALL; | |
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33 | USE lpp.cic_pkg.ALL; | |||
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34 | USE data_type_pkg.ALL; | |||
11 |
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35 | |||
12 | LIBRARY techmap; |
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36 | LIBRARY techmap; | |
13 | USE techmap.gencomp.ALL; |
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37 | USE techmap.gencomp.ALL; | |
@@ -95,17 +119,15 ARCHITECTURE tb OF lpp_lfr_filter IS | |||||
95 | ----------------------------------------------------------------------------- |
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119 | ----------------------------------------------------------------------------- | |
96 | -- SIGNAL sample_f0_val : STD_LOGIC; |
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120 | -- SIGNAL sample_f0_val : STD_LOGIC; | |
97 | SIGNAL sample_f0 : samplT(ChanelCount-1 DOWNTO 0, 15 DOWNTO 0); |
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121 | SIGNAL sample_f0 : samplT(ChanelCount-1 DOWNTO 0, 15 DOWNTO 0); | |
98 |
SIGNAL sample_f0_s : sampl |
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122 | SIGNAL sample_f0_s : sample_vector(5 DOWNTO 0, 15 DOWNTO 0); | |
99 | -- |
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123 | -- | |
100 | -- SIGNAL sample_f1_val : STD_LOGIC; |
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124 | -- SIGNAL sample_f1_val : STD_LOGIC; | |
101 | SIGNAL sample_f1 : samplT(ChanelCount-1 DOWNTO 0, 15 DOWNTO 0); |
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125 | SIGNAL sample_f1 : samplT(ChanelCount-1 DOWNTO 0, 15 DOWNTO 0); | |
102 | SIGNAL sample_f1_s : samplT(5 DOWNTO 0, 15 DOWNTO 0); |
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126 | SIGNAL sample_f1_s : samplT(5 DOWNTO 0, 15 DOWNTO 0); | |
103 | -- |
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127 | -- | |
104 | -- SIGNAL sample_f2_val : STD_LOGIC; |
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128 | -- SIGNAL sample_f2_val : STD_LOGIC; | |
105 |
SIGNAL sample_f2 : sampl |
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129 | SIGNAL sample_f2 : sample_vector(5 DOWNTO 0, 15 DOWNTO 0); | |
106 | -- |
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130 | SIGNAL sample_f3 : sample_vector(5 DOWNTO 0, 15 DOWNTO 0); | |
107 | -- SIGNAL sample_f3_val : STD_LOGIC; |
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108 | SIGNAL sample_f3 : samplT(5 DOWNTO 0, 15 DOWNTO 0); |
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109 |
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131 | |||
110 | ----------------------------------------------------------------------------- |
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132 | ----------------------------------------------------------------------------- | |
111 | --SIGNAL data_f0_in_valid : STD_LOGIC_VECTOR(159 DOWNTO 0) := (OTHERS => '0'); |
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133 | --SIGNAL data_f0_in_valid : STD_LOGIC_VECTOR(159 DOWNTO 0) := (OTHERS => '0'); | |
@@ -295,6 +317,7 BEGIN | |||||
295 |
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317 | |||
296 | ----------------------------------------------------------------------------- |
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318 | ----------------------------------------------------------------------------- | |
297 | -- F2 -- @256 Hz |
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319 | -- F2 -- @256 Hz | |
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320 | -- F3 -- @16 Hz | |||
298 | ----------------------------------------------------------------------------- |
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321 | ----------------------------------------------------------------------------- | |
299 | all_bit_sample_f0_s : FOR I IN 15 DOWNTO 0 GENERATE |
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322 | all_bit_sample_f0_s : FOR I IN 15 DOWNTO 0 GENERATE | |
300 | sample_f0_s(0, I) <= sample_f0(0, I); -- V |
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323 | sample_f0_s(0, I) <= sample_f0(0, I); -- V | |
@@ -305,67 +328,34 BEGIN | |||||
305 | sample_f0_s(5, I) <= sample_f0(7, I); -- B3 |
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328 | sample_f0_s(5, I) <= sample_f0(7, I); -- B3 | |
306 | END GENERATE all_bit_sample_f0_s; |
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329 | END GENERATE all_bit_sample_f0_s; | |
307 |
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330 | |||
308 | Downsampling_f2 : Downsampling |
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331 | ||
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332 | cic_lfr_1: cic_lfr | |||
309 | GENERIC MAP ( |
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333 | GENERIC MAP ( | |
310 | ChanelCount => 6, |
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334 | tech => 0, | |
311 | SampleSize => 16, |
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335 | use_RAM_nCEL => Mem_use) | |
312 | DivideParam => 96) |
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313 | PORT MAP ( |
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336 | PORT MAP ( | |
314 | clk => clk, |
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337 | clk => clk, | |
315 | rstn => rstn, |
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338 | rstn => rstn, | |
316 | sample_in_val => sample_f0_val_s , |
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339 | run => '1', | |
317 | sample_in => sample_f0_s, |
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340 | ||
318 | sample_out_val => sample_f2_val, |
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341 | data_in => sample_f0_s, | |
319 |
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342 | data_in_valid => sample_f0_val_s, | |
320 |
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343 | |||
321 | --sample_f2_wen <= NOT(sample_f2_val) & |
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344 | data_out_16 => sample_f2, | |
322 | -- NOT(sample_f2_val) & |
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345 | data_out_16_valid => sample_f2_val, | |
323 | -- NOT(sample_f2_val) & |
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346 | ||
324 | -- NOT(sample_f2_val) & |
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347 | data_out_256 => sample_f3, | |
325 | -- NOT(sample_f2_val) & |
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348 | data_out_256_valid => sample_f3_val); | |
326 | -- NOT(sample_f2_val); |
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327 |
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349 | |||
328 | all_bit_sample_f2 : FOR I IN 15 DOWNTO 0 GENERATE |
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350 | all_bit_sample_f2 : FOR I IN 15 DOWNTO 0 GENERATE | |
329 | sample_f2_wdata_s(I) <= sample_f2(0, I); |
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351 | sample_f2_wdata_s(I) <= sample_f2(0, I); | |
330 |
sample_f2_wdata_s(16*1+I) <= sample_f2(1, I) |
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352 | sample_f2_wdata_s(16*1+I) <= sample_f2(1, I); | |
331 |
sample_f2_wdata_s(16*2+I) <= sample_f2(2, I) |
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353 | sample_f2_wdata_s(16*2+I) <= sample_f2(2, I); | |
332 | sample_f2_wdata_s(16*3+I) <= sample_f2(3, I); |
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354 | sample_f2_wdata_s(16*3+I) <= sample_f2(3, I); | |
333 | sample_f2_wdata_s(16*4+I) <= sample_f2(4, I); |
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355 | sample_f2_wdata_s(16*4+I) <= sample_f2(4, I); | |
334 | sample_f2_wdata_s(16*5+I) <= sample_f2(5, I); |
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356 | sample_f2_wdata_s(16*5+I) <= sample_f2(5, I); | |
335 | END GENERATE all_bit_sample_f2; |
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357 | END GENERATE all_bit_sample_f2; | |
336 |
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358 | |||
337 | ----------------------------------------------------------------------------- |
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338 | -- F3 -- @16 Hz |
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339 | ----------------------------------------------------------------------------- |
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340 | all_bit_sample_f1_s : FOR I IN 15 DOWNTO 0 GENERATE |
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341 | sample_f1_s(0, I) <= sample_f1(0, I); -- V |
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342 | sample_f1_s(1, I) <= sample_f1(1, I); -- E1 |
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343 | sample_f1_s(2, I) <= sample_f1(2, I); -- E2 |
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344 | sample_f1_s(3, I) <= sample_f1(5, I); -- B1 |
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345 | sample_f1_s(4, I) <= sample_f1(6, I); -- B2 |
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346 | sample_f1_s(5, I) <= sample_f1(7, I); -- B3 |
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347 | END GENERATE all_bit_sample_f1_s; |
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348 |
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349 | Downsampling_f3 : Downsampling |
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350 | GENERIC MAP ( |
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351 | ChanelCount => 6, |
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352 | SampleSize => 16, |
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353 | DivideParam => 256) |
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354 | PORT MAP ( |
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355 | clk => clk, |
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356 | rstn => rstn, |
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357 | sample_in_val => sample_f1_val_s , |
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358 | sample_in => sample_f1_s, |
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359 | sample_out_val => sample_f3_val, |
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360 | sample_out => sample_f3); |
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361 |
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362 | --sample_f3_wen <= (NOT sample_f3_val) & |
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363 | -- (NOT sample_f3_val) & |
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364 | -- (NOT sample_f3_val) & |
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365 | -- (NOT sample_f3_val) & |
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366 | -- (NOT sample_f3_val) & |
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367 | -- (NOT sample_f3_val); |
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368 |
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369 | all_bit_sample_f3 : FOR I IN 15 DOWNTO 0 GENERATE |
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359 | all_bit_sample_f3 : FOR I IN 15 DOWNTO 0 GENERATE | |
370 | sample_f3_wdata_s(I) <= sample_f3(0, I); |
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360 | sample_f3_wdata_s(I) <= sample_f3(0, I); | |
371 | sample_f3_wdata_s(16*1+I) <= sample_f3(1, I); |
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361 | sample_f3_wdata_s(16*1+I) <= sample_f3(1, I); | |
@@ -383,4 +373,4 BEGIN | |||||
383 | sample_f2_wdata <= sample_f2_wdata_s; |
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373 | sample_f2_wdata <= sample_f2_wdata_s; | |
384 | sample_f3_wdata <= sample_f3_wdata_s; |
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374 | sample_f3_wdata <= sample_f3_wdata_s; | |
385 |
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375 | |||
386 | END tb; No newline at end of file |
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376 | END tb; |
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