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Hanning windows in front of FFT
pellion -
r606:2f207df1fc75 simu_with_Leon3
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@@ -1,76 +1,96
1 1 LIBRARY ieee;
2 2 USE ieee.std_logic_1164.ALL;
3 3
4 4
5 5 LIBRARY lpp;
6 6 USE lpp.lpp_memory.ALL;
7 7 USE lpp.iir_filter.ALL;
8 8 USE lpp.spectral_matrix_package.ALL;
9 9 USE lpp.lpp_dma_pkg.ALL;
10 10 USE lpp.lpp_Header.ALL;
11 11 USE lpp.lpp_matrix.ALL;
12 12 USE lpp.lpp_matrix.ALL;
13 13 USE lpp.lpp_lfr_pkg.ALL;
14 14 USE lpp.lpp_fft.ALL;
15 15 USE lpp.fft_components.ALL;
16 USE lpp.window_function_pkg.ALL;
16 17
17 18 ENTITY lpp_lfr_ms_FFT IS
18 19 PORT (
19 20 clk : IN STD_LOGIC;
20 21 rstn : IN STD_LOGIC;
21 22 -- IN
22 23 sample_valid : IN STD_LOGIC;
23 24 fft_read : IN STD_LOGIC;
24 25 sample_data : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
25 26 sample_load : OUT STD_LOGIC;
26 27
27 28 --OUT
28 29 fft_pong : OUT STD_LOGIC;
29 30 fft_data_im : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
30 31 fft_data_re : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
31 32 fft_data_valid : OUT STD_LOGIC;
32 33 fft_ready : OUT STD_LOGIC
33 34
34 35 );
35 36 END;
36 37
37 38 ARCHITECTURE Behavioral OF lpp_lfr_ms_FFT IS
38 39
40 SIGNAL data_win : STD_LOGIC_VECTOR(15 DOWNTO 0);
41 SIGNAL data_win_valid : STD_LOGIC;
42
39 43 BEGIN
40 44
45 window_hanning: window_function
46 GENERIC MAP (
47 SIZE_DATA => 16,
48 SIZE_PARAM => 15,
49 NB_POINT_BY_WINDOW => 256)
50 PORT MAP (
51 clk => clk,
52 rstn => rstn,
53
54 restart_window => '0',
55 data_in => sample_data,
56 data_in_valid => sample_valid,
57
58 data_out => data_win,
59 data_out_valid => data_win_valid);
60
41 61 -----------------------------------------------------------------------------
42 62 -- FFT
43 63 -----------------------------------------------------------------------------
44 64 CoreFFT_1 : CoreFFT
45 65 GENERIC MAP (
46 66 LOGPTS => gLOGPTS,
47 67 LOGLOGPTS => gLOGLOGPTS,
48 68 WSIZE => gWSIZE,
49 69 TWIDTH => gTWIDTH,
50 70 DWIDTH => gDWIDTH,
51 71 TDWIDTH => gTDWIDTH,
52 72 RND_MODE => gRND_MODE,
53 73 SCALE_MODE => gSCALE_MODE,
54 74 PTS => gPTS,
55 75 HALFPTS => gHALFPTS,
56 76 inBuf_RWDLY => gInBuf_RWDLY)
57 77 PORT MAP (
58 78 clk => clk,
59 79 ifiStart => '0', -- '1'
60 80 ifiNreset => rstn,
61 81
62 ifiD_valid => sample_valid, -- IN
82 ifiD_valid => data_win_valid, -- IN
63 83 ifiRead_y => fft_read,
64 84 ifiD_im => (OTHERS => '0'), -- IN
65 ifiD_re => sample_data, -- IN
85 ifiD_re => data_win, -- IN
66 86 ifoLoad => sample_load, -- IN
67 87
68 88 ifoPong => fft_pong,
69 89 ifoY_im => fft_data_im,
70 90 ifoY_re => fft_data_re,
71 91 ifoY_valid => fft_data_valid,
72 92 ifoY_rdy => fft_ready);
73 93
74 94 -----------------------------------------------------------------------------
75 95
76 96 END Behavioral;
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