@@ -331,6 +331,7 BEGIN -- beh | |||
|
331 | 331 | -- time_out_2(J,I) <= time_out(J)(I); |
|
332 | 332 | -- END GENERATE all_sample_of_time_out; |
|
333 | 333 | --END GENERATE all_bit_of_time_out; |
|
334 | ||
|
334 | 335 |
|
|
335 | 336 | time_out_debug(1) <= x"1B1B" & x"1B1B1B1B"; |
|
336 | 337 | time_out_debug(2) <= x"2C2C" & x"2C2C2C2C"; |
@@ -384,39 +385,11 BEGIN -- beh | |||
|
384 | 385 | data_f2_data_out <= rdata; |
|
385 | 386 | data_f3_data_out <= rdata; |
|
386 | 387 |
|
|
387 | --lpp_waveform_fifo_withoutLatency_1: lpp_waveform_fifo_withoutLatency | |
|
388 | -- GENERIC MAP ( | |
|
389 | -- tech => tech) | |
|
390 | -- PORT MAP ( | |
|
391 | -- clk => clk, | |
|
392 | -- rstn => rstn, | |
|
393 | -- run => run, | |
|
394 | ||
|
395 | -- empty_almost => empty_almost, | |
|
396 | -- empty => empty, | |
|
397 | -- data_ren => data_ren, | |
|
398 | ||
|
399 | -- rdata_0 => data_f0_data_out, | |
|
400 | -- rdata_1 => data_f1_data_out, | |
|
401 | -- rdata_2 => data_f2_data_out, | |
|
402 | -- rdata_3 => data_f3_data_out, | |
|
403 | ||
|
404 | -- full_almost => full_almost, | |
|
405 | -- full => full, | |
|
406 | -- data_wen => data_wen, | |
|
407 | -- wdata => wdata); | |
|
408 | ||
|
409 | ||
|
410 | ||
|
411 | ||
|
412 | 388 | data_ren <= data_f3_data_out_ren & |
|
413 | 389 | data_f2_data_out_ren & |
|
414 | 390 | data_f1_data_out_ren & |
|
415 | 391 | data_f0_data_out_ren; |
|
416 | 392 | |
|
417 | ----------------------------------------------------------------------------- | |
|
418 | -- TODO : set the alterance : time, data, data, ..... | |
|
419 | ----------------------------------------------------------------------------- | |
|
420 | 393 |
|
|
421 | 394 | GENERIC MAP ( |
|
422 | 395 | nb_data_by_buffer_size => nb_word_by_buffer_size) |
General Comments 0
You need to be logged in to leave comments.
Login now