apb_lcd_ctrlr.vhd
167 lines
| 4.6 KiB
| text/x-vhdl
|
VhdlLexer
Alexis
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r12 | ------------------------------------------------------------------------------ | ||
-- This file is a part of the LPP VHDL IP LIBRARY | ||||
-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | ||||
-- | ||||
-- This program is free software; you can redistribute it and/or modify | ||||
-- it under the terms of the GNU General Public License as published by | ||||
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r19 | -- the Free Software Foundation; either version 3 of the License, or | ||
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r12 | -- (at your option) any later version. | ||
-- | ||||
-- This program is distributed in the hope that it will be useful, | ||||
-- but WITHOUT ANY WARRANTY; without even the implied warranty of | ||||
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||||
-- GNU General Public License for more details. | ||||
-- | ||||
-- You should have received a copy of the GNU General Public License | ||||
-- along with this program; if not, write to the Free Software | ||||
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||||
------------------------------------------------------------------------------- | ||||
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r38 | -- Author : Alexis Jeandet | ||
-- Mail : alexis.jeandet@lpp.polytechnique.fr | ||||
-------------------------------------------------------------------------------- | ||||
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r12 | library IEEE; | ||
use IEEE.STD_LOGIC_1164.ALL; | ||||
use ieee.numeric_std.all; | ||||
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r19 | library grlib; | ||
use grlib.amba.all; | ||||
use grlib.stdlib.all; | ||||
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r12 | use grlib.devices.all; | ||
library lpp; | ||||
use lpp.amba_lcd_16x2_ctrlr.all; | ||||
use lpp.LCD_16x2_CFG.all; | ||||
use lpp.lpp_amba.all; | ||||
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r37 | use lpp.apb_devices_list.all; | ||
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r12 | |||
entity apb_lcd_ctrlr is | ||||
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r19 | generic ( | ||
pindex : integer := 0; | ||||
paddr : integer := 0; | ||||
pmask : integer := 16#fff#; | ||||
pirq : integer := 0; | ||||
abits : integer := 8); | ||||
port ( | ||||
rst : in std_ulogic; | ||||
clk : in std_ulogic; | ||||
apbi : in apb_slv_in_type; | ||||
apbo : out apb_slv_out_type; | ||||
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r12 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | ||
LCD_RS : out STD_LOGIC; | ||||
LCD_RW : out STD_LOGIC; | ||||
LCD_E : out STD_LOGIC; | ||||
LCD_RET : out STD_LOGIC; | ||||
LCD_CS1 : out STD_LOGIC; | ||||
LCD_CS2 : out STD_LOGIC; | ||||
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r19 | SF_CE0 : out std_logic | ||
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r12 | ); | ||
end apb_lcd_ctrlr; | ||||
architecture Behavioral of apb_lcd_ctrlr is | ||||
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r14 | signal FramBUFF : FRM_Buff_Space; | ||
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r12 | signal CMD : std_logic_vector(10 downto 0); | ||
signal Exec : std_logic; | ||||
signal Ready : std_logic; | ||||
signal LCD_CTRL : LCD_DRVR_CTRL_BUSS; | ||||
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r19 | constant REVISION : integer := 1; | ||
constant pconfig : apb_config_type := ( | ||||
0 => ahb_device_reg (VENDOR_LPP, LPP_LCD_CTRLR, 0, REVISION, 0), | ||||
1 => apb_iobar(paddr, pmask)); | ||||
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r12 | --type FRM_Buff_El is std_logic_vector(31 downto 0); | ||
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r14 | type FRM_Buff_Reg is array(lcd_space_size-1 downto 0) of std_logic_vector(31 downto 0); | ||
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r12 | |||
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r19 | |||
type LCD_ctrlr_Reg is record | ||||
CTRL_Reg : std_logic_vector(31 downto 0); | ||||
FRAME_BUFF : FRM_Buff_Reg; | ||||
end record; | ||||
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r14 | |||
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r19 | signal r : LCD_ctrlr_Reg; | ||
signal Rdata : std_logic_vector(31 downto 0); | ||||
begin | ||||
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r12 | |||
LCD_data <= LCD_CTRL.LCD_DATA; | ||||
LCD_RS <= LCD_CTRL.LCD_RS; | ||||
LCD_RW <= LCD_CTRL.LCD_RW; | ||||
LCD_E <= LCD_CTRL.LCD_E; | ||||
LCD_RET <= '0'; | ||||
LCD_CS1 <= '0'; | ||||
LCD_CS2 <= '0'; | ||||
SF_CE0 <= '1'; | ||||
CMD(7 downto 0) <= r.CTRL_Reg(7 downto 0); --CMD value | ||||
CMD(9 downto 8) <= r.CTRL_Reg(9 downto 8); --CMD tempo value | ||||
r.CTRL_Reg(10) <= Ready; | ||||
Driver0 : LCD_16x2_ENGINE | ||||
generic map(50000) | ||||
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r19 | Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL); | ||
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r12 | |||
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r14 | FRM_BF : for i in 0 to lcd_space_size-1 generate | ||
FramBUFF(i) <= r.FRAME_BUFF(i)(7 downto 0); | ||||
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r19 | end generate; | ||
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r12 | |||
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r19 | process(rst,clk) | ||
begin | ||||
if rst = '0' then | ||||
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r14 | r.CTRL_Reg(9 downto 0) <= (others => '0'); | ||
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r19 | Exec <= '0'; | ||
elsif clk'event and clk = '1' then | ||||
--APB Write OP | ||||
if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then | ||||
case apbi.paddr(7 downto 2) is | ||||
when "000000" => | ||||
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r14 | r.CTRL_Reg(9 downto 0) <= apbi.pwdata(9 downto 0); | ||
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r19 | Exec <= '1'; | ||
when others => | ||||
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r14 | writeC: for i in 1 to lcd_space_size loop | ||
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r12 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | ||
r.FRAME_BUFF(i-1) <= apbi.pwdata; | ||||
end if; | ||||
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r14 | Exec <= '0'; | ||
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r19 | end loop; | ||
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r12 | end case; | ||
else | ||||
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r19 | Exec <= '0'; | ||
end if; | ||||
--APB READ OP | ||||
if (apbi.psel(pindex) and (not apbi.pwrite)) = '1' then | ||||
case apbi.paddr(7 downto 2) is | ||||
when "000000" => | ||||
Rdata <= r.CTRL_Reg; | ||||
when others => | ||||
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r14 | readC: for i in 1 to lcd_space_size loop | ||
if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | ||||
Rdata(7 downto 0) <= r.FRAME_BUFF(i-1)(7 downto 0); | ||||
end if; | ||||
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r19 | end loop; | ||
end case; | ||||
end if; | ||||
end if; | ||||
apbo.pconfig <= pconfig; | ||||
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r12 | end process; | ||
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r14 | apbo.prdata <= Rdata when apbi.penable = '1' ; | ||
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r12 | |||
end Behavioral; | ||||