HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib Files · lib/lpp/dsp/lpp_fft/FFTamont.vhd

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        martin
    
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      -- FFTamont.vhd

      library IEEE;

      use IEEE.std_logic_1164.all;

      use IEEE.numeric_std.all;

      entity FFTamont is

      generic(

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          Data_sz  : integer range 1 to 32 := 16;

          NbData : integer range 1 to 512 := 256

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          );

      port(

          clk         : in std_logic;

          rstn        : in std_logic;

          Load        : in std_logic;

          Empty       : in std_logic;

          DATA        : in std_logic_vector(Data_sz-1 downto 0);

          Valid       : out std_logic;

          Read        : out std_logic;

          Data_re     : out std_logic_vector(Data_sz-1 downto 0);

          Data_im     : out std_logic_vector(Data_sz-1 downto 0)

      );

      end entity;

      architecture ar_FFTamont of FFTamont is

      type etat is (eX,e0,e1,e2);

      signal ect : etat;

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      signal DataCount : integer;

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      begin

          process(clk,rstn)

          begin

              if(rstn='0')then 

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                  ect <= e0;

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                  Read <= '1';

                  Valid <= '0';

                  Data_re <= (others => '0');

                  Data_im <= (others => '0');

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                  DataCount <= 0;

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              elsif(clk'event and clk='1')then

                  case ect is

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                      when e0 =>

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                          if(Load='1' and Empty='0')then

                              Read <= '0';

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                              ect <= e1;                       

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                          end if;

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                      when e1 =>

                          Valid <= '0';

                          Read <= '1';

                          ect <= e2;

                      when e2 =>

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                          Data_re <= DATA;

                          Data_im <= (others => '0');

                          Valid <= '1';

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                          if(DataCount=NbData-1)then

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                              DataCount <= 0;

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                              ect <= eX;

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                          else

                              DataCount <= DataCount + 1;

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                              if(Load='1' and Empty='0')then

                                  Read <= '0';

                                  ect <= e1;

                              else

                                  ect <= eX;

                              end if;                        

                          end if;

                      when eX =>

                          Valid <= '0';

                          ect <= e0;

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                      when others =>

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                          null; 

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                  end case;

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      --***********************************************************

      --          Chargement Rapide (toutes a la suite)

      --***********************************************************

      --            case ect is

      --

      --                when e0 =>                    

      --                    if(Load='1' and Empty='0')then

      --                        Read <= '0';

      --                        ect <= eX;                       

      --                    end if;

      --

      --                when eX =>

      --                    ect <= e1;               

      --

      --                when e1 =>                    

      --                    Data_re <= DATA;

      --                    Data_im <= (others => '0');

      --                    Valid <= '1';

      --                    if(DataCount=NbData-2)then

      --                        Read <= '1';

      --                        DataCount <= DataCount + 1;

      --                    elsif(DataCount=NbData)then

      --                        Valid <= '0';

      --                        DataCount <= 0;

      --                        ect <= e0;

      --                    else

      --                        DataCount <= DataCount + 1;

      --                    end if;  

      --               

      --                when others =>

      --                    null;                                           

      --

      --            end case;

      --***********************************************************

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              end if;

          end process;

      end architecture;

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martin Débug de la FIFO...	r103	-- FFTamont.vhd
		library IEEE;
		use IEEE.std_logic_1164.all;
		use IEEE.numeric_std.all;

		entity FFTamont is
		generic(
martin FFT + 1 FIFO OKAI...	r106	Data_sz : integer range 1 to 32 := 16;
		NbData : integer range 1 to 512 := 256
martin Débug de la FIFO...	r103	);
		port(
		clk : in std_logic;
		rstn : in std_logic;
		Load : in std_logic;
		Empty : in std_logic;
		DATA : in std_logic_vector(Data_sz-1 downto 0);
		Valid : out std_logic;
		Read : out std_logic;
		Data_re : out std_logic_vector(Data_sz-1 downto 0);
		Data_im : out std_logic_vector(Data_sz-1 downto 0)
		);
		end entity;


		architecture ar_FFTamont of FFTamont is

		type etat is (eX,e0,e1,e2);
		signal ect : etat;

martin FFT + 1 FIFO OKAI...	r106	signal DataCount : integer;
martin Débug de la FIFO...	r103
		begin

		process(clk,rstn)
		begin
		if(rstn='0')then
martin FFT + 1 FIFO OKAI...	r106	ect <= e0;
martin Débug de la FIFO...	r103	Read <= '1';
		Valid <= '0';
		Data_re <= (others => '0');
		Data_im <= (others => '0');
martin FFT + 1 FIFO OKAI...	r106	DataCount <= 0;
martin Débug de la FIFO...	r103
		elsif(clk'event and clk='1')then
		case ect is

martin FFT + 1 FIFO Okai...	r107	when e0 =>
martin FFT + 1 FIFO OKAI...	r106	if(Load='1' and Empty='0')then
		Read <= '0';
martin FFT + 1 FIFO Okai...	r107	ect <= e1;
martin Débug de la FIFO...	r103	end if;

martin FFT + 1 FIFO Okai...	r107	when e1 =>
		Valid <= '0';
		Read <= '1';
		ect <= e2;

		when e2 =>
martin Débug de la FIFO...	r103	Data_re <= DATA;
		Data_im <= (others => '0');
		Valid <= '1';
martin FFT + 1 FIFO Okai...	r107	if(DataCount=NbData-1)then
martin FFT + 1 FIFO OKAI...	r106	DataCount <= 0;
martin FFT + 1 FIFO Okai...	r107	ect <= eX;
martin FFT + 1 FIFO OKAI...	r106	else
		DataCount <= DataCount + 1;
martin FFT + 1 FIFO Okai...	r107	if(Load='1' and Empty='0')then
		Read <= '0';
		ect <= e1;
		else
		ect <= eX;
		end if;
		end if;

		when eX =>
		Valid <= '0';
		ect <= e0;

martin FFT + 1 FIFO OKAI...	r106	when others =>
martin FFT + 1 FIFO Okai...	r107	null;
martin Débug de la FIFO...	r103
		end case;
martin FFT + 1 FIFO Okai...	r107
		--***********************************************************
		-- Chargement Rapide (toutes a la suite)
		--***********************************************************
		-- case ect is
		--
		-- when e0 =>
		-- if(Load='1' and Empty='0')then
		-- Read <= '0';
		-- ect <= eX;
		-- end if;
		--
		-- when eX =>
		-- ect <= e1;
		--
		-- when e1 =>
		-- Data_re <= DATA;
		-- Data_im <= (others => '0');
		-- Valid <= '1';
		-- if(DataCount=NbData-2)then
		-- Read <= '1';
		-- DataCount <= DataCount + 1;
		-- elsif(DataCount=NbData)then
		-- Valid <= '0';
		-- DataCount <= 0;
		-- ect <= e0;
		-- else
		-- DataCount <= DataCount + 1;
		-- end if;
		--
		-- when others =>
		-- null;
		--
		-- end case;
		--***********************************************************
martin Débug de la FIFO...	r103	end if;
		end process;

		end architecture;