fsw_misc.h
169 lines
| 5.1 KiB
| text/x-c
|
CLexer
/ header / fsw_misc.h
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r5 | #ifndef FSW_MISC_H_INCLUDED | ||
#define FSW_MISC_H_INCLUDED | ||||
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r45 | #include <rtems.h> | ||
#include <stdio.h> | ||||
#include <grspw.h> | ||||
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r175 | #include <grlib_regs.h> | ||
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r45 | |||
#include "fsw_params.h" | ||||
#include "fsw_spacewire.h" | ||||
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r134 | #include "lfr_cpu_usage_report.h" | ||
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r5 | |||
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r318 | #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0 | ||
#define WATCHDOG_LOOP_PRINTF 10 | ||||
#define WATCHDOG_LOOP_DEBUG 3 | ||||
#define DUMB_MESSAGE_NB 15 | ||||
#define NB_RTEMS_EVENTS 32 | ||||
#define EVENT_12 12 | ||||
#define EVENT_13 13 | ||||
#define EVENT_14 14 | ||||
#define DUMB_MESSAGE_0 "in DUMB *** default" | ||||
#define DUMB_MESSAGE_1 "in DUMB *** timecode_irq_handler" | ||||
#define DUMB_MESSAGE_2 "in DUMB *** f3 buffer changed" | ||||
#define DUMB_MESSAGE_3 "in DUMB *** in SMIQ *** Error sending event to AVF0" | ||||
#define DUMB_MESSAGE_4 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ" | ||||
#define DUMB_MESSAGE_5 "in DUMB *** waveforms_simulator_isr" | ||||
#define DUMB_MESSAGE_6 "VHDL SM *** two buffers f0 ready" | ||||
#define DUMB_MESSAGE_7 "ready for dump" | ||||
#define DUMB_MESSAGE_8 "VHDL ERR *** spectral matrix" | ||||
#define DUMB_MESSAGE_9 "tick" | ||||
#define DUMB_MESSAGE_10 "VHDL ERR *** waveform picker" | ||||
#define DUMB_MESSAGE_11 "VHDL ERR *** unexpected ready matrix values" | ||||
#define DUMB_MESSAGE_12 "WATCHDOG timer" | ||||
#define DUMB_MESSAGE_13 "TIMECODE timer" | ||||
#define DUMB_MESSAGE_14 "TIMECODE ISR" | ||||
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r259 | |||
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r226 | enum lfr_reset_cause_t{ | ||
UNKNOWN_CAUSE, | ||||
POWER_ON, | ||||
TC_RESET, | ||||
WATCHDOG, | ||||
ERROR_RESET, | ||||
UNEXP_RESET | ||||
}; | ||||
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r317 | typedef struct{ | ||
unsigned char dpu_spw_parity; | ||||
unsigned char dpu_spw_disconnect; | ||||
unsigned char dpu_spw_escape; | ||||
unsigned char dpu_spw_credit; | ||||
unsigned char dpu_spw_write_sync; | ||||
unsigned char timecode_erroneous; | ||||
unsigned char timecode_missing; | ||||
unsigned char timecode_invalid; | ||||
unsigned char time_timecode_it; | ||||
unsigned char time_not_synchro; | ||||
unsigned char time_timecode_ctr; | ||||
unsigned char ahb_correctable; | ||||
} hk_lfr_le_t; | ||||
typedef struct{ | ||||
unsigned char dpu_spw_early_eop; | ||||
unsigned char dpu_spw_invalid_addr; | ||||
unsigned char dpu_spw_eep; | ||||
unsigned char dpu_spw_rx_too_big; | ||||
} hk_lfr_me_t; | ||||
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r361 | #define B00 65 | ||
#define B01 65 | ||||
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r360 | #define B02 0 | ||
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r361 | #define B10 2048 | ||
#define B11 -3817 | ||||
#define B12 2048 | ||||
#define B20 2048 | ||||
#define B21 -3987 | ||||
#define B22 2048 | ||||
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r360 | |||
#define A00 1 | ||||
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r361 | #define A01 -1850 | ||
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r360 | #define A02 0 | ||
#define A10 1 | ||||
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r361 | #define A11 -3787 | ||
#define A12 1758 | ||||
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r360 | #define A20 1 | ||
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r361 | #define A21 -3974 | ||
#define A22 1943 | ||||
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r360 | |||
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r361 | #define GAIN_B0 17 | ||
#define GAIN_B1 11 | ||||
#define GAIN_B2 11 | ||||
#define GAIN_A0 11 | ||||
#define GAIN_A1 11 | ||||
#define GAIN_A2 11 | ||||
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r360 | |||
#define NB_COEFFS 3 | ||||
#define COEFF0 0 | ||||
#define COEFF1 1 | ||||
#define COEFF2 2 | ||||
typedef struct filter_ctx | ||||
{ | ||||
int W[NB_COEFFS][NB_COEFFS]; | ||||
}filter_ctx; | ||||
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r239 | extern gptimer_regs_t *gptimer_regs; | ||
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r259 | extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* ); | ||
extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* ); | ||||
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r239 | |||
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r322 | extern rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic | ||
extern rtems_id HK_id;// id of the HK rate monotonic period | ||||
extern rtems_name name_avgv_rate_monotonic; // name of the AVGV rate monotonic | ||||
extern rtems_id AVGV_id;// id of the AVGV rate monotonic period | ||||
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r45 | |||
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r239 | void timer_configure( unsigned char timer, unsigned int clock_divider, | ||
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r5 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ); | ||
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r239 | void timer_start( unsigned char timer ); | ||
void timer_stop( unsigned char timer ); | ||||
void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider); | ||||
// WATCHDOG | ||||
rtems_isr watchdog_isr( rtems_vector_number vector ); | ||||
void watchdog_configure(void); | ||||
void watchdog_stop(void); | ||||
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r262 | void watchdog_reload(void); | ||
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r239 | void watchdog_start(void); | ||
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r17 | |||
// SERIAL LINK | ||||
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r25 | int send_console_outputs_on_apbuart_port( void ); | ||
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r94 | int enable_apbuart_transmitter( void ); | ||
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r40 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value); | ||
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r17 | |||
// RTEMS TASKS | ||||
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r239 | rtems_task load_task( rtems_task_argument argument ); | ||
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r45 | rtems_task hous_task( rtems_task_argument argument ); | ||
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r298 | rtems_task avgv_task( rtems_task_argument argument ); | ||
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r45 | rtems_task dumb_task( rtems_task_argument unused ); | ||
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r35 | |||
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r46 | void init_housekeeping_parameters( void ); | ||
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r149 | void increment_seq_counter(unsigned short *packetSequenceControl); | ||
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r75 | void getTime( unsigned char *time); | ||
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r117 | unsigned long long int getTimeAsUnsignedLongLongInt( ); | ||
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r110 | void send_dumb_hk( void ); | ||
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r185 | void get_temperatures( unsigned char *temperatures ); | ||
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r182 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ); | ||
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r134 | void get_cpu_load( unsigned char *resource_statistics ); | ||
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r212 | void set_hk_lfr_sc_potential_flag( bool state ); | ||
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r295 | void set_sy_lfr_pas_filter_enabled( bool state ); | ||
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r262 | void set_sy_lfr_watchdog_enabled( bool state ); | ||
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r212 | void set_hk_lfr_calib_enable( bool state ); | ||
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r226 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ); | ||
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r240 | void hk_lfr_le_me_he_update(); | ||
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r249 | void set_hk_lfr_time_not_synchro(); | ||
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r75 | |||
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r118 | extern int sched_yield( void ); | ||
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r166 | extern void rtems_cpu_usage_reset(); | ||
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r132 | extern ring_node *current_ring_node_f3; | ||
extern ring_node *ring_node_to_send_cwf_f3; | ||||
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r171 | extern ring_node waveform_ring_f3[]; | ||
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r149 | extern unsigned short sequenceCounterHK; | ||
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r118 | |||
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r197 | extern unsigned char hk_lfr_q_sd_fifo_size_max; | ||
extern unsigned char hk_lfr_q_rv_fifo_size_max; | ||||
extern unsigned char hk_lfr_q_p0_fifo_size_max; | ||||
extern unsigned char hk_lfr_q_p1_fifo_size_max; | ||||
extern unsigned char hk_lfr_q_p2_fifo_size_max; | ||||
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r5 | #endif // FSW_MISC_H_INCLUDED | ||