|
@@
-978,7
+978,7
void getReactionWheelsFrequencies( ccsds
|
|
978
|
978
|
(unsigned char*) &bytePosPtr[ BYTE_POS_UPDATE_INFO_CP_RPW_SC_RW4_F2 ] );
|
|
979
|
979
|
}
|
|
980
|
980
|
|
|
981
|
|
void setFBinMask( unsigned char *fbins_mask, float rw_f, unsigned char deltaFreq, unsigned char flag )
|
|
|
981
|
void setFBinMask( unsigned char *fbins_mask, float rw_f, unsigned char deltaFreq, unsigned char flag, float sy_lfr_rw_k )
|
|
982
|
982
|
{
|
|
983
|
983
|
/** This function executes specific actions when a TC_LFR_UPDATE_INFO TeleCommand has been received.
|
|
984
|
984
|
*
|
|
@@
-998,6
+998,7
void setFBinMask( unsigned char *fbins_m
|
|
998
|
998
|
float fi;
|
|
999
|
999
|
float deltaBelow;
|
|
1000
|
1000
|
float deltaAbove;
|
|
|
1001
|
float freqToFilterOut;
|
|
1001
|
1002
|
int binBelow;
|
|
1002
|
1003
|
int binAbove;
|
|
1003
|
1004
|
int closestBin;
|
|
@@
-1006,27
+1007,32
void setFBinMask( unsigned char *fbins_m
|
|
1006
|
1007
|
int bin;
|
|
1007
|
1008
|
int binToRemove[NB_BINS_TO_REMOVE];
|
|
1008
|
1009
|
int k;
|
|
|
1010
|
bool filteringSet;
|
|
1009
|
1011
|
|
|
1010
|
1012
|
closestBin = 0;
|
|
1011
|
1013
|
whichByte = 0;
|
|
1012
|
1014
|
bin = 0;
|
|
|
1015
|
filteringSet = false;
|
|
1013
|
1016
|
|
|
1014
|
1017
|
for (k = 0; k < NB_BINS_TO_REMOVE; k++)
|
|
1015
|
1018
|
{
|
|
1016
|
1019
|
binToRemove[k] = -1;
|
|
1017
|
1020
|
}
|
|
1018
|
1021
|
|
|
1019
|
|
// compute the frequency range to filter [ rw_f - delta_f/2; rw_f + delta_f/2 ]
|
|
1020
|
|
f_RW_min = rw_f - (filterPar.sy_lfr_sc_rw_delta_f / 2.);
|
|
1021
|
|
f_RW_MAX = rw_f + (filterPar.sy_lfr_sc_rw_delta_f / 2.);
|
|
|
1022
|
// compute the frequency range to filter [ rw_f - delta_f; rw_f + delta_f ]
|
|
|
1023
|
f_RW_min = rw_f - ((filterPar.sy_lfr_sc_rw_delta_f) * sy_lfr_rw_k);
|
|
|
1024
|
f_RW_MAX = rw_f + ((filterPar.sy_lfr_sc_rw_delta_f) * sy_lfr_rw_k);
|
|
1022
|
1025
|
|
|
|
1026
|
freqToFilterOut = f_RW_min;
|
|
|
1027
|
while ( filteringSet == false )
|
|
|
1028
|
{
|
|
1023
|
1029
|
// compute the index of the frequency bin immediately below rw_f
|
|
1024
|
|
binBelow = (int) ( floor( ((double) rw_f) / ((double) deltaFreq)) );
|
|
1025
|
|
deltaBelow = rw_f - binBelow * deltaFreq;
|
|
|
1030
|
binBelow = (int) ( floor( ((double) freqToFilterOut) / ((double) deltaFreq)) );
|
|
|
1031
|
deltaBelow = freqToFilterOut - binBelow * deltaFreq;
|
|
1026
|
1032
|
|
|
1027
|
1033
|
// compute the index of the frequency bin immediately above rw_f
|
|
1028
|
|
binAbove = (int) ( ceil( ((double) rw_f) / ((double) deltaFreq)) );
|
|
1029
|
|
deltaAbove = binAbove * deltaFreq - rw_f;
|
|
|
1034
|
binAbove = (int) ( ceil( ((double) freqToFilterOut) / ((double) deltaFreq)) );
|
|
|
1035
|
deltaAbove = binAbove * deltaFreq - freqToFilterOut;
|
|
1030
|
1036
|
|
|
1031
|
1037
|
// search the closest bin
|
|
1032
|
1038
|
if (deltaAbove > deltaBelow)
|
|
@@
-1048,9
+1054,9
void setFBinMask( unsigned char *fbins_m
|
|
1048
|
1054
|
// thus, the index 0 in a mask corresponds to the bin 1 of the spectrum
|
|
1049
|
1055
|
//**************************************************************************************
|
|
1050
|
1056
|
|
|
1051
|
|
// 1. IF [ f_RW_min, f_RW_MAX] is included in [ fi_min; fi_MAX ]
|
|
|
1057
|
// 1. IF freqToFilterOut is included in [ fi_min; fi_MAX ]
|
|
1052
|
1058
|
// => remove f_(i), f_(i-1) and f_(i+1)
|
|
1053
|
|
if ( ( f_RW_min > fi_min ) && ( f_RW_MAX < fi_MAX ) )
|
|
|
1059
|
if ( ( freqToFilterOut > fi_min ) && ( freqToFilterOut < fi_MAX ) )
|
|
1054
|
1060
|
{
|
|
1055
|
1061
|
binToRemove[0] = (closestBin - 1) - 1;
|
|
1056
|
1062
|
binToRemove[1] = (closestBin) - 1;
|
|
@@
-1079,6
+1085,22
void setFBinMask( unsigned char *fbins_m
|
|
1079
|
1085
|
}
|
|
1080
|
1086
|
}
|
|
1081
|
1087
|
}
|
|
|
1088
|
|
|
|
1089
|
// update freqToFilterOut
|
|
|
1090
|
if ( freqToFilterOut == f_RW_MAX )
|
|
|
1091
|
{
|
|
|
1092
|
filteringSet = true; // end of the loop
|
|
|
1093
|
}
|
|
|
1094
|
else
|
|
|
1095
|
{
|
|
|
1096
|
freqToFilterOut = freqToFilterOut + deltaFreq;
|
|
|
1097
|
}
|
|
|
1098
|
|
|
|
1099
|
if ( freqToFilterOut > f_RW_MAX)
|
|
|
1100
|
{
|
|
|
1101
|
freqToFilterOut = f_RW_MAX;
|
|
|
1102
|
}
|
|
|
1103
|
}
|
|
1082
|
1104
|
}
|
|
1083
|
1105
|
|
|
1084
|
1106
|
void build_sy_lfr_rw_mask( unsigned int channel )
|
|
@@
-1117,28
+1139,28
void build_sy_lfr_rw_mask( unsigned int
|
|
1117
|
1139
|
}
|
|
1118
|
1140
|
|
|
1119
|
1141
|
// RW1 F1
|
|
1120
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw1_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW1_F1) >> SHIFT_7_BITS ); // [1000 0000]
|
|
|
1142
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw1_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW1_F1) >> SHIFT_7_BITS, 1. ); // [1000 0000]
|
|
1121
|
1143
|
|
|
1122
|
1144
|
// RW1 F2
|
|
1123
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw1_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW1_F2) >> SHIFT_6_BITS ); // [0100 0000]
|
|
|
1145
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw1_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW1_F2) >> SHIFT_6_BITS, 1. ); // [0100 0000]
|
|
1124
|
1146
|
|
|
1125
|
1147
|
// RW2 F1
|
|
1126
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw2_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW2_F1) >> SHIFT_5_BITS ); // [0010 0000]
|
|
|
1148
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw2_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW2_F1) >> SHIFT_5_BITS, 1. ); // [0010 0000]
|
|
1127
|
1149
|
|
|
1128
|
1150
|
// RW2 F2
|
|
1129
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw2_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW2_F2) >> SHIFT_4_BITS ); // [0001 0000]
|
|
|
1151
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw2_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW2_F2) >> SHIFT_4_BITS, 1. ); // [0001 0000]
|
|
1130
|
1152
|
|
|
1131
|
1153
|
// RW3 F1
|
|
1132
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw3_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW3_F1) >> SHIFT_3_BITS ); // [0000 1000]
|
|
|
1154
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw3_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW3_F1) >> SHIFT_3_BITS, 1. ); // [0000 1000]
|
|
1133
|
1155
|
|
|
1134
|
1156
|
// RW3 F2
|
|
1135
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw3_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW3_F2) >> SHIFT_2_BITS ); // [0000 0100]
|
|
|
1157
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw3_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW3_F2) >> SHIFT_2_BITS, 1. ); // [0000 0100]
|
|
1136
|
1158
|
|
|
1137
|
1159
|
// RW4 F1
|
|
1138
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw4_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW4_F1) >> 1 ); // [0000 0010]
|
|
|
1160
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw4_f1, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW4_F1) >> 1 , 1. ); // [0000 0010]
|
|
1139
|
1161
|
|
|
1140
|
1162
|
// RW4 F2
|
|
1141
|
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw4_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW4_F2) ); // [0000 0001]
|
|
|
1163
|
setFBinMask( local_rw_fbins_mask, cp_rpw_sc_rw4_f2, deltaF, (cp_rpw_sc_rw_f_flags & BIT_RW4_F2) , 1.); // [0000 0001]
|
|
1142
|
1164
|
|
|
1143
|
1165
|
// update the value of the fbins related to reaction wheels frequency filtering
|
|
1144
|
1166
|
if (maskPtr != NULL)
|