@@ -1,308 +1,312 | |||||
1 | /*------------------------------------------------------------------------------ |
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1 | /*------------------------------------------------------------------------------ | |
2 | -- This file is a part of the libuc, microcontroler library |
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2 | -- This file is a part of the libuc, microcontroler library | |
3 | -- Copyright (C) 2011, Alexis Jeandet |
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3 | -- Copyright (C) 2011, Alexis Jeandet | |
4 | -- |
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4 | -- | |
5 | -- This program is free software; you can redistribute it and/or modify |
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5 | -- This program is free software; you can redistribute it and/or modify | |
6 | -- it under the terms of the GNU General Public License as published by |
|
6 | -- it under the terms of the GNU General Public License as published by | |
7 | -- the Free Software Foundation; either version 3 of the License, or |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
8 | -- (at your option) any later version. |
|
8 | -- (at your option) any later version. | |
9 | -- |
|
9 | -- | |
10 | -- This program is distributed in the hope that it will be useful, |
|
10 | -- This program is distributed in the hope that it will be useful, | |
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | -- GNU General Public License for more details. |
|
13 | -- GNU General Public License for more details. | |
14 | -- |
|
14 | -- | |
15 | -- You should have received a copy of the GNU General Public License |
|
15 | -- You should have received a copy of the GNU General Public License | |
16 | -- along with this program; if not, write to the Free Software |
|
16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
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18 | ------------------------------------------------------------------------------- | |
19 | -- Author : Alexis Jeandet |
|
19 | -- Author : Alexis Jeandet | |
20 | -- Mail : alexis.jeandet@gmail.com |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
21 | -------------------------------------------------------------------------------*/ |
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21 | -------------------------------------------------------------------------------*/ | |
22 | #include "bsp.h" |
|
22 | #include "bsp.h" | |
23 | #include <streamdevices.h> |
|
23 | #include <streamdevices.h> | |
24 | #include <malloc.h> |
|
24 | #include <malloc.h> | |
25 | #include <gpio.h> |
|
25 | #include <gpio.h> | |
26 | #include <uart.h> |
|
26 | #include <uart.h> | |
27 | #include <stdio.h> |
|
27 | #include <stdio.h> | |
28 | #include <stm32f4xx_gpio.h> |
|
28 | #include <stm32f4xx_gpio.h> | |
29 | #include <stm32f4xx_fsmc.h> |
|
29 | #include <stm32f4xx_fsmc.h> | |
30 | #include <i2c.h> |
|
30 | #include <i2c.h> | |
31 | #include <core.h> |
|
31 | #include <core.h> | |
32 | #include <terminal.h> |
|
32 | #include <terminal.h> | |
33 |
|
33 | |||
34 | uint32_t OSC0 =8000000; |
|
34 | uint32_t OSC0 =8000000; | |
35 | uint32_t INTOSC =16000000; |
|
35 | uint32_t INTOSC =16000000; | |
36 | uint32_t RTCOSC =32768; |
|
36 | uint32_t RTCOSC =32768; | |
37 | uint32_t currentCpuFreq=0; |
|
37 | uint32_t currentCpuFreq=0; | |
38 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; |
|
38 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; | |
39 |
|
39 | |||
40 | LCD_IF_t lcdIF0={ |
|
40 | LCD_IF_t lcdIF0={ | |
41 | .init = &bsp_FSMC_init, |
|
41 | .init = &bsp_FSMC_init, | |
42 | .writereg = &bsp_lcd0_write_reg, |
|
42 | .writereg = &bsp_lcd0_write_reg, | |
43 | .readreg = &bsp_lcd0_read_reg, |
|
43 | .readreg = &bsp_lcd0_read_reg, | |
44 | .writeGRAM = &bsp_lcd0_writeGRAM, |
|
44 | .writeGRAM = &bsp_lcd0_writeGRAM, | |
45 | .readGRAM = &bsp_lcd0_readGRAM |
|
45 | .readGRAM = &bsp_lcd0_readGRAM | |
46 | }; |
|
46 | }; | |
47 |
|
47 | |||
48 | LCD_t lcd0={ |
|
48 | LCD_t lcd0={ | |
49 | .interface = &lcdIF0, |
|
49 | .interface = &lcdIF0, | |
50 | .init = &ili9328init, |
|
50 | .init = &ili9328init, | |
51 | .paint = &ili9328paint, |
|
51 | .paint = &ili9328paint, | |
52 | .paintText = &ili9328paintText, |
|
52 | .paintText = &ili9328paintText, | |
53 | .paintFilRect = &ili9328paintFilRect, |
|
53 | .paintFilRect = &ili9328paintFilRect, | |
54 | .refreshenable = &ili9328refreshenable, |
|
54 | .refreshenable = &ili9328refreshenable, | |
55 | .width= 240, |
|
55 | .width= 240, | |
56 | .height = 320 |
|
56 | .height = 320 | |
57 | }; |
|
57 | }; | |
58 |
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58 | |||
59 | terminal_t terminal0; |
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59 | terminal_t terminal0; | |
60 |
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60 | |||
61 | volatile int16_t* lcd0_CMD=(volatile int16_t*) 0x60000000; |
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61 | volatile int16_t* lcd0_CMD=(volatile int16_t*) 0x60000000; | |
62 | volatile int16_t* lcd0_DATA=(volatile int16_t*)(0x61FFFFF0); |
|
62 | volatile int16_t* lcd0_DATA=(volatile int16_t*)(0x61FFFFF0); | |
63 |
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63 | |||
64 | float VREF0 =(float)3.3; |
|
64 | float VREF0 =(float)3.3; | |
65 |
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65 | |||
66 | int bsp_init() |
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66 | int bsp_init() | |
67 | { |
|
67 | { | |
68 | int i=0; |
|
68 | int i=0; | |
69 | for(i=0;i<32;i++) |
|
69 | for(i=0;i<32;i++) | |
70 | { |
|
70 | { | |
71 | __opnfiles__[i] = NULL; |
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71 | __opnfiles__[i] = NULL; | |
72 | } |
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72 | } | |
73 | bsp_GPIO_init(); |
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73 | bsp_GPIO_init(); | |
74 | bsp_uart_init(); |
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74 | bsp_uart_init(); | |
75 | bsp_iic_init(); |
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75 | bsp_iic_init(); | |
76 | bsp_FSMC_init(); |
|
76 | bsp_FSMC_init(); | |
77 | bsp_GTerm_init(); |
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77 | bsp_GTerm_init(); | |
78 | printf("\r=====================\n\r"); |
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78 | printf("\r=====================\n\r"); | |
79 | printf( "=====================\n\r"); |
|
79 | printf( "=====================\n\r"); | |
80 | printf(BSP); |
|
80 | printf(BSP); | |
81 | printf(" initialised\n\r"); |
|
81 | printf(" initialised\n\r"); | |
82 | printf( "=====================\n\r"); |
|
82 | printf( "=====================\n\r"); | |
83 | return 1; |
|
83 | return 1; | |
84 | } |
|
84 | } | |
85 |
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85 | |||
86 | void bsp_GPIO_init() |
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86 | void bsp_GPIO_init() | |
87 | { |
|
87 | { | |
88 | gpio_t gpio1 = gpioopen(LED1); |
|
88 | gpio_t gpio1 = gpioopen(LED1); | |
89 | gpio_t gpio2 = gpioopen(LED2); |
|
89 | gpio_t gpio2 = gpioopen(LED2); | |
90 | gpio_t gpio3 = gpioopen(LED3); |
|
90 | gpio_t gpio3 = gpioopen(LED3); | |
91 | gpio_t gpio4 = gpioopen(PSU_DISABLE); |
|
91 | gpio_t gpio4 = gpioopen(PSU_DISABLE); | |
92 | gpio_t gpio5 = gpioopen(PSU_ALERT_5V); |
|
92 | gpio_t gpio5 = gpioopen(PSU_ALERT_5V); | |
93 | gpio_t gpio6 = gpioopen(PSU_ALERT_1_5V); |
|
93 | gpio_t gpio6 = gpioopen(PSU_ALERT_1_5V); | |
94 | gpio_t gpio7 = gpioopen(PSU_ALERT_3_3V); |
|
94 | gpio_t gpio7 = gpioopen(PSU_ALERT_3_3V); | |
95 | gpiosetspeed(&gpio1,gpiohighspeed); |
|
95 | gpiosetspeed(&gpio1,gpiohighspeed); | |
96 | gpiosetspeed(&gpio2,gpiohighspeed); |
|
96 | gpiosetspeed(&gpio2,gpiohighspeed); | |
97 | gpiosetspeed(&gpio3,gpiohighspeed); |
|
97 | gpiosetspeed(&gpio3,gpiohighspeed); | |
98 | gpiosetspeed(&gpio4,gpiohighspeed); |
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98 | gpiosetspeed(&gpio4,gpiohighspeed); | |
99 | gpiosetspeed(&gpio5,gpiohighspeed); |
|
99 | gpiosetspeed(&gpio5,gpiohighspeed); | |
100 | gpiosetspeed(&gpio6,gpiohighspeed); |
|
100 | gpiosetspeed(&gpio6,gpiohighspeed); | |
101 | gpiosetspeed(&gpio7,gpiohighspeed); |
|
101 | gpiosetspeed(&gpio7,gpiohighspeed); | |
102 | gpioclr(PSU_DISABLE); |
|
102 | gpioclr(PSU_DISABLE); | |
103 | gpiosetdir(&gpio1,gpiooutdir); |
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103 | gpiosetdir(&gpio1,gpiooutdir); | |
104 | gpiosetdir(&gpio3,gpiooutdir); |
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104 | gpiosetdir(&gpio3,gpiooutdir); | |
105 | gpiosetdir(&gpio2,gpiooutdir); |
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105 | gpiosetdir(&gpio2,gpiooutdir); | |
106 | gpiosetdir(&gpio4,gpiooutdir); |
|
106 | gpiosetdir(&gpio4,gpiooutdir); | |
107 | gpiosetdir(&gpio5,gpioindir); |
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107 | gpiosetdir(&gpio5,gpioindir); | |
108 | gpiosetdir(&gpio6,gpioindir); |
|
108 | gpiosetdir(&gpio6,gpioindir); | |
109 | gpiosetdir(&gpio7,gpioindir); |
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109 | gpiosetdir(&gpio7,gpioindir); | |
110 | gpioclr(PSU_DISABLE); |
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110 | gpioclr(PSU_DISABLE); | |
111 | } |
|
111 | } | |
112 |
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112 | |||
113 | void bsp_uart_init() |
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113 | void bsp_uart_init() | |
114 | { |
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114 | { | |
115 | //if(__opnfiles__[1]==NULL) |
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115 | //if(__opnfiles__[1]==NULL) | |
116 | //{ |
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116 | //{ | |
117 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
|
117 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); | |
118 | // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
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118 | // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); | |
119 | // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
|
119 | // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); | |
120 | //uartmkstreamdev(uart,fd1); |
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120 | //uartmkstreamdev(uart,fd1); | |
121 | //__opnfiles__[1] = fd1; |
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121 | //__opnfiles__[1] = fd1; | |
122 | //} |
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122 | //} | |
123 | //else |
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123 | //else | |
124 | //{ |
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124 | //{ | |
125 | uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
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125 | uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); | |
126 | //} |
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126 | //} | |
127 | } |
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127 | } | |
128 |
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128 | |||
129 |
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129 | |||
130 |
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130 | |||
131 | int bsp_FSMC_init() |
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131 | int bsp_FSMC_init() | |
132 | { |
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132 | { | |
133 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
|
133 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) | |
134 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
|
134 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) | |
135 |
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135 | |||
136 | gpio_t gpio1 = gpioopen(LCD_RESET); |
|
136 | gpio_t gpio1 = gpioopen(LCD_RESET); | |
137 | gpiosetspeed(&gpio1,gpiohighspeed); |
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137 | gpiosetspeed(&gpio1,gpiohighspeed); | |
138 | gpiosetdir(&gpio1,gpiooutdir); |
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138 | gpiosetdir(&gpio1,gpiooutdir); | |
139 | gpioclr(LCD_RESET); |
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139 | gpioclr(LCD_RESET); | |
140 |
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140 | |||
141 | gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15\ |
|
141 | gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15\ | |
142 | ,PD8,PD9,PD10,PD4,PD5,PD7,PE4}; |
|
142 | ,PD8,PD9,PD10,PD4,PD5,PD7,PE4}; | |
143 | for(int i=0;i<20;i++) |
|
143 | for(int i=0;i<20;i++) | |
144 | { |
|
144 | { | |
145 | gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); |
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145 | gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); | |
146 | LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
146 | LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; | |
147 | gpiosetconfig(&LCD_DBx); |
|
147 | gpiosetconfig(&LCD_DBx); | |
148 | GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); |
|
148 | GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); | |
149 | } |
|
149 | } | |
150 |
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150 | |||
151 | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
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151 | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; | |
152 | FSMC_NORSRAMTimingInitTypeDef p; |
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152 | FSMC_NORSRAMTimingInitTypeDef p; | |
153 |
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153 | |||
154 | /* Enable FSMC clock */ |
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154 | /* Enable FSMC clock */ | |
155 | RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); |
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155 | RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); | |
156 |
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156 | |||
157 | /*-- FSMC Configuration ------------------------------------------------------*/ |
|
157 | /*-- FSMC Configuration ------------------------------------------------------*/ | |
158 | /*----------------------- SRAM Bank 3 ----------------------------------------*/ |
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158 | /*----------------------- SRAM Bank 3 ----------------------------------------*/ | |
159 | /* FSMC_Bank1_NORSRAM4 configuration */ |
|
159 | /* FSMC_Bank1_NORSRAM4 configuration */ | |
160 | //p.FSMC_AddressSetupTime = 5; |
|
160 | //p.FSMC_AddressSetupTime = 5; | |
161 | p.FSMC_AddressSetupTime = 1; |
|
161 | p.FSMC_AddressSetupTime = 1; | |
162 | p.FSMC_AddressHoldTime = 0; |
|
162 | p.FSMC_AddressHoldTime = 0; | |
163 | //p.FSMC_DataSetupTime = 9; |
|
163 | //p.FSMC_DataSetupTime = 9; | |
164 | p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; |
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164 | p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; | |
165 | p.FSMC_BusTurnAroundDuration = 0; |
|
165 | p.FSMC_BusTurnAroundDuration = 0; | |
166 | p.FSMC_CLKDivision = 0; |
|
166 | p.FSMC_CLKDivision = 0; | |
167 | p.FSMC_DataLatency = 0; |
|
167 | p.FSMC_DataLatency = 0; | |
168 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
|
168 | p.FSMC_AccessMode = FSMC_AccessMode_A; | |
169 | /* Color LCD configuration ------------------------------------ |
|
169 | /* Color LCD configuration ------------------------------------ | |
170 | LCD configured as follow: |
|
170 | LCD configured as follow: | |
171 | - Data/Address MUX = Disable |
|
171 | - Data/Address MUX = Disable | |
172 | - Memory Type = SRAM |
|
172 | - Memory Type = SRAM | |
173 | - Data Width = 16bit |
|
173 | - Data Width = 16bit | |
174 | - Write Operation = Enable |
|
174 | - Write Operation = Enable | |
175 | - Extended Mode = Enable |
|
175 | - Extended Mode = Enable | |
176 | - Asynchronous Wait = Disable */ |
|
176 | - Asynchronous Wait = Disable */ | |
177 |
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177 | |||
178 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; |
|
178 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; | |
179 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
|
179 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; | |
180 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
|
180 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; | |
181 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
|
181 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; | |
182 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
|
182 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; | |
183 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
|
183 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; | |
184 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
|
184 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; | |
185 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
|
185 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; | |
186 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
|
186 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; | |
187 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
|
187 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; | |
188 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
|
188 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; | |
189 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
|
189 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; | |
190 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
|
190 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; | |
191 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
|
191 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; | |
192 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
|
192 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; | |
193 |
|
193 | |||
194 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
|
194 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); | |
195 |
|
195 | |||
196 | /* Enable FSMC NOR/SRAM Bank1 */ |
|
196 | /* Enable FSMC NOR/SRAM Bank1 */ | |
197 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); |
|
197 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); | |
198 | gpioset(LCD_RESET); |
|
198 | gpioset(LCD_RESET); | |
199 | lcd0.init(&lcd0); |
|
199 | lcd0.init(&lcd0); | |
200 | return 1; |
|
200 | return 1; | |
201 | } |
|
201 | } | |
202 |
|
202 | |||
203 | void bsp_spi_init() |
|
203 | void bsp_spi_init() | |
204 | { |
|
204 | { | |
205 |
|
205 | |||
206 | } |
|
206 | } | |
207 |
|
207 | |||
208 |
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208 | |||
209 | void bsp_iic_init() |
|
209 | void bsp_iic_init() | |
210 | { |
|
210 | { | |
211 |
i2copenandconfig(i2c2,0, |
|
211 | i2copenandconfig(i2c2,0,10000,PF0,PF1); | |
212 | } |
|
212 | } | |
213 |
|
213 | |||
214 | void bsp_SD_init() |
|
214 | void bsp_SD_init() | |
215 | { |
|
215 | { | |
216 |
|
216 | |||
217 | } |
|
217 | } | |
218 |
|
218 | |||
219 | void vs10XXclearXCS(){} |
|
219 | void vs10XXclearXCS(){} | |
220 | void vs10XXsetXCS(){} |
|
220 | void vs10XXsetXCS(){} | |
221 | int vs10XXDREQ() |
|
221 | int vs10XXDREQ() | |
222 | { |
|
222 | { | |
223 | return 1; |
|
223 | return 1; | |
224 | } |
|
224 | } | |
225 |
|
225 | |||
226 |
|
226 | |||
227 | void bsppowersdcard(char onoff) //always ON |
|
227 | void bsppowersdcard(char onoff) //always ON | |
228 | { |
|
228 | { | |
229 |
|
229 | |||
230 | } |
|
230 | } | |
231 |
|
231 | |||
232 | char bspsdcardpresent() |
|
232 | char bspsdcardpresent() | |
233 | { |
|
233 | { | |
234 | return 0; |
|
234 | return 0; | |
235 | } |
|
235 | } | |
236 |
|
236 | |||
237 | char bspsdcardwriteprotected() |
|
237 | char bspsdcardwriteprotected() | |
238 | { |
|
238 | { | |
239 | return 0; |
|
239 | return 0; | |
240 | } |
|
240 | } | |
241 |
|
241 | |||
242 | void bspsdcardselect(char YESNO) |
|
242 | void bspsdcardselect(char YESNO) | |
243 | { |
|
243 | { | |
244 |
|
244 | |||
245 | } |
|
245 | } | |
246 |
|
246 | |||
247 |
|
247 | |||
248 | void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) |
|
248 | void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) | |
249 | { |
|
249 | { | |
250 | *lcd0_CMD=(uint16_t)reg; |
|
250 | *lcd0_CMD=(uint16_t)reg; | |
251 | *lcd0_DATA=(uint16_t)data; |
|
251 | *lcd0_DATA=(uint16_t)data; | |
252 | } |
|
252 | } | |
253 |
|
253 | |||
254 | uint32_t bsp_lcd0_read_reg(uint32_t reg) |
|
254 | uint32_t bsp_lcd0_read_reg(uint32_t reg) | |
255 | { |
|
255 | { | |
256 | *lcd0_CMD=(uint16_t)reg; |
|
256 | *lcd0_CMD=(uint16_t)reg; | |
257 | return (uint16_t)*lcd0_DATA; |
|
257 | return (uint16_t)*lcd0_DATA; | |
258 | } |
|
258 | } | |
259 |
|
259 | |||
260 | void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) |
|
260 | void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) | |
261 | { |
|
261 | { | |
262 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
|
262 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; | |
263 | uint16_t* castedBuff=(uint16_t*)buffer; |
|
263 | uint16_t* castedBuff=(uint16_t*)buffer; | |
264 | for(int i=0;i<(int)count;i++) |
|
264 | for(int i=0;i<(int)count;i++) | |
265 | { |
|
265 | { | |
266 | *lcd0_DATA=castedBuff[i]; |
|
266 | *lcd0_DATA=castedBuff[i]; | |
267 | } |
|
267 | } | |
268 | } |
|
268 | } | |
269 |
|
269 | |||
270 | void bsp_lcd0_readGRAM(void* buffer,uint32_t count) |
|
270 | void bsp_lcd0_readGRAM(void* buffer,uint32_t count) | |
271 | { |
|
271 | { | |
272 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
|
272 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; | |
273 | uint16_t* castedBuff=(uint16_t*)buffer; |
|
273 | uint16_t* castedBuff=(uint16_t*)buffer; | |
274 | castedBuff[0]=*lcd0_DATA; |
|
274 | castedBuff[0]=*lcd0_DATA; | |
275 | for(int i=0;i<(int)count;i++) |
|
275 | for(int i=0;i<(int)count;i++) | |
276 | { |
|
276 | { | |
277 | castedBuff[i]=*lcd0_DATA; |
|
277 | castedBuff[i]=*lcd0_DATA; | |
278 | } |
|
278 | } | |
279 | } |
|
279 | } | |
280 |
|
280 | |||
281 |
|
281 | |||
282 | void bsp_GTerm_init() |
|
282 | void bsp_GTerm_init() | |
283 | { |
|
283 | { | |
284 | if(__opnfiles__[1]==NULL) |
|
284 | if(__opnfiles__[1]==NULL) | |
285 | { |
|
285 | { | |
286 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
|
286 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); | |
287 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
|
287 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); | |
288 | terminal_init(&terminal0 ,&lcd0,&ComicSansMS_8,fd1); |
|
288 | terminal_init(&terminal0 ,&lcd0,&ComicSansMS_8,fd1); | |
289 | __opnfiles__[1] = fd1; |
|
289 | __opnfiles__[1] = fd1; | |
290 | } |
|
290 | } | |
291 | else |
|
291 | else | |
292 | { |
|
292 | { | |
293 |
|
293 | |||
294 | } |
|
294 | } | |
295 | } |
|
295 | } | |
296 |
|
296 | |||
297 |
|
297 | |||
298 |
|
298 | |||
299 |
|
299 | |||
300 |
|
300 | |||
301 |
|
301 | |||
302 |
|
302 | |||
303 |
|
303 | |||
304 |
|
304 | |||
305 |
|
305 | |||
306 |
|
306 | |||
307 |
|
307 | |||
308 |
|
308 | |||
|
309 | ||||
|
310 | ||||
|
311 | ||||
|
312 |
@@ -1,6 +1,9 | |||||
1 | CPU=stm32f4xxxG |
|
1 | CPU=stm32f4xxxG | |
2 | DEFINES+=BSP=\\\"BEAGLESYNTH\\\" |
|
2 | DEFINES+=BSP=\\\"BEAGLESYNTH\\\" | |
3 | beagleCp.target = beagleCp |
|
3 | beagleCp.target = beagleCp | |
4 |
beagleCp.commands = scp |
|
4 | beagleCp.commands = cd bin && scp $(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin | |
5 | QMAKE_EXTRA_TARGETS += beagleCp |
|
5 | beagleCp131.target = beagleCp131 | |
|
6 | beagleCp131.commands = cd bin && scp $(QMAKE_TARGET).bin root@129.104.27.131://opt/stm32flashAje/hello.bin | |||
|
7 | QMAKE_EXTRA_TARGETS += beagleCp beagleCp131 | |||
|
8 | ||||
6 | UCMODEL=stm32f4 |
|
9 | UCMODEL=stm32f4 |
@@ -1,345 +1,345 | |||||
1 | /*------------------------------------------------------------------------------ |
|
1 | /*------------------------------------------------------------------------------ | |
2 | -- This file is a part of the libuc, microcontroler library |
|
2 | -- This file is a part of the libuc, microcontroler library | |
3 | -- Copyright (C) 2011, Alexis Jeandet |
|
3 | -- Copyright (C) 2011, Alexis Jeandet | |
4 | -- |
|
4 | -- | |
5 | -- This program is free software; you can redistribute it and/or modify |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
6 | -- it under the terms of the GNU General Public License as published by |
|
6 | -- it under the terms of the GNU General Public License as published by | |
7 | -- the Free Software Foundation; either version 3 of the License, or |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
8 | -- (at your option) any later version. |
|
8 | -- (at your option) any later version. | |
9 | -- |
|
9 | -- | |
10 | -- This program is distributed in the hope that it will be useful, |
|
10 | -- This program is distributed in the hope that it will be useful, | |
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | -- GNU General Public License for more details. |
|
13 | -- GNU General Public License for more details. | |
14 | -- |
|
14 | -- | |
15 | -- You should have received a copy of the GNU General Public License |
|
15 | -- You should have received a copy of the GNU General Public License | |
16 | -- along with this program; if not, write to the Free Software |
|
16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
|
18 | ------------------------------------------------------------------------------- | |
19 | -- Author : Alexis Jeandet |
|
19 | -- Author : Alexis Jeandet | |
20 | -- Mail : alexis.jeandet@gmail.com |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
21 | -------------------------------------------------------------------------------*/ |
|
21 | -------------------------------------------------------------------------------*/ | |
22 | #include "bsp.h" |
|
22 | #include "bsp.h" | |
23 | #include <streamdevices.h> |
|
23 | #include <streamdevices.h> | |
24 | #include <malloc.h> |
|
24 | #include <malloc.h> | |
25 | #include <gpio.h> |
|
25 | #include <gpio.h> | |
26 | #include <uart.h> |
|
26 | #include <uart.h> | |
27 | #include <stdio.h> |
|
27 | #include <stdio.h> | |
28 | #include <stm32f4xx_gpio.h> |
|
28 | #include <stm32f4xx_gpio.h> | |
29 | #include <stm32f4xx_fsmc.h> |
|
29 | #include <stm32f4xx_fsmc.h> | |
30 | #include <i2c.h> |
|
30 | #include <i2c.h> | |
31 | #include <core.h> |
|
31 | #include <core.h> | |
32 | #include <terminal.h> |
|
32 | #include <terminal.h> | |
33 | uint32_t OSC0 =8000000; |
|
33 | uint32_t OSC0 =8000000; | |
34 | uint32_t INTOSC =16000000; |
|
34 | uint32_t INTOSC =16000000; | |
35 | uint32_t RTCOSC =32768; |
|
35 | uint32_t RTCOSC =32768; | |
36 | uint32_t currentCpuFreq=0; |
|
36 | uint32_t currentCpuFreq=0; | |
37 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; |
|
37 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; | |
38 |
|
38 | |||
39 | LCD_IF_t lcdIF0={ |
|
39 | LCD_IF_t lcdIF0={ | |
40 | .init = &bsp_FSMC_init, |
|
40 | .init = &bsp_FSMC_init, | |
41 | .writereg = &bsp_lcd0_write_reg, |
|
41 | .writereg = &bsp_lcd0_write_reg, | |
42 | .readreg = &bsp_lcd0_read_reg, |
|
42 | .readreg = &bsp_lcd0_read_reg, | |
43 | .writeGRAM = &bsp_lcd0_writeGRAM, |
|
43 | .writeGRAM = &bsp_lcd0_writeGRAM, | |
44 | .readGRAM = &bsp_lcd0_readGRAM |
|
44 | .readGRAM = &bsp_lcd0_readGRAM | |
45 | }; |
|
45 | }; | |
46 |
|
46 | |||
47 | LCD_t lcd0={ |
|
47 | LCD_t lcd0={ | |
48 | .interface = &lcdIF0, |
|
48 | .interface = &lcdIF0, | |
49 | .init = &ili9328init, |
|
49 | .init = &ili9328init, | |
50 | .paint = &ili9328paint, |
|
50 | .paint = &ili9328paint, | |
51 | .paintText = &ili9328paintText, |
|
51 | .paintText = &ili9328paintText, | |
52 | .paintFilRect = &ili9328paintFilRect, |
|
52 | .paintFilRect = &ili9328paintFilRect, | |
53 | .refreshenable = &ili9328refreshenable, |
|
53 | .refreshenable = &ili9328refreshenable, | |
54 | .width= 240, |
|
54 | .width= 240, | |
55 | .height = 320 |
|
55 | .height = 320 | |
56 | }; |
|
56 | }; | |
57 |
|
57 | |||
58 | terminal_t terminal0; |
|
58 | terminal_t terminal0; | |
59 |
|
59 | |||
60 |
|
60 | |||
61 | volatile int16_t* lcd0_CMD=(volatile int16_t*) (0x60000000 | 0x08000000); |
|
61 | volatile int16_t* lcd0_CMD=(volatile int16_t*) (0x60000000 | 0x08000000); | |
62 | volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 | 0x08000002)); |
|
62 | volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 | 0x08000002)); | |
63 |
|
63 | |||
64 | float VREF0 =(float)3.3; |
|
64 | float VREF0 =(float)3.3; | |
65 |
|
65 | |||
66 | int bsp_init() |
|
66 | int bsp_init() | |
67 | { |
|
67 | { | |
68 | int i=0; |
|
68 | int i=0; | |
69 | for(i=0;i<32;i++) |
|
69 | for(i=0;i<32;i++) | |
70 | { |
|
70 | { | |
71 | __opnfiles__[i] = NULL; |
|
71 | __opnfiles__[i] = NULL; | |
72 | } |
|
72 | } | |
73 | bsp_GPIO_init(); |
|
73 | bsp_GPIO_init(); | |
74 | bsp_uart_init(); |
|
74 | bsp_uart_init(); | |
75 | bsp_iic_init(); |
|
75 | bsp_iic_init(); | |
76 | bsp_FSMC_init(); |
|
76 | bsp_FSMC_init(); | |
77 | bsp_GTerm_init(); |
|
77 | bsp_GTerm_init(); | |
78 | printf("\r=====================\n\r"); |
|
78 | printf("\r=====================\n\r"); | |
79 | printf( "=====================\n\r"); |
|
79 | printf( "=====================\n\r"); | |
80 | printf(BSP); |
|
80 | printf(BSP); | |
81 | printf(" initialised\n\r"); |
|
81 | printf(" initialised\n\r"); | |
82 | printf( "=====================\n\r"); |
|
82 | printf( "=====================\n\r"); | |
83 | return 1; |
|
83 | return 1; | |
84 | } |
|
84 | } | |
85 |
|
85 | |||
86 | void bsp_GPIO_init() |
|
86 | void bsp_GPIO_init() | |
87 | { |
|
87 | { | |
88 | gpio_t gpio1 = gpioopen(LED1); |
|
88 | gpio_t gpio1 = gpioopen(LED1); | |
89 | gpio_t gpio2 = gpioopen(LED2); |
|
89 | gpio_t gpio2 = gpioopen(LED2); | |
90 | gpio_t gpio3 = gpioopen(LED3); |
|
90 | gpio_t gpio3 = gpioopen(LED3); | |
91 | gpiosetspeed(&gpio1,gpiohighspeed); |
|
91 | gpiosetspeed(&gpio1,gpiohighspeed); | |
92 | gpiosetspeed(&gpio2,gpiohighspeed); |
|
92 | gpiosetspeed(&gpio2,gpiohighspeed); | |
93 | gpiosetspeed(&gpio3,gpiohighspeed); |
|
93 | gpiosetspeed(&gpio3,gpiohighspeed); | |
94 | gpiosetdir(&gpio1,gpiooutdir); |
|
94 | gpiosetdir(&gpio1,gpiooutdir); | |
95 | gpiosetdir(&gpio2,gpiooutdir); |
|
95 | gpiosetdir(&gpio2,gpiooutdir); | |
96 | gpiosetdir(&gpio3,gpiooutdir); |
|
96 | gpiosetdir(&gpio3,gpiooutdir); | |
97 | } |
|
97 | } | |
98 |
|
98 | |||
99 | void bsp_uart_init() |
|
99 | void bsp_uart_init() | |
100 | { |
|
100 | { | |
101 | //if(__opnfiles__[1]==NULL) |
|
101 | //if(__opnfiles__[1]==NULL) | |
102 | //{ |
|
102 | //{ | |
103 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
|
103 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); | |
104 | // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
|
104 | // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); | |
105 | // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
|
105 | // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); | |
106 | //uartmkstreamdev(uart,fd1); |
|
106 | //uartmkstreamdev(uart,fd1); | |
107 | //__opnfiles__[1] = fd1; |
|
107 | //__opnfiles__[1] = fd1; | |
108 | //} |
|
108 | //} | |
109 | //else |
|
109 | //else | |
110 | //{ |
|
110 | //{ | |
111 | uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
|
111 | uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); | |
112 | //} |
|
112 | //} | |
113 | } |
|
113 | } | |
114 |
|
114 | |||
115 | /* |
|
115 | /* | |
116 | D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7 |
|
116 | D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7 | |
117 | D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12 |
|
117 | D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12 | |
118 | D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9 |
|
118 | D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9 | |
119 | D15 PD10 |
|
119 | D15 PD10 | |
120 | A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S |
|
120 | A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S | |
121 | FSMC_NOE PD4 RD |
|
121 | FSMC_NOE PD4 RD | |
122 | */ |
|
122 | */ | |
123 | /*-- GPIOs Configuration -----------------------------------------------------*/ |
|
123 | /*-- GPIOs Configuration -----------------------------------------------------*/ | |
124 | /* |
|
124 | /* | |
125 | +-------------------+--------------------+------------------+------------------+ |
|
125 | +-------------------+--------------------+------------------+------------------+ | |
126 | + SRAM pins assignment + |
|
126 | + SRAM pins assignment + | |
127 | +-------------------+--------------------+------------------+------------------+ |
|
127 | +-------------------+--------------------+------------------+------------------+ | |
128 | | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | |
|
128 | | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | | |
129 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | |
|
129 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | | |
130 | | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | |
|
130 | | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | | |
131 | | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | |
|
131 | | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | | |
132 | | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | |
|
132 | | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | | |
133 | | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | |
|
133 | | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | | |
134 | | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | |
|
134 | | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | | |
135 | | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |------------------+ |
|
135 | | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |------------------+ | |
136 | | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 | |
|
136 | | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 | | |
137 | | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 | |
|
137 | | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 | | |
138 | | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+ |
|
138 | | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+ | |
139 | | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 | |
|
139 | | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 | | |
140 | | | PE15 <-> FSMC_D12 | |
|
140 | | | PE15 <-> FSMC_D12 | | |
141 | +-------------------+--------------------+ |
|
141 | +-------------------+--------------------+ | |
142 | */ |
|
142 | */ | |
143 | int bsp_FSMC_init() |
|
143 | int bsp_FSMC_init() | |
144 | { |
|
144 | { | |
145 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
|
145 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) | |
146 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
|
146 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) | |
147 |
|
147 | |||
148 | gpio_t LCD_DBxList[]={ |
|
148 | gpio_t LCD_DBxList[]={ | |
149 | PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15, |
|
149 | PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15, | |
150 | PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14, |
|
150 | PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14, | |
151 | PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 , |
|
151 | PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 , | |
152 | PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10 |
|
152 | PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10 | |
153 | }; |
|
153 | }; | |
154 |
|
154 | |||
155 | for(int i=0;i<43;i++) |
|
155 | for(int i=0;i<43;i++) | |
156 | { |
|
156 | { | |
157 | gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); |
|
157 | gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); | |
158 | LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
158 | LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; | |
159 | gpiosetconfig(&LCD_DBx); |
|
159 | gpiosetconfig(&LCD_DBx); | |
160 | GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); |
|
160 | GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); | |
161 | } |
|
161 | } | |
162 |
|
162 | |||
163 | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
|
163 | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; | |
164 | FSMC_NORSRAMTimingInitTypeDef p; |
|
164 | FSMC_NORSRAMTimingInitTypeDef p; | |
165 |
|
165 | |||
166 | /* Enable FSMC clock */ |
|
166 | /* Enable FSMC clock */ | |
167 | RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); |
|
167 | RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); | |
168 |
|
168 | |||
169 | /*-- FSMC Configuration ------------------------------------------------------*/ |
|
169 | /*-- FSMC Configuration ------------------------------------------------------*/ | |
170 | /*----------------------- SRAM Bank 3 ----------------------------------------*/ |
|
170 | /*----------------------- SRAM Bank 3 ----------------------------------------*/ | |
171 | /* FSMC_Bank1_NORSRAM3 configuration */ |
|
171 | /* FSMC_Bank1_NORSRAM3 configuration */ | |
172 | p.FSMC_AddressSetupTime = 1; |
|
172 | p.FSMC_AddressSetupTime = 1; | |
173 | p.FSMC_AddressHoldTime = 0; |
|
173 | p.FSMC_AddressHoldTime = 0; | |
174 | p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; |
|
174 | p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; | |
175 | p.FSMC_BusTurnAroundDuration = 0; |
|
175 | p.FSMC_BusTurnAroundDuration = 0; | |
176 | p.FSMC_CLKDivision = 0; |
|
176 | p.FSMC_CLKDivision = 0; | |
177 | p.FSMC_DataLatency = 0; |
|
177 | p.FSMC_DataLatency = 0; | |
178 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
|
178 | p.FSMC_AccessMode = FSMC_AccessMode_A; | |
179 | /* Color LCD configuration ------------------------------------ |
|
179 | /* Color LCD configuration ------------------------------------ | |
180 | LCD configured as follow: |
|
180 | LCD configured as follow: | |
181 | - Data/Address MUX = Disable |
|
181 | - Data/Address MUX = Disable | |
182 | - Memory Type = SRAM |
|
182 | - Memory Type = SRAM | |
183 | - Data Width = 16bit |
|
183 | - Data Width = 16bit | |
184 | - Write Operation = Enable |
|
184 | - Write Operation = Enable | |
185 | - Extended Mode = Enable |
|
185 | - Extended Mode = Enable | |
186 | - Asynchronous Wait = Disable */ |
|
186 | - Asynchronous Wait = Disable */ | |
187 |
|
187 | |||
188 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; |
|
188 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; | |
189 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
|
189 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; | |
190 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
|
190 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; | |
191 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
|
191 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; | |
192 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
|
192 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; | |
193 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
|
193 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; | |
194 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
|
194 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; | |
195 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
|
195 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; | |
196 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
|
196 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; | |
197 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
|
197 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; | |
198 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
|
198 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; | |
199 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
|
199 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; | |
200 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
|
200 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; | |
201 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
|
201 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; | |
202 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
|
202 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; | |
203 |
|
203 | |||
204 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
|
204 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); | |
205 |
|
205 | |||
206 | /* Enable FSMC NOR/SRAM Bank1 */ |
|
206 | /* Enable FSMC NOR/SRAM Bank1 */ | |
207 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); |
|
207 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); | |
208 |
|
208 | |||
209 |
|
209 | |||
210 | p.FSMC_AddressSetupTime = getCpuFreq()/50000000; |
|
210 | p.FSMC_AddressSetupTime = getCpuFreq()/50000000; | |
211 | p.FSMC_AddressHoldTime = 0; |
|
211 | p.FSMC_AddressHoldTime = 0; | |
212 | p.FSMC_DataSetupTime = getCpuFreq()/25000000; |
|
212 | p.FSMC_DataSetupTime = getCpuFreq()/25000000; | |
213 | p.FSMC_BusTurnAroundDuration = 1; |
|
213 | p.FSMC_BusTurnAroundDuration = 1; | |
214 | p.FSMC_CLKDivision = 0; |
|
214 | p.FSMC_CLKDivision = 0; | |
215 | p.FSMC_DataLatency = 0; |
|
215 | p.FSMC_DataLatency = 0; | |
216 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
|
216 | p.FSMC_AccessMode = FSMC_AccessMode_A; | |
217 |
|
217 | |||
218 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; |
|
218 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; | |
219 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
|
219 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; | |
220 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; |
|
220 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; | |
221 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
|
221 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; | |
222 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
|
222 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; | |
223 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
|
223 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; | |
224 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
|
224 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; | |
225 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
|
225 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; | |
226 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
|
226 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; | |
227 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
|
227 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; | |
228 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
|
228 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; | |
229 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
|
229 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; | |
230 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
|
230 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; | |
231 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
|
231 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; | |
232 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
|
232 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; | |
233 |
|
233 | |||
234 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
|
234 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); | |
235 |
|
235 | |||
236 | /*!< Enable FSMC Bank1_SRAM2 Bank */ |
|
236 | /*!< Enable FSMC Bank1_SRAM2 Bank */ | |
237 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); |
|
237 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); | |
238 | lcd0.init(&lcd0); |
|
238 | lcd0.init(&lcd0); | |
239 | return 1; |
|
239 | return 1; | |
240 | } |
|
240 | } | |
241 |
|
241 | |||
242 | void bsp_spi_init() |
|
242 | void bsp_spi_init() | |
243 | { |
|
243 | { | |
244 |
|
244 | |||
245 | } |
|
245 | } | |
246 |
|
246 | |||
247 |
|
247 | |||
248 | void bsp_iic_init() |
|
248 | void bsp_iic_init() | |
249 | { |
|
249 | { | |
250 |
|
|
250 | i2copenandconfig(i2c1,0,100000,PB9,PB6); | |
251 | } |
|
251 | } | |
252 |
|
252 | |||
253 | void bsp_SD_init() |
|
253 | void bsp_SD_init() | |
254 | { |
|
254 | { | |
255 | gpio_t SDIO_DBxList[]={PC8 ,PC9 ,PC10 ,PC11 ,PC12,PD2}; |
|
255 | gpio_t SDIO_DBxList[]={PC8 ,PC9 ,PC10 ,PC11 ,PC12,PD2}; | |
256 | for(int i=0;i<6;i++) |
|
256 | for(int i=0;i<6;i++) | |
257 | { |
|
257 | { | |
258 | gpio_t SDIO_DBx = gpioopen(SDIO_DBxList[i]); |
|
258 | gpio_t SDIO_DBx = gpioopen(SDIO_DBxList[i]); | |
259 | SDIO_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
259 | SDIO_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; | |
260 | gpiosetconfig(&SDIO_DBx); |
|
260 | gpiosetconfig(&SDIO_DBx); | |
261 | GPIO_PinAFConfig(GPIOGETPORT(SDIO_DBx), (uint8_t)(SDIO_DBx & 0xF), GPIO_AF_SDIO); |
|
261 | GPIO_PinAFConfig(GPIOGETPORT(SDIO_DBx), (uint8_t)(SDIO_DBx & 0xF), GPIO_AF_SDIO); | |
262 | } |
|
262 | } | |
263 | } |
|
263 | } | |
264 |
|
264 | |||
265 | void vs10XXclearXCS(){} |
|
265 | void vs10XXclearXCS(){} | |
266 | void vs10XXsetXCS(){} |
|
266 | void vs10XXsetXCS(){} | |
267 | int vs10XXDREQ() |
|
267 | int vs10XXDREQ() | |
268 | { |
|
268 | { | |
269 | return 1; |
|
269 | return 1; | |
270 | } |
|
270 | } | |
271 |
|
271 | |||
272 |
|
272 | |||
273 | void bsppowersdcard(char onoff) //always ON |
|
273 | void bsppowersdcard(char onoff) //always ON | |
274 | { |
|
274 | { | |
275 |
|
275 | |||
276 | } |
|
276 | } | |
277 |
|
277 | |||
278 | char bspsdcardpresent() |
|
278 | char bspsdcardpresent() | |
279 | { |
|
279 | { | |
280 | return 0; |
|
280 | return 0; | |
281 | } |
|
281 | } | |
282 |
|
282 | |||
283 | char bspsdcardwriteprotected() |
|
283 | char bspsdcardwriteprotected() | |
284 | { |
|
284 | { | |
285 | return 0; |
|
285 | return 0; | |
286 | } |
|
286 | } | |
287 |
|
287 | |||
288 | void bspsdcardselect(char YESNO) |
|
288 | void bspsdcardselect(char YESNO) | |
289 | { |
|
289 | { | |
290 |
|
290 | |||
291 | } |
|
291 | } | |
292 |
|
292 | |||
293 |
|
293 | |||
294 | void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) |
|
294 | void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) | |
295 | { |
|
295 | { | |
296 | *lcd0_CMD=(uint16_t)reg; |
|
296 | *lcd0_CMD=(uint16_t)reg; | |
297 | *lcd0_DATA=(uint16_t)data; |
|
297 | *lcd0_DATA=(uint16_t)data; | |
298 | } |
|
298 | } | |
299 |
|
299 | |||
300 | uint32_t bsp_lcd0_read_reg(uint32_t reg) |
|
300 | uint32_t bsp_lcd0_read_reg(uint32_t reg) | |
301 | { |
|
301 | { | |
302 | *lcd0_CMD=(uint16_t)reg; |
|
302 | *lcd0_CMD=(uint16_t)reg; | |
303 | return (uint16_t)*lcd0_DATA; |
|
303 | return (uint16_t)*lcd0_DATA; | |
304 | } |
|
304 | } | |
305 |
|
305 | |||
306 | void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) |
|
306 | void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) | |
307 | { |
|
307 | { | |
308 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
|
308 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; | |
309 | uint16_t* castedBuff=(uint16_t*)buffer; |
|
309 | uint16_t* castedBuff=(uint16_t*)buffer; | |
310 | for(int i=0;i<(int)count;i++) |
|
310 | for(int i=0;i<(int)count;i++) | |
311 | { |
|
311 | { | |
312 | *lcd0_DATA=castedBuff[i]; |
|
312 | *lcd0_DATA=castedBuff[i]; | |
313 | } |
|
313 | } | |
314 | } |
|
314 | } | |
315 |
|
315 | |||
316 | void bsp_lcd0_readGRAM(void* buffer,uint32_t count) |
|
316 | void bsp_lcd0_readGRAM(void* buffer,uint32_t count) | |
317 | { |
|
317 | { | |
318 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
|
318 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; | |
319 | uint16_t* castedBuff=(uint16_t*)buffer; |
|
319 | uint16_t* castedBuff=(uint16_t*)buffer; | |
320 | castedBuff[0]=*lcd0_DATA; |
|
320 | castedBuff[0]=*lcd0_DATA; | |
321 | for(int i=0;i<(int)count;i++) |
|
321 | for(int i=0;i<(int)count;i++) | |
322 | { |
|
322 | { | |
323 | castedBuff[i]=*lcd0_DATA; |
|
323 | castedBuff[i]=*lcd0_DATA; | |
324 | } |
|
324 | } | |
325 | } |
|
325 | } | |
326 |
|
326 | |||
327 | void bsp_GTerm_init() |
|
327 | void bsp_GTerm_init() | |
328 | { |
|
328 | { | |
329 | if(__opnfiles__[1]==NULL) |
|
329 | if(__opnfiles__[1]==NULL) | |
330 | { |
|
330 | { | |
331 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
|
331 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); | |
332 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
|
332 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); | |
333 |
|
333 | |||
334 | ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0); |
|
334 | ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0); | |
335 | terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1); |
|
335 | terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1); | |
336 | __opnfiles__[1] = fd1; |
|
336 | __opnfiles__[1] = fd1; | |
337 | } |
|
337 | } | |
338 | else |
|
338 | else | |
339 | { |
|
339 | { | |
340 |
|
340 | |||
341 | } |
|
341 | } | |
342 | } |
|
342 | } | |
343 |
|
343 | |||
344 |
|
344 | |||
345 |
|
345 |
@@ -1,14 +1,23 | |||||
1 | TEMPLATE = app |
|
1 | TEMPLATE = app | |
2 | CONFIG += cpu |
|
2 | CONFIG += cpu | |
3 |
|
3 | |||
4 |
|
4 | |||
5 | UCMODEL=stm32f4 |
|
5 | UCMODEL=stm32f4 | |
6 |
DEFINES += CPUFREQ= |
|
6 | DEFINES += CPUFREQ=40000000 | |
7 |
|
7 | |||
8 |
|
|
8 | BSP = BEAGLESYNTH | |
9 | #BSP = SOLAR_LFR_PSU |
|
9 | #BSP = SOLAR_LFR_PSU | |
10 | BSP = STM32F4Eval |
|
10 | #BSP = STM32F4Eval | |
11 |
|
11 | |||
12 | SOURCES += \ |
|
12 | SOURCES += \ | |
13 | main.c |
|
13 | main.c | |
14 |
|
14 | |||
|
15 | ||||
|
16 | ||||
|
17 | ||||
|
18 | ||||
|
19 | #beagleCp.target = beagleCp | |||
|
20 | #beagleCp.commands = cd bin && scp $(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin | |||
|
21 | #beagleCp131.target = beagleCp131 | |||
|
22 | #beagleCp131.commands = cd bin && scp $(QMAKE_TARGET).bin root@129.104.27.131://opt/stm32flashAje/hello.bin | |||
|
23 | #QMAKE_EXTRA_TARGETS += beagleCp beagleCp131 |
@@ -1,73 +1,83 | |||||
1 | #include <stdio.h> |
|
1 | #include <stdio.h> | |
2 | #include <fat32.h> |
|
2 | #include <fat32.h> | |
3 | #include <gpio.h> |
|
3 | #include <gpio.h> | |
4 | #include <uart.h> |
|
4 | #include <uart.h> | |
5 | #include <stm32f4xx.h> |
|
5 | #include <stm32f4xx.h> | |
6 | #include <math.h> |
|
6 | #include <math.h> | |
7 | #include <bsp.h> |
|
7 | #include <bsp.h> | |
8 | #include <i2c.h> |
|
8 | #include <i2c.h> | |
9 | #include <CS43L22.h> |
|
9 | #include <CS43L22.h> | |
10 | #include <ina226.h> |
|
10 | #include <ina226.h> | |
11 | #include <fonts.h> |
|
11 | #include <fonts.h> | |
12 | #include <stdlib.h> |
|
12 | #include <stdlib.h> | |
13 | #include <core.h> |
|
13 | #include <core.h> | |
|
14 | #include <malloc.h> | |||
14 |
|
15 | |||
15 |
|
16 | |||
16 | extern streamdevice* __opnfiles__[]; |
|
17 | extern streamdevice* __opnfiles__[]; | |
17 |
|
18 | |||
18 | #define LCD_COLOR_WHITE 0xFFFF |
|
19 | #define LCD_COLOR_WHITE 0xFFFF | |
19 | #define LCD_COLOR_BLACK 0x0000 |
|
20 | #define LCD_COLOR_BLACK 0x0000 | |
20 | #define LCD_COLOR_GREY 0xF7DE |
|
21 | #define LCD_COLOR_GREY 0xF7DE | |
21 | #define LCD_COLOR_BLUE 0x001F |
|
22 | #define LCD_COLOR_BLUE 0x001F | |
22 | #define LCD_COLOR_BLUE2 0x051F |
|
23 | #define LCD_COLOR_BLUE2 0x051F | |
23 | #define LCD_COLOR_RED 0xF800 |
|
24 | #define LCD_COLOR_RED 0xF800 | |
24 | #define LCD_COLOR_MAGENTA 0xF81F |
|
25 | #define LCD_COLOR_MAGENTA 0xF81F | |
25 | #define LCD_COLOR_GREEN 0x07E0 |
|
26 | #define LCD_COLOR_GREEN 0x07E0 | |
26 | #define LCD_COLOR_CYAN 0x7FFF |
|
27 | #define LCD_COLOR_CYAN 0x7FFF | |
27 | #define LCD_COLOR_YELLOW 0xFFE0 |
|
28 | #define LCD_COLOR_YELLOW 0xFFE0 | |
28 |
|
29 | |||
29 | #ifndef PSU_DISABLE |
|
30 | #ifndef PSU_DISABLE | |
30 | #define PSU_DISABLE LED1 |
|
31 | #define PSU_DISABLE LED1 | |
31 | #endif |
|
32 | #endif | |
32 |
|
33 | |||
|
34 | void setUartAsStdout() | |||
|
35 | { | |||
|
36 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); | |||
|
37 | uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); | |||
|
38 | uartmkstreamdev(uart,fd1); | |||
|
39 | __opnfiles__[1] = fd1; | |||
|
40 | } | |||
33 |
|
41 | |||
34 | int main() |
|
42 | int main() | |
35 | { |
|
43 | { | |
36 | delay_100us(20000); |
|
44 | delay_100us(20000); | |
37 | INA226_t ina5VSens,ina33VSens,ina15VSens; |
|
45 | INA226_t ina5VSens,ina33VSens,ina15VSens; | |
38 | gpioset(PSU_DISABLE);//enable psu! |
|
46 | gpioset(PSU_DISABLE);//enable psu! | |
39 | ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_BLACK,1,LCD_COLOR_BLACK); |
|
47 | setUartAsStdout(); | |
|
48 | //ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_BLACK,1,LCD_COLOR_BLACK); | |||
40 | if(-1==ina226open(&ina33VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,0,0,15,1000000)) |
|
49 | if(-1==ina226open(&ina33VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,0,0,15,1000000)) | |
41 | { |
|
50 | { | |
42 | printf("Can't open 3.3V monitor\n\r"); |
|
51 | printf("Can't open 3.3V monitor\n\r"); | |
43 | } |
|
52 | } | |
44 | if(-1==ina226open(&ina5VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,0,1,15,1000000)) |
|
53 | if(-1==ina226open(&ina5VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,0,1,15,1000000)) | |
45 | { |
|
54 | { | |
46 | printf("Can't open 5V monitor\n\r"); |
|
55 | printf("Can't open 5V monitor\n\r"); | |
47 | } |
|
56 | } | |
48 | if(-1==ina226open(&ina15VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,1,0,15,1000000)) |
|
57 | if(-1==ina226open(&ina15VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,1,0,15,1000000)) | |
49 | { |
|
58 | { | |
50 | printf("Can't open 1.5V monitor\n\r"); |
|
59 | printf("Can't open 1.5V monitor\n\r"); | |
51 | } |
|
60 | } | |
52 | int current5V,current33V,current15V; |
|
61 | int current5V,current33V,current15V; | |
53 | while(1) |
|
62 | while(1) | |
54 | { |
|
63 | { | |
55 | current5V = ina226getCurrent(&ina5VSens); |
|
64 | current5V = ina226getCurrent(&ina5VSens); | |
56 | current33V = ina226getCurrent(&ina33VSens); |
|
65 | current33V = ina226getCurrent(&ina33VSens); | |
57 | current15V = ina226getCurrent(&ina15VSens); |
|
66 | current15V = ina226getCurrent(&ina15VSens); | |
58 | printf("%dmA\n",current15V/1000); |
|
67 | printf("%dmA\n\r",current15V/1000); | |
59 | printf("%dmA\n",current33V/1000); |
|
68 | printf("%dmA\n\r",current33V/1000); | |
60 | printf("%dmA\n",current5V/1000); |
|
69 | printf("%dmA\n\r",current5V/1000); | |
|
70 | delay_100us(10000); | |||
61 | } |
|
71 | } | |
62 | printf("Exit\n\r"); |
|
72 | printf("Exit\n\r"); | |
63 | return 0; |
|
73 | return 0; | |
64 | } |
|
74 | } | |
65 |
|
75 | |||
66 |
|
76 | |||
67 |
|
77 | |||
68 |
|
78 | |||
69 |
|
79 | |||
70 |
|
80 | |||
71 |
|
81 | |||
72 |
|
82 | |||
73 |
|
83 |
@@ -1,13 +1,13 | |||||
1 | TEMPLATE = app |
|
1 | TEMPLATE = app | |
2 | CONFIG += cpu |
|
2 | CONFIG += cpu | |
3 |
|
3 | |||
4 |
|
4 | |||
5 | UCMODEL=stm32f4 |
|
5 | UCMODEL=stm32f4 | |
6 |
|
6 | |||
7 | BSP = STM32F4Eval |
|
7 | BSP = STM32F4Eval | |
8 |
|
8 | |||
9 |
DEFINES += CPUFREQ= |
|
9 | DEFINES += CPUFREQ=40000000 | |
10 |
|
10 | |||
11 | SOURCES += \ |
|
11 | SOURCES += \ | |
12 | main.c |
|
12 | main.c | |
13 |
|
13 |
@@ -1,71 +1,81 | |||||
1 | #include <stdio.h> |
|
1 | #include <stdio.h> | |
2 | #include <fat32.h> |
|
2 | #include <fat32.h> | |
3 | #include <gpio.h> |
|
3 | #include <gpio.h> | |
4 | #include <uart.h> |
|
4 | #include <uart.h> | |
5 | #include <stm32f4xx.h> |
|
5 | #include <stm32f4xx.h> | |
6 | #include <math.h> |
|
6 | #include <math.h> | |
7 | #include <bsp.h> |
|
7 | #include <bsp.h> | |
8 | #include <i2c.h> |
|
8 | #include <i2c.h> | |
9 | #include <CS43L22.h> |
|
9 | #include <CS43L22.h> | |
10 | #include <ina226.h> |
|
10 | #include <ina226.h> | |
11 | #include <fonts.h> |
|
11 | #include <fonts.h> | |
12 | #include <stdlib.h> |
|
12 | #include <stdlib.h> | |
13 | #include <core.h> |
|
13 | #include <core.h> | |
14 | #include <terminal.h> |
|
14 | #include <terminal.h> | |
15 |
|
15 | |||
16 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; |
|
16 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; | |
17 |
|
17 | |||
18 | #define LCD_COLOR_WHITE 0xFFFF |
|
18 | #define LCD_COLOR_WHITE 0xFFFF | |
19 | #define LCD_COLOR_BLACK 0x0000 |
|
19 | #define LCD_COLOR_BLACK 0x0000 | |
20 | #define LCD_COLOR_GREY 0xF7DE |
|
20 | #define LCD_COLOR_GREY 0xF7DE | |
21 | #define LCD_COLOR_BLUE 0x001F |
|
21 | #define LCD_COLOR_BLUE 0x001F | |
22 | #define LCD_COLOR_BLUE2 0x051F |
|
22 | #define LCD_COLOR_BLUE2 0x051F | |
23 | #define LCD_COLOR_RED 0xF800 |
|
23 | #define LCD_COLOR_RED 0xF800 | |
24 | #define LCD_COLOR_MAGENTA 0xF81F |
|
24 | #define LCD_COLOR_MAGENTA 0xF81F | |
25 | #define LCD_COLOR_GREEN 0x07E0 |
|
25 | #define LCD_COLOR_GREEN 0x07E0 | |
26 | #define LCD_COLOR_CYAN 0x7FFF |
|
26 | #define LCD_COLOR_CYAN 0x7FFF | |
27 | #define LCD_COLOR_YELLOW 0xFFE0 |
|
27 | #define LCD_COLOR_YELLOW 0xFFE0 | |
28 |
|
28 | |||
|
29 | void testAudioDAC() | |||
|
30 | { | |||
|
31 | CS43L22_t dac; | |||
|
32 | cs43l22open(&dac,i2c1,0); | |||
|
33 | uint8_t ID= cs43l22getID(&dac); | |||
|
34 | printf("dac ID = %d\n\r",ID); | |||
|
35 | } | |||
29 |
|
36 | |||
30 | int main() |
|
37 | int main() | |
31 | { |
|
38 | { | |
|
39 | delay_100us(10000); | |||
32 | uint16_t innerbuffer[16]; |
|
40 | uint16_t innerbuffer[16]; | |
33 | uint16_t outterbuffer[16]; |
|
41 | uint16_t outterbuffer[16]; | |
34 | for(int i=0;i<16;i++)innerbuffer[i]=LCD_COLOR_BLUE; |
|
42 | for(int i=0;i<16;i++)innerbuffer[i]=LCD_COLOR_BLUE; | |
35 | for(int i=0;i<16;i++)outterbuffer[i]=LCD_COLOR_RED; |
|
43 | for(int i=0;i<16;i++)outterbuffer[i]=LCD_COLOR_RED; | |
36 | ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_CYAN,5,LCD_COLOR_BLACK); |
|
44 | ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_CYAN,5,LCD_COLOR_BLACK); | |
37 |
|
45 | |||
38 | streamdevice* fd1=__opnfiles__[1]; |
|
46 | streamdevice* fd1=__opnfiles__[1]; | |
39 | streamdevice fd2; |
|
47 | streamdevice fd2; | |
40 | int i=0; |
|
48 | int i=0; | |
41 | terminal_t terminal0,terminal1; |
|
49 | terminal_t terminal0,terminal1; | |
42 | terminal_init(&terminal0,&lcd0,&ComicSansMS_18,fd1); |
|
50 | terminal_init(&terminal0,&lcd0,&ComicSansMS_18,fd1); | |
43 | terminal_init(&terminal1,&lcd0,&ComicSansMS_18,&fd2); |
|
51 | terminal_init(&terminal1,&lcd0,&ComicSansMS_18,&fd2); | |
44 | terminal_setgeometry(&terminal0,5,5,terminal0.LCD->width-10,(terminal0.LCD->height/2)-10); |
|
52 | terminal_setgeometry(&terminal0,5,5,terminal0.LCD->width-10,(terminal0.LCD->height/2)-10); | |
45 | terminal_setbackgroundColor(&terminal1,0xFFFF); |
|
53 | terminal_setbackgroundColor(&terminal1,0xFFFF); | |
46 | terminal_settextColor(&terminal1,0x0000); |
|
54 | terminal_settextColor(&terminal1,0x0000); | |
47 | terminal_setgeometry(&terminal1,5,(terminal0.LCD->height/2)+5,terminal0.LCD->width-10,(terminal0.LCD->height/2)-10); |
|
55 | terminal_setgeometry(&terminal1,5,(terminal0.LCD->height/2)+5,terminal0.LCD->width-10,(terminal0.LCD->height/2)-10); | |
48 | printf("Line cnt :\n \t%d\n",terminal0.lineCount); |
|
56 | printf("Line cnt :\n \t%d\n",terminal0.lineCount); | |
49 | printf("Column cnt :\n \t%d\n",terminal0.columnCount); |
|
57 | printf("Column cnt :\n \t%d\n",terminal0.columnCount); | |
50 | printf("CPU Freq :\n \t%dMHz\n",getCpuFreq()/1000000); |
|
58 | printf("CPU Freq :\n \t%dMHz\n",getCpuFreq()/1000000); | |
|
59 | //testAudioDAC(); | |||
|
60 | i2cwrite(i2c1,0x4a," ",1); | |||
51 | while(1) |
|
61 | while(1) | |
52 | { |
|
62 | { | |
53 | i%=1000; |
|
63 | i%=1000; | |
54 | //terminal->write(&terminal," Hi",1, 2); |
|
64 | //terminal->write(&terminal," Hi",1, 2); | |
55 | //delay_100us(1000); |
|
65 | //delay_100us(1000); | |
56 | gpioset(LED1); |
|
66 | gpioset(LED1); | |
57 | //delay_100us(1000); |
|
67 | //delay_100us(1000); | |
58 | gpioclr(LED1); |
|
68 | gpioclr(LED1); | |
59 | } |
|
69 | } | |
60 | printf("hello world\n\r"); |
|
70 | printf("hello world\n\r"); | |
61 | return 0; |
|
71 | return 0; | |
62 | } |
|
72 | } | |
63 |
|
73 | |||
64 |
|
74 | |||
65 |
|
75 | |||
66 |
|
76 | |||
67 |
|
77 | |||
68 |
|
78 | |||
69 |
|
79 | |||
70 |
|
80 | |||
71 |
|
81 |
@@ -1,114 +1,114 | |||||
1 | /*------------------------------------------------------------------------------ |
|
1 | /*------------------------------------------------------------------------------ | |
2 | -- This file is a part of the libuc, microcontroler library |
|
2 | -- This file is a part of the libuc, microcontroler library | |
3 | -- Copyright (C) 2012, Alexis Jeandet |
|
3 | -- Copyright (C) 2012, Alexis Jeandet | |
4 | -- |
|
4 | -- | |
5 | -- This program is free software; you can redistribute it and/or modify |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
6 | -- it under the terms of the GNU General Public License as published by |
|
6 | -- it under the terms of the GNU General Public License as published by | |
7 | -- the Free Software Foundation; either version 3 of the License, or |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
8 | -- (at your option) any later version. |
|
8 | -- (at your option) any later version. | |
9 | -- |
|
9 | -- | |
10 | -- This program is distributed in the hope that it will be useful, |
|
10 | -- This program is distributed in the hope that it will be useful, | |
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | -- GNU General Public License for more details. |
|
13 | -- GNU General Public License for more details. | |
14 | -- |
|
14 | -- | |
15 | -- You should have received a copy of the GNU General Public License |
|
15 | -- You should have received a copy of the GNU General Public License | |
16 | -- along with this program; if not, write to the Free Software |
|
16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
|
18 | ------------------------------------------------------------------------------- | |
19 | -- Author : Alexis Jeandet |
|
19 | -- Author : Alexis Jeandet | |
20 | -- Mail : alexis.jeandet@gmail.com |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
21 | -------------------------------------------------------------------------------*/ |
|
21 | -------------------------------------------------------------------------------*/ | |
22 | #include <ina226.h> |
|
22 | #include <ina226.h> | |
23 | #include <stdio.h> |
|
23 | #include <stdio.h> | |
24 | #include <stddef.h> |
|
24 | #include <stddef.h> | |
25 |
|
25 | |||
26 |
|
26 | |||
27 | int ina226open(INA226_t *dev, i2c_t i2cdev, uint16_t config, uint8_t A0, uint8_t A1, uint32_t shuntmOhm, uint32_t CurrentRangeuAmp) |
|
27 | int ina226open(INA226_t *dev, i2c_t i2cdev, uint16_t config, uint8_t A0, uint8_t A1, uint32_t shuntmOhm, uint32_t CurrentRangeuAmp) | |
28 | { |
|
28 | { | |
29 | if(dev != NULL) |
|
29 | if(dev != NULL) | |
30 | { |
|
30 | { | |
31 | dev->i2cdev=i2cdev; |
|
31 | dev->i2cdev=i2cdev; | |
32 |
dev->devAddress = INA226_I2C_ADDRESS | (A0 & 1) | ((A1<< |
|
32 | dev->devAddress = INA226_I2C_ADDRESS | (A0 & 1) | ((A1<<2) & 5); | |
33 | printf("dev->devAddress = %x\n\r",dev->devAddress); |
|
33 | printf("dev->devAddress = %x\n\r",dev->devAddress); | |
34 | dev->shuntmOhm = shuntmOhm; |
|
34 | dev->shuntmOhm = shuntmOhm; | |
35 | dev->CurrentRangeuAmp = CurrentRangeuAmp; |
|
35 | dev->CurrentRangeuAmp = CurrentRangeuAmp; | |
36 | ina226setReg(dev,INA226_Configuration_Reg,0x8000); |
|
36 | ina226setReg(dev,INA226_Configuration_Reg,0x8000); | |
37 | ina226setReg(dev,INA226_Configuration_Reg,config); |
|
37 | ina226setReg(dev,INA226_Configuration_Reg,config); | |
38 | return ina226calibrate(dev,shuntmOhm,CurrentRangeuAmp); |
|
38 | return ina226calibrate(dev,shuntmOhm,CurrentRangeuAmp); | |
39 | } |
|
39 | } | |
40 | return -1; |
|
40 | return -1; | |
41 | } |
|
41 | } | |
42 |
|
42 | |||
43 | uint16_t ina226getID(INA226_t* dev) |
|
43 | uint16_t ina226getID(INA226_t* dev) | |
44 | { |
|
44 | { | |
45 | if(dev != NULL) |
|
45 | if(dev != NULL) | |
46 | { |
|
46 | { | |
47 | uint16_t id=ina226getReg(dev,INA226_Die_ID_Reg); |
|
47 | uint16_t id=ina226getReg(dev,INA226_Die_ID_Reg); | |
48 | return id; |
|
48 | return id; | |
49 | } |
|
49 | } | |
50 | return -1; |
|
50 | return -1; | |
51 | } |
|
51 | } | |
52 |
|
52 | |||
53 |
|
53 | |||
54 | int ina226calibrate(INA226_t* dev,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp) |
|
54 | int ina226calibrate(INA226_t* dev,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp) | |
55 | { |
|
55 | { | |
56 | dev->shuntmOhm = shuntmOhm; |
|
56 | dev->shuntmOhm = shuntmOhm; | |
57 | dev->CurrentRangeuAmp = CurrentRangeuAmp; |
|
57 | dev->CurrentRangeuAmp = CurrentRangeuAmp; | |
58 | uint32_t CAL= (uint32_t)(5210000/(shuntmOhm*(CurrentRangeuAmp>>15))); |
|
58 | uint32_t CAL= (uint32_t)(5210000/(shuntmOhm*(CurrentRangeuAmp>>15))); | |
59 | return ina226setReg(dev,INA226_Calibration_Reg,(uint16_t)CAL); |
|
59 | return ina226setReg(dev,INA226_Calibration_Reg,(uint16_t)CAL); | |
60 | } |
|
60 | } | |
61 |
|
61 | |||
62 | uint32_t ina226getBusVoltage(INA226_t *dev) |
|
62 | uint32_t ina226getBusVoltage(INA226_t *dev) | |
63 | { |
|
63 | { | |
64 | uint32_t busVoltage= ina226getReg(dev,INA226_Bus_Voltage_Reg); |
|
64 | uint32_t busVoltage= ina226getReg(dev,INA226_Bus_Voltage_Reg); | |
65 | busVoltage*= 1250; |
|
65 | busVoltage*= 1250; | |
66 | return busVoltage; |
|
66 | return busVoltage; | |
67 | } |
|
67 | } | |
68 |
|
68 | |||
69 | uint32_t ina226getPower(INA226_t *dev) |
|
69 | uint32_t ina226getPower(INA226_t *dev) | |
70 | { |
|
70 | { | |
71 | uint32_t power= ina226getReg(dev,INA226_Power_Reg); |
|
71 | uint32_t power= ina226getReg(dev,INA226_Power_Reg); | |
72 | power*= ((dev->CurrentRangeuAmp>>15)*25); |
|
72 | power*= ((dev->CurrentRangeuAmp>>15)*25); | |
73 | return power; |
|
73 | return power; | |
74 | } |
|
74 | } | |
75 |
|
75 | |||
76 | int32_t ina226getCurrent(INA226_t *dev) |
|
76 | int32_t ina226getCurrent(INA226_t *dev) | |
77 | { |
|
77 | { | |
78 | int32_t current= ina226getReg(dev,INA226_Current_Reg); |
|
78 | int32_t current= ina226getReg(dev,INA226_Current_Reg); | |
79 | current<<=16; |
|
79 | current<<=16; | |
80 | current>>=16; |
|
80 | current>>=16; | |
81 | current = current*(dev->CurrentRangeuAmp>>15); |
|
81 | current = current*(dev->CurrentRangeuAmp>>15); | |
82 | return current; |
|
82 | return current; | |
83 | } |
|
83 | } | |
84 |
|
84 | |||
85 | uint16_t ina226getReg(INA226_t* dev,char reg) |
|
85 | uint16_t ina226getReg(INA226_t* dev,char reg) | |
86 | { |
|
86 | { | |
87 | if(dev != NULL) |
|
87 | if(dev != NULL) | |
88 | { |
|
88 | { | |
89 | char DATA[2]; |
|
89 | char DATA[2]; | |
90 | DATA[0]=reg; |
|
90 | DATA[0]=reg; | |
91 | i2cwrite(dev->i2cdev,dev->devAddress,DATA,1); |
|
91 | i2cwrite(dev->i2cdev,dev->devAddress,DATA,1); | |
92 | i2cread(dev->i2cdev,dev->devAddress,DATA,2); |
|
92 | i2cread(dev->i2cdev,dev->devAddress,DATA,2); | |
93 | uint16_t val=DATA[0]; |
|
93 | uint16_t val=DATA[0]; | |
94 | val=(val<<8)+DATA[1]; |
|
94 | val=(val<<8)+DATA[1]; | |
95 | return val; |
|
95 | return val; | |
96 | } |
|
96 | } | |
97 | return -1; |
|
97 | return -1; | |
98 | } |
|
98 | } | |
99 |
|
99 | |||
100 |
|
100 | |||
101 | int ina226setReg(INA226_t* dev,char reg,int16_t value) |
|
101 | int ina226setReg(INA226_t* dev,char reg,int16_t value) | |
102 | { |
|
102 | { | |
103 | if(dev != NULL) |
|
103 | if(dev != NULL) | |
104 | { |
|
104 | { | |
105 | char DATA[3]; |
|
105 | char DATA[3]; | |
106 | DATA[0]=INA226_Calibration_Reg; |
|
106 | DATA[0]=INA226_Calibration_Reg; | |
107 | DATA[1]=(char)(0xff & (value>>8)); |
|
107 | DATA[1]=(char)(0xff & (value>>8)); | |
108 | DATA[2]=(char)(0xff & value); |
|
108 | DATA[2]=(char)(0xff & value); | |
109 | if(3==i2cwrite(dev->i2cdev,dev->devAddress,DATA,3))return 1; |
|
109 | if(3==i2cwrite(dev->i2cdev,dev->devAddress,DATA,3))return 1; | |
110 | } |
|
110 | } | |
111 | return -1; |
|
111 | return -1; | |
112 | } |
|
112 | } | |
113 |
|
113 | |||
114 |
|
114 |
@@ -1,341 +1,388 | |||||
1 | /*------------------------------------------------------------------------------ |
|
1 | /*------------------------------------------------------------------------------ | |
2 | -- This file is a part of the libuc, microcontroler library |
|
2 | -- This file is a part of the libuc, microcontroler library | |
3 | -- Copyright (C) 2012, Alexis Jeandet |
|
3 | -- Copyright (C) 2012, Alexis Jeandet | |
4 | -- |
|
4 | -- | |
5 | -- This program is free software; you can redistribute it and/or modify |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
6 | -- it under the terms of the GNU General Public License as published by |
|
6 | -- it under the terms of the GNU General Public License as published by | |
7 | -- the Free Software Foundation; either version 3 of the License, or |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
8 | -- (at your option) any later version. |
|
8 | -- (at your option) any later version. | |
9 | -- |
|
9 | -- | |
10 | -- This program is distributed in the hope that it will be useful, |
|
10 | -- This program is distributed in the hope that it will be useful, | |
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | -- GNU General Public License for more details. |
|
13 | -- GNU General Public License for more details. | |
14 | -- |
|
14 | -- | |
15 | -- You should have received a copy of the GNU General Public License |
|
15 | -- You should have received a copy of the GNU General Public License | |
16 | -- along with this program; if not, write to the Free Software |
|
16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
|
18 | ------------------------------------------------------------------------------- | |
19 | -- Author : Alexis Jeandet |
|
19 | -- Author : Alexis Jeandet | |
20 | -- Mail : alexis.jeandet@gmail.com |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
21 | -------------------------------------------------------------------------------*/ |
|
21 | -------------------------------------------------------------------------------*/ | |
22 |
|
22 | |||
23 | #include <i2c.h> |
|
23 | #include <i2c.h> | |
24 | #include <stm32f4xx_usart.h> |
|
24 | #include <stm32f4xx_usart.h> | |
25 | #include <stm32f4xx_rcc.h> |
|
25 | #include <stm32f4xx_rcc.h> | |
26 | #include <stm32f4xx_gpio.h> |
|
26 | #include <stm32f4xx_gpio.h> | |
27 | #include <gpio.h> |
|
27 | #include <gpio.h> | |
28 | #include <core.h> |
|
28 | #include <core.h> | |
29 |
|
29 | |||
30 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
|
30 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) | |
31 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
|
31 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) | |
32 |
|
32 | |||
33 | int i2ctimeout=1000*1000; |
|
33 | int i2ctimeout=1000*1000; | |
34 |
|
34 | |||
35 | I2C_TypeDef* _i2c_dev_table[3]={I2C1,I2C2,I2C3}; |
|
35 | I2C_TypeDef* _i2c_dev_table[3]={I2C1,I2C2,I2C3}; | |
36 |
|
36 | |||
37 | i2c_t i2copen(int count) |
|
37 | i2c_t i2copen(int count) | |
38 | { |
|
38 | { | |
39 | #define _INIT_DEV(_RCC_) \ |
|
39 | #define _INIT_DEV(_RCC_) \ | |
40 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); \ |
|
40 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); \ | |
41 | RCC_APB1PeriphResetCmd(_RCC_, ENABLE); \ |
|
41 | RCC_APB1PeriphResetCmd(_RCC_, ENABLE); \ | |
42 |
RCC_APB1PeriphResetCmd(_RCC_, DISABLE); |
|
42 | RCC_APB1PeriphResetCmd(_RCC_, DISABLE); | |
43 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); |
|
|||
44 |
|
43 | |||
45 | switch(count) |
|
44 | switch(count) | |
46 | { |
|
45 | { | |
47 | case i2c1: |
|
46 | case i2c1: | |
48 | _INIT_DEV(RCC_APB1Periph_I2C1); |
|
47 | _INIT_DEV(RCC_APB1Periph_I2C1); | |
49 | return i2c1; |
|
48 | return i2c1; | |
50 | break; |
|
49 | break; | |
51 | case i2c2: |
|
50 | case i2c2: | |
52 | _INIT_DEV(RCC_APB1Periph_I2C2); |
|
51 | _INIT_DEV(RCC_APB1Periph_I2C2); | |
53 | return i2c2; |
|
52 | return i2c2; | |
54 | break; |
|
53 | break; | |
55 | case i2c3: |
|
54 | case i2c3: | |
56 | _INIT_DEV(RCC_APB1Periph_I2C3); |
|
55 | _INIT_DEV(RCC_APB1Periph_I2C3); | |
57 | return i2c3; |
|
56 | return i2c3; | |
58 | break; |
|
57 | break; | |
59 | default: |
|
58 | default: | |
60 | break; |
|
59 | break; | |
61 | } |
|
60 | } | |
62 | return -1; |
|
61 | return -1; | |
63 | } |
|
62 | } | |
64 |
|
63 | |||
65 | i2c_t i2copenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL) |
|
64 | i2c_t i2copenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL) | |
66 | { |
|
65 | { | |
67 | i2c_t dev = i2copen(count); |
|
66 | i2c_t dev = i2copen(count); | |
68 | if(dev!=-1) |
|
67 | if(dev!=-1) | |
69 | { |
|
68 | { | |
70 | i2cclose(dev); |
|
69 | i2cclose(dev); | |
71 | i2csetpins(dev,SDA,SCL); |
|
70 | i2csetpins(dev,SDA,SCL); | |
72 | i2copen(count); |
|
71 | i2copen(count); | |
73 | i2cenable(count); |
|
72 | //i2cenable(count); | |
74 | //I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
73 | //I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
75 | i2csetspeed(dev,speed); |
|
74 | i2csetspeed(dev,speed); | |
76 | i2cenable(count); |
|
75 | i2cenable(count); | |
77 | } |
|
76 | } | |
78 | return dev; |
|
77 | return dev; | |
79 | } |
|
78 | } | |
80 |
|
79 | |||
81 | int i2cclose(i2c_t dev) |
|
80 | int i2cclose(i2c_t dev) | |
82 | { |
|
81 | { | |
83 | switch(dev) |
|
82 | switch(dev) | |
84 | { |
|
83 | { | |
85 | case i2c1: |
|
84 | case i2c1: | |
86 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); |
|
85 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); | |
87 | break; |
|
86 | break; | |
88 | case i2c2: |
|
87 | case i2c2: | |
89 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); |
|
88 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); | |
90 | break; |
|
89 | break; | |
91 | case i2c3: |
|
90 | case i2c3: | |
92 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE); |
|
91 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE); | |
93 | break; |
|
92 | break; | |
94 | default: |
|
93 | default: | |
95 | break; |
|
94 | break; | |
96 | } |
|
95 | } | |
97 | return 1; |
|
96 | return 1; | |
98 | } |
|
97 | } | |
99 |
|
98 | |||
100 | int i2csetpins(i2c_t dev, uint32_t SDA, uint32_t SCL) |
|
99 | int i2csetpins(i2c_t dev, uint32_t SDA, uint32_t SCL) | |
101 | { |
|
100 | { | |
102 |
if((dev< |
|
101 | if((dev<i2c4)&&(dev>=i2c1)) | |
103 | { |
|
102 | { | |
104 | gpio_t SDApin,SCLpin; |
|
103 | gpio_t SDApin,SCLpin; | |
105 | SDApin = gpioopen(SDA); |
|
104 | SDApin = gpioopen(SDA); | |
106 | SCLpin = gpioopen(SCL); |
|
105 | SCLpin = gpioopen(SCL); | |
107 | SDApin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype; |
|
106 | SDApin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype; | |
108 | SCLpin |= gpiolowspeed | gpiooutdir | gpioopendraintype | gpionopulltype; |
|
107 | SCLpin |= gpiolowspeed | gpiooutdir | gpioopendraintype | gpionopulltype; | |
109 | gpiosetconfig(&SCLpin); |
|
108 | gpiosetconfig(&SCLpin); | |
110 | for(int i=0;i<32;i++) |
|
109 | for(int i=0;i<32;i++) | |
111 | { |
|
110 | { | |
112 | gpioclr(SCLpin); |
|
111 | gpioclr(SCLpin); | |
113 | for(int l=0;l<200;l++) |
|
112 | for(int l=0;l<200;l++) | |
114 | {__asm__("nop");} |
|
113 | {__asm__("nop");} | |
115 | gpioset(SCLpin); |
|
114 | gpioset(SCLpin); | |
116 | for(int l=0;l<200;l++) |
|
115 | for(int l=0;l<200;l++) | |
117 | {__asm__("nop");} |
|
116 | {__asm__("nop");} | |
118 | } |
|
117 | } | |
119 | SCLpin = gpioopen(SCL); |
|
118 | SCLpin = gpioopen(SCL); | |
120 | SCLpin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype; |
|
119 | SCLpin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype; | |
121 | gpiosetconfig(&SDApin); |
|
120 | gpiosetconfig(&SDApin); | |
122 | gpiosetconfig(&SCLpin); |
|
121 | gpiosetconfig(&SCLpin); | |
123 | uint8_t gpioAFi2cx = GPIO_AF_I2C1; |
|
122 | uint8_t gpioAFi2cx = GPIO_AF_I2C1; | |
124 | switch(dev) |
|
123 | switch(dev) | |
125 | { |
|
124 | { | |
126 | case i2c1: |
|
125 | case i2c1: | |
127 | gpioAFi2cx = GPIO_AF_I2C1; |
|
126 | gpioAFi2cx = GPIO_AF_I2C1; | |
128 | break; |
|
127 | break; | |
129 | case i2c2: |
|
128 | case i2c2: | |
130 | gpioAFi2cx = GPIO_AF_I2C2; |
|
129 | gpioAFi2cx = GPIO_AF_I2C2; | |
131 | break; |
|
130 | break; | |
132 | case i2c3: |
|
131 | case i2c3: | |
133 | gpioAFi2cx = GPIO_AF_I2C3; |
|
132 | gpioAFi2cx = GPIO_AF_I2C3; | |
134 | break; |
|
133 | break; | |
135 | default: |
|
134 | default: | |
136 | break; |
|
135 | break; | |
137 | } |
|
136 | } | |
138 | GPIO_PinAFConfig(GPIOGETPORT(SDApin), (uint8_t)(SDApin & 0xF), gpioAFi2cx); |
|
137 | GPIO_PinAFConfig(GPIOGETPORT(SDApin), (uint8_t)(SDApin & 0xF), gpioAFi2cx); | |
139 | GPIO_PinAFConfig(GPIOGETPORT(SCLpin), (uint8_t)(SCLpin & 0xF), gpioAFi2cx); |
|
138 | GPIO_PinAFConfig(GPIOGETPORT(SCLpin), (uint8_t)(SCLpin & 0xF), gpioAFi2cx); | |
140 | return 0; |
|
139 | return 0; | |
141 | } |
|
140 | } | |
142 | return -1; |
|
141 | return -1; | |
143 | } |
|
142 | } | |
144 |
|
143 | |||
145 | int i2cenable(i2c_t dev) |
|
144 | int i2cenable(i2c_t dev) | |
146 | { |
|
145 | { | |
147 |
if((dev< |
|
146 | if((dev<i2c4)&&(dev>=i2c1)) | |
148 | { |
|
147 | { | |
149 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
148 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
150 | _dev_->CR1 |=1 ; |
|
149 | _dev_->CR1 |=1 ; | |
151 | return 0; |
|
150 | return 0; | |
152 | } |
|
151 | } | |
153 | return -1; |
|
152 | return -1; | |
154 | } |
|
153 | } | |
155 |
|
154 | |||
156 | int i2cdisable(i2c_t dev) |
|
155 | int i2cdisable(i2c_t dev) | |
157 | { |
|
156 | { | |
158 |
if((dev< |
|
157 | if((dev<i2c4)&&(dev>=i2c1)) | |
159 | { |
|
158 | { | |
160 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
159 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
161 | _dev_->CR1 &= ~1; |
|
160 | _dev_->CR1 &= ~1; | |
162 | return 0; |
|
161 | return 0; | |
163 | } |
|
162 | } | |
164 | return -1; |
|
163 | return -1; | |
165 | } |
|
164 | } | |
166 |
|
165 | |||
167 |
|
166 | |||
168 | int i2csetspeed(i2c_t dev,uint32_t speed) |
|
167 | int i2csetspeed(i2c_t dev,uint32_t speed) | |
169 | { |
|
168 | { | |
170 |
if((dev< |
|
169 | if((dev<i2c4)&&(dev>=i2c1)) | |
171 | { |
|
170 | { | |
172 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
171 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
173 | int32_t APB1Freq=getAPB1Freq()/1000000; |
|
172 | int32_t APB1Freq=getAPB1Freq()/1000000; | |
174 | if((APB1Freq>1)&&(APB1Freq<43)) |
|
173 | if((APB1Freq>1)&&(APB1Freq<43)) | |
175 | { |
|
174 | { | |
176 |
|
175 | |||
177 | uint16_t tmpreg=_dev_->CR2; |
|
176 | uint16_t tmpreg=_dev_->CR2; | |
178 | tmpreg &= ~(0x1f); |
|
177 | tmpreg &= ~(0x1f); | |
179 | tmpreg |= APB1Freq; |
|
178 | tmpreg |= APB1Freq; | |
180 | _dev_->CR2=tmpreg; |
|
179 | _dev_->CR2=tmpreg; | |
181 | i2cdisable(dev); |
|
180 | i2cdisable(dev); | |
182 | tmpreg=_dev_->CCR; |
|
181 | tmpreg=_dev_->CCR; | |
183 | APB1Freq=getAPB1Freq(); |
|
182 | APB1Freq=getAPB1Freq(); | |
184 | if(speed>100000) //100kHz= standard mode, 400kHz= fast mode |
|
183 | if(speed>100000) //100kHz= standard mode, 400kHz= fast mode | |
185 | { |
|
184 | { | |
186 | if(speed<=400000) |
|
185 | if(speed<=400000) | |
187 | { |
|
186 | { | |
188 | tmpreg |= 1<<15; |
|
187 | tmpreg |= 1<<15; | |
189 | tmpreg &= ~(1<<14); |
|
188 | tmpreg &= ~(1<<14); | |
190 | tmpreg &= ~(0xfff); |
|
189 | tmpreg &= ~(0xfff); | |
191 | tmpreg |= 0xfff & (APB1Freq/(3*speed)); |
|
190 | tmpreg |= 0xfff & (APB1Freq/(3*speed)); | |
192 | } |
|
191 | } | |
193 | } |
|
192 | } | |
194 | else |
|
193 | else | |
195 | { |
|
194 | { | |
196 |
|
|
195 | tmpreg &= ~(1<<15); | |
197 |
|
|
196 | tmpreg &= ~(0xfff); | |
198 |
|
|
197 | tmpreg |= 0xfff & (APB1Freq/(2*speed)); | |
199 | } |
|
198 | } | |
200 | _dev_->CCR=tmpreg; |
|
199 | _dev_->CCR=tmpreg; | |
201 | tmpreg=_dev_->TRISE; |
|
200 | tmpreg=_dev_->TRISE; | |
202 | tmpreg &= ~(0x3f); |
|
201 | tmpreg &= ~(0x3f); | |
203 | tmpreg |= (APB1Freq/1000000)+1; |
|
202 | tmpreg |= (APB1Freq/1000000)+1; | |
204 | _dev_->TRISE = tmpreg; |
|
203 | _dev_->TRISE = tmpreg; | |
205 | i2cenable(dev); |
|
204 | i2cenable(dev); | |
206 | return 0; |
|
205 | return 0; | |
207 | } |
|
206 | } | |
208 | } |
|
207 | } | |
209 | return -1; |
|
208 | return -1; | |
210 | } |
|
209 | } | |
211 |
|
210 | |||
212 | int i2cbusy(i2c_t dev) |
|
211 | int i2cbusy(i2c_t dev) | |
213 | { |
|
212 | { | |
214 |
if((dev< |
|
213 | if((dev<i2c4)&&(dev>=i2c1)) | |
215 | { |
|
214 | { | |
216 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
215 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
217 | if((_dev_->SR2 & 2) ==2) return 1; /* Dev is busy */ |
|
216 | if((_dev_->SR2 & 2) ==2) return 1; /* Dev is busy */ | |
218 | return 0; /* Dev isn't busy */ |
|
217 | return 0; /* Dev isn't busy */ | |
219 | } |
|
218 | } | |
220 | return -1; /* Error, dev is out of range */ |
|
219 | return -1; /* Error, dev is out of range */ | |
221 | } |
|
220 | } | |
222 |
|
221 | |||
223 | int i2cwrite(i2c_t dev,char address,char* data,int count) |
|
222 | int i2cwrite(i2c_t dev,char address,char* data,int count) | |
224 | { |
|
223 | { | |
225 |
if((dev< |
|
224 | if((dev<i2c4)&&(dev>=i2c1)) | |
226 | { |
|
225 | { | |
227 | int timeout=i2ctimeout; |
|
226 | int timeout=i2ctimeout; | |
228 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
227 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
229 | while(i2cbusy(dev)) |
|
228 | while(i2cbusy(dev)) | |
230 | { |
|
229 | { | |
231 |
if(0==(timeout--)) |
|
230 | if(0==(timeout--)) | |
|
231 | { | |||
|
232 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
233 | return -1; | |||
|
234 | } | |||
232 | } |
|
235 | } | |
233 | _dev_->CR1 |= 1<<8; |
|
236 | _dev_->CR1 |= 1<<8; | |
234 | timeout=i2ctimeout; |
|
237 | timeout=i2ctimeout; | |
235 | while(!i2cStatusCheck(dev,((uint32_t)0x00030001))) |
|
238 | while(!i2cStatusCheck(dev,((uint32_t)0x00030001))) | |
236 | { |
|
239 | { | |
237 |
if(0==(timeout--)) |
|
240 | if(0==(timeout--)) | |
|
241 | { | |||
|
242 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
243 | return -1; | |||
|
244 | } | |||
238 | } |
|
245 | } | |
239 | _dev_->DR= address<<1; |
|
246 | _dev_->DR= address<<1; | |
240 | timeout=i2ctimeout; |
|
247 | timeout=i2ctimeout; | |
241 | while(!i2cStatusCheck(dev, ((uint32_t)0x00070082))) |
|
248 | while(!i2cStatusCheck(dev, ((uint32_t)0x00070082))) | |
242 | { |
|
249 | { | |
243 |
if(0==(timeout--)) |
|
250 | if(0==(timeout--)) | |
|
251 | { | |||
|
252 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
253 | return -1; | |||
|
254 | } | |||
244 | } |
|
255 | } | |
245 | address=_dev_->SR2; |
|
256 | address=_dev_->SR2; | |
246 | for(int i=0;i<count;i++) |
|
257 | for(int i=0;i<count;i++) | |
247 | { |
|
258 | { | |
248 | timeout=i2ctimeout; |
|
259 | timeout=i2ctimeout; | |
249 | while(!i2cStatusCheck(dev,((uint32_t)0x00070080))) |
|
260 | while(!i2cStatusCheck(dev,((uint32_t)0x00070080))) | |
250 | { |
|
261 | { | |
251 |
if(0==(timeout--)) |
|
262 | if(0==(timeout--)) | |
|
263 | { | |||
|
264 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
265 | return -1; | |||
|
266 | } | |||
252 | } |
|
267 | } | |
253 | _dev_->DR= data[i]; |
|
268 | _dev_->DR= data[i]; | |
254 | } |
|
269 | } | |
255 | timeout=i2ctimeout; |
|
270 | timeout=i2ctimeout; | |
256 | while(!i2cStatusCheck(dev,1<<7)) |
|
271 | while(!i2cStatusCheck(dev,1<<7)) | |
257 | { |
|
272 | { | |
258 |
if(0==(timeout--)) |
|
273 | if(0==(timeout--)) | |
|
274 | { | |||
|
275 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
276 | return -1; | |||
|
277 | } | |||
259 | } |
|
278 | } | |
260 | timeout=i2ctimeout; |
|
279 | timeout=i2ctimeout; | |
261 | while(!i2cStatusCheck(dev,1<<2)) |
|
280 | while(!i2cStatusCheck(dev,1<<2)) | |
262 | { |
|
281 | { | |
263 |
if(0==(timeout--)) |
|
282 | if(0==(timeout--)) | |
|
283 | { | |||
|
284 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
285 | return -1; | |||
|
286 | } | |||
264 | } |
|
287 | } | |
265 | _dev_->CR1 |= 1<<9; |
|
288 | _dev_->CR1 |= 1<<9; | |
266 | return count; |
|
289 | return count; | |
267 | } |
|
290 | } | |
268 | return -1; |
|
291 | return -1; | |
269 | } |
|
292 | } | |
270 |
|
293 | |||
271 | int i2cread(i2c_t dev,char address,char* data,int count) |
|
294 | int i2cread(i2c_t dev,char address,char* data,int count) | |
272 | { |
|
295 | { | |
273 |
if((dev< |
|
296 | if((dev<i2c4)&&(dev>=i2c1)) | |
274 | { |
|
297 | { | |
275 | int i=0; |
|
298 | int i=0; | |
276 | int timeout=i2ctimeout; |
|
299 | int timeout=i2ctimeout; | |
277 | while(i2cbusy(dev)) |
|
300 | while(i2cbusy(dev)) | |
278 | { |
|
301 | { | |
279 |
if(0==(timeout--)) |
|
302 | if(0==(timeout--)) | |
|
303 | { | |||
|
304 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
305 | return -1; | |||
|
306 | } | |||
280 | } |
|
307 | } | |
281 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
308 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
282 | _dev_->CR1 |= (1<<8) + (1<<10); |
|
309 | _dev_->CR1 |= (1<<8) + (1<<10); | |
283 | timeout=i2ctimeout; |
|
310 | timeout=i2ctimeout; | |
284 | while(!i2cStatusCheck(dev,0x00030001)) |
|
311 | while(!i2cStatusCheck(dev,0x00030001)) | |
285 | { |
|
312 | { | |
286 |
if(0==(timeout--)) |
|
313 | if(0==(timeout--)) | |
|
314 | { | |||
|
315 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
316 | return -1; | |||
|
317 | } | |||
287 | } |
|
318 | } | |
288 | _dev_->DR= (address<<1) + 1; |
|
319 | _dev_->DR= (address<<1) + 1; | |
289 | while(!i2cStatusCheck(dev,0x000002)) |
|
320 | while(!i2cStatusCheck(dev,0x000002)) | |
290 | { |
|
321 | { | |
291 |
if(0==(timeout--)) |
|
322 | if(0==(timeout--)) | |
|
323 | { | |||
|
324 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
325 | return -1; | |||
|
326 | } | |||
292 | } |
|
327 | } | |
293 | if(count==1) |
|
328 | if(count==1) | |
294 | { |
|
329 | { | |
295 | _dev_->CR1 &= ~(1<<10); |
|
330 | _dev_->CR1 &= ~(1<<10); | |
296 | } |
|
331 | } | |
297 | address=_dev_->SR2; |
|
332 | address=_dev_->SR2; | |
298 | for(i=0;i<(count-1);i++) |
|
333 | for(i=0;i<(count-1);i++) | |
299 | { |
|
334 | { | |
300 | timeout=i2ctimeout; |
|
335 | timeout=i2ctimeout; | |
301 | while(!i2cStatusCheck(dev,0x0000040)) |
|
336 | while(!i2cStatusCheck(dev,0x0000040)) | |
302 | { |
|
337 | { | |
303 |
if(0==(timeout--)) |
|
338 | if(0==(timeout--)) | |
|
339 | { | |||
|
340 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
341 | return -1; | |||
|
342 | } | |||
304 | } |
|
343 | } | |
305 | data[i]=_dev_->DR; |
|
344 | data[i]=_dev_->DR; | |
306 | } |
|
345 | } | |
307 | _dev_->CR1 &= ~(1<<10); |
|
346 | _dev_->CR1 &= ~(1<<10); | |
308 | _dev_->CR1 |= 1<<9; |
|
347 | _dev_->CR1 |= 1<<9; | |
309 | timeout=i2ctimeout; |
|
348 | timeout=i2ctimeout; | |
310 | while(!i2cStatusCheck(dev,0x0000040)) |
|
349 | while(!i2cStatusCheck(dev,0x0000040)) | |
311 | { |
|
350 | { | |
312 |
if(0==(timeout--)) |
|
351 | if(0==(timeout--)) | |
|
352 | { | |||
|
353 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
354 | return -1; | |||
|
355 | } | |||
313 | } |
|
356 | } | |
314 | data[i]=_dev_->DR; |
|
357 | data[i]=_dev_->DR; | |
315 | timeout=i2ctimeout; |
|
358 | timeout=i2ctimeout; | |
316 | while(_dev_->CR1 & ((uint16_t)0x0200)) |
|
359 | while(_dev_->CR1 & ((uint16_t)0x0200)) | |
317 | { |
|
360 | { | |
318 |
if(0==(timeout--)) |
|
361 | if(0==(timeout--)) | |
|
362 | { | |||
|
363 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |||
|
364 | return -1; | |||
|
365 | } | |||
319 | } |
|
366 | } | |
320 | _dev_->CR1 |= 1<<10; |
|
367 | _dev_->CR1 |= 1<<10; | |
321 | return count; |
|
368 | return count; | |
322 | } |
|
369 | } | |
323 | return -1; |
|
370 | return -1; | |
324 | } |
|
371 | } | |
325 |
|
372 | |||
326 |
|
373 | |||
327 | int i2cStatusCheck(i2c_t dev,int32_t flagMask) |
|
374 | int i2cStatusCheck(i2c_t dev,int32_t flagMask) | |
328 | { |
|
375 | { | |
329 | int32_t flag; |
|
376 | int32_t flag; | |
330 |
if((dev< |
|
377 | if((dev<i2c4)&&(dev>=i2c1)) | |
331 | { |
|
378 | { | |
332 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
379 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; | |
333 | flag= _dev_->SR1 + (_dev_->SR2<<16); |
|
380 | flag= _dev_->SR1 + (_dev_->SR2<<16); | |
334 | if(flagMask==(flag & flagMask)) |
|
381 | if(flagMask==(flag & flagMask)) | |
335 | return 1; |
|
382 | return 1; | |
336 | return 0; |
|
383 | return 0; | |
337 | } |
|
384 | } | |
338 | return -1; |
|
385 | return -1; | |
339 | } |
|
386 | } | |
340 |
|
387 | |||
341 |
|
388 |
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