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1 TEMPLATE = lib
2
3 TARGET=bsp
4 CONFIG += bsp gui
5
6 BSP=STM32F4Discovery_35LCD
7
8 UCMODEL=stm32f4
9
10 SOURCES += bsp.c \
11 bsp_lcd.c
12
13 HEADERS += bsp.h
14
15 LIBS+= -lgpio -luart -li2c -lspi
16
17 BSPFILE = bsp.pri
18
19
20
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #include "bsp.h"
23 #include <streamdevices.h>
24 #include <malloc.h>
25 #include <gpio.h>
26 #include <uart.h>
27 #include <stdio.h>
28 uint32_t OSC0 =8000000;
29 uint32_t INTOSC =16000000;
30 uint32_t RTCOSC =32768;
31 uint32_t currentCpuFreq=0;
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33
34 gpio_t TickLed = LED1;
35
36 float VREF0 =(float)3.3;
37
38 LCD_IF_t lcdIF0={
39 .init = &bsp_FSMC_init,
40 .writereg = &bsp_lcd0_write_reg,
41 .readreg = &bsp_lcd0_read_reg,
42 .writeGRAM = &bsp_lcd0_writeGRAM,
43 .readGRAM = &bsp_lcd0_readGRAM
44 };
45
46 LCD_t lcd0={
47 .interface = &lcdIF0,
48 .init = &ili9328init,
49 .paint = &ili9328paint,
50 .paintText = &ili9328paintText,
51 .paintFilRect = &ili9328paintFilRect,
52 .getPix = &ili9328getPix,
53 .refreshenable = &ili9328refreshenable,
54 .width= 240,
55 .height = 320
56 };
57
58 int bsp_init()
59 {
60 int i=0;
61 for(i=0;i<32;i++)
62 {
63 __opnfiles__[i] = NULL;
64 }
65 bsp_GPIO_init();
66 bsp_uart_init();
67 bsp_FSMC_init();
68 printf("\r================================================================\n\r");
69 printf("================================================================\n\r");
70 printf(BSP);
71 printf(" initialised\n\r");
72 printf("================================================================\n\r");
73 return 1;
74 }
75
76 void bsp_GPIO_init()
77 {
78 gpio_t gpio1 = gpioopen(LED1);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
79 gpio_t gpio2 = gpioopen(LED2);//gpioopen(LED2);
80 gpiosetspeed(&gpio1,gpiohighspeed);
81 gpiosetspeed(&gpio2,gpiohighspeed);
82 gpiosetdir(&gpio1,gpiooutdir);
83 gpiosetdir(&gpio2,gpiooutdir);
84 }
85
86 void bsp_uart_init()
87 {
88 if(__opnfiles__[1]==NULL)
89 {
90 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
91 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
92 uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,19200,PB10,PB11,-1,-1);
93 uartmkstreamdev(uart,fd1);
94 __opnfiles__[1] = fd1; //stdo
95 __opnfiles__[0] = fd1; //stdi
96 }
97 else
98 {
99 uartopenandconfig(2,uartparitynone | uart8bits | uartonestop,115200,PB10,PB11,-1,-1);
100 }
101 }
102
103 void bsp_spi_init()
104 {
105
106 }
107
108
109 void bsp_iic_init()
110 {
111
112 }
113
114 void bsp_SD_init()
115 {
116
117 }
118
119
120 void vs10XXclearXCS(){}
121 void vs10XXsetXCS(){}
122 int vs10XXDREQ()
123 {
124 return 1;
125 }
126
127
128 void bsppowersdcard(char onoff) //always ON
129 {
130
131 }
132
133 char bspsdcardpresent()
134 {
135 return 0;
136 }
137
138 char bspsdcardwriteprotected()
139 {
140 return 0;
141 }
142
143 void bspsdcardselect(char YESNO)
144 {
145
146 }
147
148
149
150
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #ifndef BSP_H
23 #define BSP_H
24 #include <stm32f4xx.h>
25 #include <gpio.h>
26 #include <ili9328.h>
27 #include <genericLCD_Controler.h>
28 /*
29 #ifndef PD12
30 #define PD12
31 #endif
32 #ifndef PD13
33 #define PD13
34 #endif
35 */
36 #define __MAX_OPENED_FILES__ 32
37 #define __FS_ROOT_SIZE__ 32
38
39 #define LED1 PD12
40 #define LED2 PD13
41
42 #define LCD_RESET PD10
43 #define LCD_BACKL PE11
44 #define LCD_RS PE4
45 #define LCD_CS PD7
46
47
48 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
49 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
50
51
52 extern float VREF0;
53 extern LCD_t lcd0;
54 extern uint32_t OSC0;
55 extern uint32_t currentCpuFreq;
56
57
58
59 extern int bsp_init();
60
61 extern void bsp_GPIO_init();
62 extern void bsp_uart_init();
63 extern void bsp_iic_init();
64 extern void bsp_spi_init();
65 extern void bsp_SD_init();
66 extern int bsp_FSMC_init();
67
68 /* VS1053 */
69 extern void clearXCS();
70 extern void setXCS();
71 extern int vs10XXDREQ();
72
73 /* SD CARD */
74 void bsppowersdcard(char onoff);
75 char bspsdcardpresent();
76 void bspsdcardselect(char YESNO);
77 char bspsdcardwriteprotected();
78
79 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data);
80 uint32_t bsp_lcd0_read_reg(uint32_t reg);
81 void bsp_lcd0_writeGRAM(void *buffer, uint32_t count);
82 void bsp_lcd0_readGRAM(void *buffer, uint32_t count);
83
84
85 #endif
86
87
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1 CPU=stm32f4xxxG
2 DEFINES+=BSP=\\\"STM32F4Discovery_35LCD\\\"
3 UCMODEL=stm32f4
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #include "bsp.h"
23 #include <streamdevices.h>
24 #include <malloc.h>
25 #include <gpio.h>
26 #include <uart.h>
27 #include <stdio.h>
28 #include <stm32f4xx_gpio.h>
29 #include <stm32f4xx_fsmc.h>
30 #include <stm32f4xx_rcc.h>
31 #include <i2c.h>
32 #include <core.h>
33 #include <terminal.h>
34
35
36 #define clr_RS gpioclr(LCD_RS)
37 #define set_RS gpioset(LCD_RS)
38
39 #define clr_CS gpioclr(LCD_CS)
40 #define set_CS gpioset(LCD_CS)
41
42 volatile int8_t* lcd0_CMD=(volatile int8_t*)0x60000000;
43 volatile int16_t* lcd0_CMD16=(volatile int16_t*)0x60000000;
44 volatile int8_t* lcd0_DATA=(volatile int8_t*)0x61FFFFF0;
45 volatile int16_t* lcd0_DATA16=(volatile int16_t*)0x61FFFFF0;
46
47 /*
48 D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7
49 D5 PE8 D6 PE9 D7 PE10
50 A20 PE4 = RS FSMC_NE1 PD7 CS FSMC_NWE PD5 W/S
51 FSMC_NOE PD4 RD
52 */
53
54 int bsp_FSMC_init()
55 {
56
57 gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
58 ,PD4,PD5};
59 // gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
60 // ,PD4,PD5,PD7,PE4};
61 for(int i=0;i<10;i++)
62 {
63 gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
64 LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
65 gpiosetconfig(&LCD_DBx);
66 GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
67 }
68
69 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
70 FSMC_NORSRAMTimingInitTypeDef p;
71
72 /* Enable FSMC clock */
73 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
74
75 /*-- FSMC Configuration ------------------------------------------------------*/
76 /*----------------------- SRAM Bank 3 ----------------------------------------*/
77 /* FSMC_Bank1_NORSRAM4 configuration */
78 p.FSMC_AddressSetupTime = 1;//3
79 p.FSMC_AddressHoldTime = 1;//3
80 //ili9328 -> data setup time > 10ns
81 p.FSMC_DataSetupTime = 6;
82 p.FSMC_CLKDivision = 3;
83 if(getCpuFreq()>=100*1000*1000)
84 {
85 p.FSMC_CLKDivision = 3;
86 p.FSMC_DataSetupTime = 6;// 11;
87 }
88 p.FSMC_BusTurnAroundDuration = 0;
89 p.FSMC_DataLatency = 3;
90 //ili9328 -> data hold time > 15ns
91 if(getCpuFreq()>66*1000*1000)
92 p.FSMC_DataLatency = 3;
93 p.FSMC_AccessMode = FSMC_AccessMode_D;
94
95
96 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
97 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
98 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
99 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
100 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
101 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
102 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
103 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
104 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
105 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
106 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
107 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; //Dis
108 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
109 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
110 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
111
112 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
113
114 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
115 gpioset(LCD_RESET);
116 gpioclr(LCD_RESET);
117 delay_100us(500);
118 gpioset(LCD_RESET);
119 delay_100us(500);
120 lcd0.init(&lcd0);
121 gpioset(LCD_BACKL);
122 return 1;
123 }
124
125
126
127 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
128 {
129 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
130 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
131 *lcd0_CMD=pt8[3];
132 *lcd0_CMD=pt8[2];
133 pt8 = (uint8_t*)(void*)&data;
134 *lcd0_DATA=pt8[3];
135 *lcd0_DATA=pt8[2];
136 #else
137 clr_CS;
138 clr_RS;
139 *lcd0_CMD=pt8[1];
140 *lcd0_CMD=pt8[0];
141 set_RS;
142 pt8 = (uint8_t*)(void*)&data;
143 *lcd0_DATA=pt8[1];
144 *lcd0_DATA=pt8[0];
145 set_CS;
146 #endif
147
148 }
149
150 uint32_t bsp_lcd0_read_reg(uint32_t reg)
151 {
152 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
153 uint32_t DATA=0;
154
155 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
156 *lcd0_CMD=pt8[3];
157 *lcd0_CMD=pt8[2];
158 pt8 = (uint8_t*)(void*)&DATA;
159 pt8[3]=*lcd0_DATA;
160 pt8[2]=*lcd0_DATA;
161 #else
162 clr_CS;
163 clr_RS;
164 *lcd0_CMD=pt8[1];
165 *lcd0_CMD=pt8[0];
166 set_RS;
167 pt8 = (uint8_t*)(void*)&DATA;
168 pt8[1]=*lcd0_DATA;
169 pt8[0]=*lcd0_DATA;
170 set_CS;
171 #endif
172
173 return DATA;
174 }
175
176 void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
177 {
178 uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
179 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
180 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
181 *lcd0_CMD=pt8[3];
182 *lcd0_CMD=pt8[2];
183 pt8 = (uint8_t*)(void*)buffer;
184 for(int i=0;i<(int)count;i++)
185 {
186 *lcd0_DATA=pt8[(2*i) +1];
187 *lcd0_DATA=pt8[2*i];
188 }
189 #else
190 clr_CS;
191 clr_RS;
192 *lcd0_CMD=pt8[1];
193 *lcd0_CMD=pt8[0];
194 set_RS;
195 pt8 = (uint8_t*)(void*)buffer;
196 for(int i=0;i<(int)count;i++)
197 {
198
199 *lcd0_DATA=pt8[(2*i) +1];
200 *lcd0_DATA=pt8[2*i];
201 }
202 set_CS;
203 #endif
204 }
205
206
207 void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
208 {
209 //uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
210 volatile uint8_t* pt8;// = (uint8_t*)(void*)&reg;
211 /* #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
212 *lcd0_CMD=pt8[3];
213 *lcd0_CMD=pt8[2];
214 pt8 = (uint8_t*)(void*)buffer;
215 for(int i=0;i<(int)count;i++)
216 {
217 pt8[(2*i) +1]=*lcd0_DATA;
218 pt8[2*i]=*lcd0_DATA;
219 }
220 #else
221 *lcd0_CMD=(uint8_t)0;
222 *lcd0_CMD=(uint8_t)0;
223 *lcd0_CMD=(uint8_t)0;
224 *lcd0_CMD=(uint8_t)0;
225 *lcd0_CMD=pt8[1];
226 *lcd0_CMD=pt8[0];
227 pt8 = (uint8_t*)buffer;*/
228 /*
229 * x dummy reads Cf ili9328 datasheet p79!
230 */
231 /* pt8[0]=*lcd0_DATA;
232 pt8[1]=*lcd0_DATA;
233
234 for(int i=0;i<(int)count;i++)
235 {
236 pt8[(2*i) +1]=*lcd0_DATA;
237 pt8[2*i]=*lcd0_DATA;
238 pt8[(2*i) +1]=*lcd0_DATA;
239 pt8[2*i]=*lcd0_DATA;
240 }
241 #endif*/
242 //clr_CS;
243 //clr_RS;
244 //*lcd0_CMD=(int8_t)0;
245 //*lcd0_CMD=(int8_t)0x22;
246 // *lcd0_CMD=(int8_t)0x00;
247 //set_RS;
248 pt8 = (uint8_t*)buffer;
249 //pt8[1]=*lcd0_DATA;
250 //pt8[0]=*lcd0_DATA;
251 pt8[0]=0xFF;
252 pt8[1]=0xFF;
253 /* for(int i=0;i<(int)count;i++)
254 {
255 pt8[(2*i)+1]= *lcd0_DATA;
256 pt8[2*i]= *lcd0_DATA;
257 }*/
258 set_CS;
259 }
260
261
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@@ -0,0 +1,110
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef D51E5TA7601_H
23 #define D51E5TA7601_H
24
25 /**
26 @todo Make an abstract layer for framebuffer devices and a painting api for it.
27 */
28
29
30 #include <genericLCD_Controler.h>
31
32 /**
33 * @brief ili9328init
34 * @param LCD
35 * @return
36 */
37
38 extern int D51E5TA7601init(struct LCD_t* LCD);
39 extern void D51E5TA7601setFrame(LCD_t* LCD,uint16_t X,uint16_t Y,uint16_t W,uint16_t H);
40 extern void D51E5TA7601setGRAMaddress(LCD_t* LCD,uint16_t Haddress,uint16_t Vaddress);
41 extern void D51E5TA7601paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
42 extern void D51E5TA7601paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
43 extern void D51E5TA7601paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
44 extern void D51E5TA7601paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
45 extern void D51E5TA7601paintFilCircMidPoint(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
46 extern void D51E5TA7601getPix(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
47 extern void D51E5TA7601refreshenable(struct LCD_t* LCD,int enable);
48 extern void D51E5TA7601paintChar(LCD_t* LCD,char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color);
49
50 #define ILI9328_REGISTER_DRIVERCODEREAD ((uint32_t) 0x0000 )
51 #define ILI9328_REGISTER_DRIVEROUTPUTCONTROL1 ((uint32_t) 0x0001 )
52 #define ILI9328_REGISTER_LCDDRIVINGCONTROL ((uint32_t) 0x0002 )
53 #define ILI9328_REGISTER_ENTRYMODE ((uint32_t) 0x0003 )
54 #define ILI9328_REGISTER_RESIZECONTROL ((uint32_t) 0x0004 )
55 #define ILI9328_REGISTER_DISPLAYCONTROL1 ((uint32_t) 0x0007 )
56 #define ILI9328_REGISTER_DISPLAYCONTROL2 ((uint32_t) 0x0008 )
57 #define ILI9328_REGISTER_DISPLAYCONTROL3 ((uint32_t) 0x0009 )
58 #define ILI9328_REGISTER_DISPLAYCONTROL4 ((uint32_t) 0x000A )
59 #define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL1 ((uint32_t) 0x000C )
60 #define ILI9328_REGISTER_FRAMEMAKERPOSITION ((uint32_t) 0x000D )
61 #define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL2 ((uint32_t) 0x000F )
62 #define ILI9328_REGISTER_POWERCONTROL1 ((uint32_t) 0x0010 )
63 #define ILI9328_REGISTER_POWERCONTROL2 ((uint32_t) 0x0011 )
64 #define ILI9328_REGISTER_POWERCONTROL3 ((uint32_t) 0x0012 )
65 #define ILI9328_REGISTER_POWERCONTROL4 ((uint32_t) 0x0013 )
66 #define ILI9328_REGISTER_HORIZONTALGRAMADDRESSSET ((uint32_t) 0x0020 )
67 #define ILI9328_REGISTER_VERTICALGRAMADDRESSSET ((uint32_t) 0x0021 )
68 #define ILI9328_REGISTER_WRITEDATATOGRAM ((uint32_t) 0x0022 )
69 #define ILI9328_REGISTER_POWERCONTROL7 ((uint32_t) 0x0029 )
70 #define ILI9328_REGISTER_FRAMERATEANDCOLORCONTROL ((uint32_t) 0x002B )
71 #define ILI9328_REGISTER_GAMMACONTROL1 ((uint32_t) 0x0030 )
72 #define ILI9328_REGISTER_GAMMACONTROL2 ((uint32_t) 0x0031 )
73 #define ILI9328_REGISTER_GAMMACONTROL3 ((uint32_t) 0x0032 )
74 #define ILI9328_REGISTER_GAMMACONTROL4 ((uint32_t) 0x0035 )
75 #define ILI9328_REGISTER_GAMMACONTROL5 ((uint32_t) 0x0036 )
76 #define ILI9328_REGISTER_GAMMACONTROL6 ((uint32_t) 0x0037 )
77 #define ILI9328_REGISTER_GAMMACONTROL7 ((uint32_t) 0x0038 )
78 #define ILI9328_REGISTER_GAMMACONTROL8 ((uint32_t) 0x0039 )
79 #define ILI9328_REGISTER_GAMMACONTROL9 ((uint32_t) 0x003C )
80 #define ILI9328_REGISTER_GAMMACONTROL10 ((uint32_t) 0x003D )
81 #define ILI9328_REGISTER_HORIZONTALADDRESSSTARTPOSITION ((uint32_t) 0x0050 )
82 #define ILI9328_REGISTER_HORIZONTALADDRESSENDPOSITION ((uint32_t) 0x0051 )
83 #define ILI9328_REGISTER_VERTICALADDRESSSTARTPOSITION ((uint32_t) 0x0052 )
84 #define ILI9328_REGISTER_VERTICALADDRESSENDPOSITION ((uint32_t) 0x0053 )
85 #define ILI9328_REGISTER_DRIVEROUTPUTCONTROL2 ((uint32_t) 0x0060 )
86 #define ILI9328_REGISTER_BASEIMAGEDISPLAYCONTROL ((uint32_t) 0x0061 )
87 #define ILI9328_REGISTER_VERTICALSCROLLCONTROL ((uint32_t) 0x006A )
88 #define ILI9328_REGISTER_PARTIALIMAGE1DISPLAYPOSITION ((uint32_t) 0x0080 )
89 #define ILI9328_REGISTER_PARTIALIMAGE1AREASTARTLINE ((uint32_t) 0x0081 )
90 #define ILI9328_REGISTER_PARTIALIMAGE1AREAENDLINE ((uint32_t) 0x0082 )
91 #define ILI9328_REGISTER_PARTIALIMAGE2DISPLAYPOSITION ((uint32_t) 0x0083 )
92 #define ILI9328_REGISTER_PARTIALIMAGE2AREASTARTLINE ((uint32_t) 0x0084 )
93 #define ILI9328_REGISTER_PARTIALIMAGE2AREAENDLINE ((uint32_t) 0x0085 )
94 #define ILI9328_REGISTER_PANELINTERFACECONTROL1 ((uint32_t) 0x0090 )
95 #define ILI9328_REGISTER_PANELINTERFACECONTROL2 ((uint32_t) 0x0092 )
96 #define ILI9328_REGISTER_PANELINTERFACECONTROL4 ((uint32_t) 0x0095 )
97 #define ILI9328_REGISTER_OTPVCMPROGRAMMINGCONTROL ((uint32_t) 0x00A1 )
98 #define ILI9328_REGISTER_OTPVCMSTATUSANDENABLE ((uint32_t) 0x00A2 )
99 #define ILI9328_REGISTER_OTPPROGRAMMINGIDKEY ((uint32_t) 0x00A5 )
100
101 #ifdef _PRVATE_D51E5TA7601_
102 void ili9328cpFrame(LCD_t* LCD,void* buffer,int x,int y,int w, int h);
103 #endif
104
105 #endif
106
107
108
109
110
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef PAINTER_H
23 #define PAINTER_H
24 #include <stdint.h>
25 #include <surface.h>
26
27 typedef struct painter
28 {
29 surface* __surface__;
30 void (*paint)(void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
31 void (*paintText)(char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
32 void (*paintFilRect)(uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
33 void (*paintFilCirc)(uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
34 void (*paintRect)(uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
35 void (*paintCirc)(uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
36 void (*getPix)(uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
37 void (*paintChar)(char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color);
38
39 } painter;
40
41
42
43
44
45
46 #endif
47
48
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef WIDGET_H
23 #define WIDGET_H
24 #include <stdint.h>
25
26 typedef struct widget
27 {
28 uint16_t Width;
29 uint16_t Height;
30 uint16_t Xpos;
31 uint16_t Ypos;
32 void (*paint)();
33 } widget;
34
35
36
37
38
39
40 #endif
41
42
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef SURFACE_H
23 #define SURFACE_H
24 #include <stdint.h>
25
26 typedef struct surface
27 {
28 uint16_t Width;
29 uint16_t Height;
30 uint16_t Xpos;
31 uint16_t Ypos;
32 void (*paint)();
33 } surface;
34
35
36
37
38
39
40 #endif
41
42
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef WIDGET_H
23 #define WIDGET_H
24 #include <stdint.h>
25
26 typedef struct widget
27 {
28 uint16_t Width;
29 uint16_t Height;
30 uint16_t Xpos;
31 uint16_t Ypos;
32 void (*paint)();
33 } widget;
34
35
36
37
38
39
40 #endif
41
42
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef PAINTING_H
23 #define PAINTING_H
24
25 #include <genericLCD_Controler.h>
26
27 /**
28 * @brief ili9328init
29 * @param LCD
30 * @return
31 */
32
33 extern void paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
34 extern void paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
35 extern void paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
36 extern void paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
37 extern void paintRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
38 extern void paintCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
39 extern void getPix(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
40 extern void paintChar(LCD_t* LCD,char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color);
41
42
43 #endif
44
45
46
47
48
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1 CPU=stm32f4xxxG
2 DEFINES+=BSP=\\\"STM32F4Discovery_35LCD\\\"
3 UCMODEL=stm32f4
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1 /* File: startup_ARMCM4.S
2 * Purpose: startup file for Cortex-M4 devices. Should use with
3 * GCC for ARM Embedded Processors
4 * Version: V2.0
5 * Date: 16 August 2013
6 *
7 /* Copyright (c) 2011 - 2013 ARM LIMITED
8
9 All rights reserved.
10 Redistribution and use in source and binary forms, with or without
11 modification, are permitted provided that the following conditions are met:
12 - Redistributions of source code must retain the above copyright
13 notice, this list of conditions and the following disclaimer.
14 - Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17 - Neither the name of ARM nor the names of its contributors may be used
18 to endorse or promote products derived from this software without
19 specific prior written permission.
20 *
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32 ---------------------------------------------------------------------------*/
33 /*
34 2013 Modified for libuc2 use by Alexis Jeandet.
35 */
36 .syntax unified
37 .cpu cortex-m4
38 .fpu fpv4-sp-d16
39
40 .section .stack
41 .align 3
42 #ifdef __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
44 #else
45 .equ Stack_Size, 0x2000
46 #endif
47 .globl __StackTop
48 .globl __StackLimit
49 __StackLimit:
50 .space Stack_Size
51 .size __StackLimit, . - __StackLimit
52 __StackTop:
53 .size __StackTop, . - __StackTop
54
55 .section .heap
56 .align 3
57 #ifdef __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
59 #else
60 .equ Heap_Size, 0x2000
61 #endif
62 .globl __HeapBase
63 .globl __HeapLimit
64 __HeapBase:
65 .if Heap_Size
66 .space Heap_Size
67 .endif
68 .size __HeapBase, . - __HeapBase
69 __HeapLimit:
70 .size __HeapLimit, . - __HeapLimit
71
72 .section .isr_vector
73 .align 2
74 .globl __isr_vector
75 __isr_vector:
76 .long __StackTop /* Top of Stack */
77 .long Reset_Handler /* Reset Handler */
78 .long NMI_Handler /* NMI Handler */
79 .long HardFault_Handler /* Hard Fault Handler */
80 .long MemManage_Handler /* MPU Fault Handler */
81 .long BusFault_Handler /* Bus Fault Handler */
82 .long UsageFault_Handler /* Usage Fault Handler */
83 .long 0 /* Reserved */
84 .long 0 /* Reserved */
85 .long 0 /* Reserved */
86 .long 0 /* Reserved */
87 .long SVC_Handler /* SVCall Handler */
88 .long DebugMon_Handler /* Debug Monitor Handler */
89 .long 0 /* Reserved */
90 .long PendSV_Handler /* PendSV Handler */
91 .long SysTick_Handler /* SysTick Handler */
92
93 /* External interrupts */
94 .word WWDG_IRQHandler /* Window WatchDog */
95 .word PVD_IRQHandler /* PVD through EXTI Line detection */
96 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
97 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
98 .word FLASH_IRQHandler /* FLASH */
99 .word RCC_IRQHandler /* RCC */
100 .word EXTI0_IRQHandler /* EXTI Line0 */
101 .word EXTI1_IRQHandler /* EXTI Line1 */
102 .word EXTI2_IRQHandler /* EXTI Line2 */
103 .word EXTI3_IRQHandler /* EXTI Line3 */
104 .word EXTI4_IRQHandler /* EXTI Line4 */
105 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
106 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
107 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
108 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
109 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
110 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
111 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
112 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
113 .word CAN1_TX_IRQHandler /* CAN1 TX */
114 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
115 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
116 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
117 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
118 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
119 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
120 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
121 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
122 .word TIM2_IRQHandler /* TIM2 */
123 .word TIM3_IRQHandler /* TIM3 */
124 .word TIM4_IRQHandler /* TIM4 */
125 .word I2C1_EV_IRQHandler /* I2C1 Event */
126 .word I2C1_ER_IRQHandler /* I2C1 Error */
127 .word I2C2_EV_IRQHandler /* I2C2 Event */
128 .word I2C2_ER_IRQHandler /* I2C2 Error */
129 .word SPI1_IRQHandler /* SPI1 */
130 .word SPI2_IRQHandler /* SPI2 */
131 .word USART1_IRQHandler /* USART1 */
132 .word USART2_IRQHandler /* USART2 */
133 .word USART3_IRQHandler /* USART3 */
134 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
135 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
136 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
137 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
138 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
139 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
140 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
141 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
142 .word FSMC_IRQHandler /* FSMC */
143 .word SDIO_IRQHandler /* SDIO */
144 .word TIM5_IRQHandler /* TIM5 */
145 .word SPI3_IRQHandler /* SPI3 */
146 .word UART4_IRQHandler /* UART4 */
147 .word UART5_IRQHandler /* UART5 */
148 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
149 .word TIM7_IRQHandler /* TIM7 */
150 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
151 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
152 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
153 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
154 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
155 .word ETH_IRQHandler /* Ethernet */
156 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
157 .word CAN2_TX_IRQHandler /* CAN2 TX */
158 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
159 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
160 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
161 .word OTG_FS_IRQHandler /* USB OTG FS */
162 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
163 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
164 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
165 .word USART6_IRQHandler /* USART6 */
166 .word I2C3_EV_IRQHandler /* I2C3 event */
167 .word I2C3_ER_IRQHandler /* I2C3 error */
168 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
169 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
170 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
171 .word OTG_HS_IRQHandler /* USB OTG HS */
172 .word DCMI_IRQHandler /* DCMI */
173 .word CRYP_IRQHandler /* CRYP crypto */
174 .word HASH_RNG_IRQHandler /* Hash and Rng */
175 .word FPU_IRQHandler /* FPU */
176
177
178 .size __isr_vector, . - __isr_vector
179
180 .text
181 .thumb
182 .thumb_func
183 .align 2
184 .globl Reset_Handler
185 .type Reset_Handler, %function
186 Reset_Handler:
187 /* Firstly it copies data from read only memory to RAM. There are two schemes
188 * to copy. One can copy more than one sections. Another can only copy
189 * one section. The former scheme needs more instructions and read-only
190 * data to implement than the latter.
191 * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
192
193 /* Single section scheme.
194 *
195 * The ranges of copy from/to are specified by following symbols
196 * __etext: LMA of start of the section to copy from. Usually end of text
197 * __data_start__: VMA of start of the section to copy to
198 * __data_end__: VMA of end of the section to copy to
199 *
200 * All addresses must be aligned to 4 bytes boundary.
201 */
202 ldr r1, =__etext
203 ldr r2, =__data_start__
204 ldr r3, =__data_end__
205
206 .L_loop1:
207 cmp r2, r3
208 ittt lt
209 ldrlt r0, [r1], #4
210 strlt r0, [r2], #4
211 blt .L_loop1
212
213 /* This part of work usually is done in C library startup code. Otherwise,
214 * define this macro to enable it in this startup.
215 *
216 * There are two schemes too. One can clear multiple BSS sections. Another
217 * can only clear one section. The former is more size expensive than the
218 * latter.
219 *
220 * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
221 * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
222 */
223
224 /* Single BSS section scheme.
225 *
226 * The BSS section is specified by following symbols
227 * __bss_start__: start of the BSS section.
228 * __bss_end__: end of the BSS section.
229 *
230 * Both addresses must be aligned to 4 bytes boundary.
231 */
232 ldr r1, =__bss_start__
233 ldr r2, =__bss_end__
234
235 movs r0, 0
236 .L_loop3:
237 cmp r1, r2
238 itt lt
239 strlt r0, [r1], #4
240 blt .L_loop3
241
242 bl main
243
244
245 .pool
246 .size Reset_Handler, . - Reset_Handler
247
248 .align 1
249 .thumb_func
250 .weak Default_Handler
251 .type Default_Handler, %function
252 Default_Handler:
253 b .
254 .size Default_Handler, . - Default_Handler
255
256 /* Macro to define default handlers. Default handler
257 * will be weak symbol and just dead loops. They can be
258 * overwritten by other handlers */
259 .macro def_irq_handler handler_name
260 .weak \handler_name
261 .set \handler_name, Default_Handler
262 .endm
263
264 def_irq_handler NMI_Handler
265 def_irq_handler HardFault_Handler
266 def_irq_handler MemManage_Handler
267 def_irq_handler BusFault_Handler
268 def_irq_handler UsageFault_Handler
269 def_irq_handler SVC_Handler
270 def_irq_handler DebugMon_Handler
271 def_irq_handler PendSV_Handler
272 def_irq_handler SysTick_Handler
273 def_irq_handler DEF_IRQHandler
274
275 def_irq_handler WWDG_IRQHandler
276 def_irq_handler PVD_IRQHandler
277 def_irq_handler TAMP_STAMP_IRQHandler
278 def_irq_handler RTC_WKUP_IRQHandler
279 def_irq_handler FLASH_IRQHandler
280 def_irq_handler RCC_IRQHandler
281 def_irq_handler EXTI0_IRQHandler
282 def_irq_handler EXTI1_IRQHandler
283 def_irq_handler EXTI2_IRQHandler
284 def_irq_handler EXTI3_IRQHandler
285 def_irq_handler EXTI4_IRQHandler
286 def_irq_handler DMA1_Stream0_IRQHandler
287 def_irq_handler DMA1_Stream1_IRQHandler
288 def_irq_handler DMA1_Stream2_IRQHandler
289 def_irq_handler DMA1_Stream3_IRQHandler
290 def_irq_handler DMA1_Stream4_IRQHandler
291 def_irq_handler DMA1_Stream5_IRQHandler
292 def_irq_handler DMA1_Stream6_IRQHandler
293 def_irq_handler ADC_IRQHandler
294 def_irq_handler CAN1_TX_IRQHandler
295 def_irq_handler CAN1_RX0_IRQHandler
296 def_irq_handler CAN1_RX1_IRQHandler
297 def_irq_handler CAN1_SCE_IRQHandler
298 def_irq_handler EXTI9_5_IRQHandler
299 def_irq_handler TIM1_BRK_TIM9_IRQHandler
300 def_irq_handler TIM1_UP_TIM10_IRQHandler
301 def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler
302 def_irq_handler TIM1_CC_IRQHandler
303 def_irq_handler TIM2_IRQHandler
304 def_irq_handler TIM3_IRQHandler
305 def_irq_handler TIM4_IRQHandler
306 def_irq_handler I2C1_EV_IRQHandler
307 def_irq_handler I2C1_ER_IRQHandler
308 def_irq_handler I2C2_EV_IRQHandler
309 def_irq_handler I2C2_ER_IRQHandler
310 def_irq_handler SPI1_IRQHandler
311 def_irq_handler SPI2_IRQHandler
312 def_irq_handler USART1_IRQHandler
313 def_irq_handler USART2_IRQHandler
314 def_irq_handler USART3_IRQHandler
315 def_irq_handler EXTI15_10_IRQHandler
316 def_irq_handler RTC_Alarm_IRQHandler
317 def_irq_handler OTG_FS_WKUP_IRQHandler
318 def_irq_handler TIM8_BRK_TIM12_IRQHandler
319 def_irq_handler TIM8_UP_TIM13_IRQHandler
320 def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler
321 def_irq_handler TIM8_CC_IRQHandler
322 def_irq_handler DMA1_Stream7_IRQHandler
323 def_irq_handler FSMC_IRQHandler
324 def_irq_handler SDIO_IRQHandler
325 def_irq_handler TIM5_IRQHandler
326 def_irq_handler SPI3_IRQHandler
327 def_irq_handler UART4_IRQHandler
328 def_irq_handler UART5_IRQHandler
329 def_irq_handler TIM6_DAC_IRQHandler
330 def_irq_handler TIM7_IRQHandler
331 def_irq_handler DMA2_Stream0_IRQHandler
332 def_irq_handler DMA2_Stream1_IRQHandler
333 def_irq_handler DMA2_Stream2_IRQHandler
334 def_irq_handler DMA2_Stream3_IRQHandler
335 def_irq_handler DMA2_Stream4_IRQHandler
336 def_irq_handler ETH_IRQHandler
337 def_irq_handler ETH_WKUP_IRQHandler
338 def_irq_handler CAN2_TX_IRQHandler
339 def_irq_handler CAN2_RX0_IRQHandler
340 def_irq_handler CAN2_RX1_IRQHandler
341 def_irq_handler CAN2_SCE_IRQHandler
342 def_irq_handler OTG_FS_IRQHandler
343 def_irq_handler DMA2_Stream5_IRQHandler
344 def_irq_handler DMA2_Stream6_IRQHandler
345 def_irq_handler DMA2_Stream7_IRQHandler
346 def_irq_handler USART6_IRQHandler
347 def_irq_handler I2C3_EV_IRQHandler
348 def_irq_handler I2C3_ER_IRQHandler
349 def_irq_handler OTG_HS_EP1_OUT_IRQHandler
350 def_irq_handler OTG_HS_EP1_IN_IRQHandler
351 def_irq_handler OTG_HS_WKUP_IRQHandler
352 def_irq_handler OTG_HS_IRQHandler
353 def_irq_handler DCMI_IRQHandler
354 def_irq_handler CRYP_IRQHandler
355 def_irq_handler HASH_RNG_IRQHandler
356 def_irq_handler FPU_IRQHandler
357
358 .end
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@@ -0,0 +1,216
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
35 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0
36 BANK1_SRAM2 (!ixrw): ORIGIN = 0x64000000, LENGTH = 64M
37 }
38
39 /* Linker script to place sections and symbol values. Should be used together
40 * with other linker script that defines memory regions FLASH and RAM.
41 * It references following symbols, which must be defined in code:
42 * Reset_Handler : Entry of reset handler
43 *
44 * It defines following symbols, which code can use without definition:
45 * __exidx_start
46 * __exidx_end
47 * __copy_table_start__
48 * __copy_table_end__
49 * __zero_table_start__
50 * __zero_table_end__
51 * __etext
52 * __data_start__
53 * __preinit_array_start
54 * __preinit_array_end
55 * __init_array_start
56 * __init_array_end
57 * __fini_array_start
58 * __fini_array_end
59 * __data_end__
60 * __bss_start__
61 * __bss_end__
62 * __end__
63 * end
64 * __HeapLimit
65 * __StackLimit
66 * __StackTop
67 * __stack
68 */
69 ENTRY(Reset_Handler)
70
71 SECTIONS
72 {
73 .text :
74 {
75 KEEP(*(.isr_vector))
76 *(.text*)
77
78 *(.init)
79 *(.fini)
80
81 /* .ctors */
82 *crtbegin.o(.ctors)
83 *crtbegin?.o(.ctors)
84 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
85 *(SORT(.ctors.*))
86 *(.ctors)
87
88 /* .dtors */
89 *crtbegin.o(.dtors)
90 *crtbegin?.o(.dtors)
91 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
92 *(SORT(.dtors.*))
93 *(.dtors)
94
95 *(.rodata*)
96
97 *(.eh_frame*)
98 } > FLASH
99
100 .ARM.extab :
101 {
102 *(.ARM.extab* .gnu.linkonce.armextab.*)
103 } > FLASH
104
105 __exidx_start = .;
106 .ARM.exidx :
107 {
108 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
109 } > FLASH
110 __exidx_end = .;
111
112 /* To copy multiple ROM to RAM sections,
113 * uncomment .copy.table section and,
114 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
115 /*
116 .copy.table :
117 {
118 . = ALIGN(4);
119 __copy_table_start__ = .;
120 LONG (__etext)
121 LONG (__data_start__)
122 LONG (__data_end__ - __data_start__)
123 LONG (__etext2)
124 LONG (__data2_start__)
125 LONG (__data2_end__ - __data2_start__)
126 __copy_table_end__ = .;
127 } > FLASH
128 */
129
130 /* To clear multiple BSS sections,
131 * uncomment .zero.table section and,
132 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
133 /*
134 .zero.table :
135 {
136 . = ALIGN(4);
137 __zero_table_start__ = .;
138 LONG (__bss_start__)
139 LONG (__bss_end__ - __bss_start__)
140 LONG (__bss2_start__)
141 LONG (__bss2_end__ - __bss2_start__)
142 __zero_table_end__ = .;
143 } > FLASH
144 */
145
146 __etext = .;
147
148 .data : AT (__etext)
149 {
150 __data_start__ = .;
151 *(vtable)
152 *(.data*)
153
154 . = ALIGN(4);
155 /* preinit data */
156 PROVIDE_HIDDEN (__preinit_array_start = .);
157 *(.preinit_array)
158 PROVIDE_HIDDEN (__preinit_array_end = .);
159
160 . = ALIGN(4);
161 /* init data */
162 PROVIDE_HIDDEN (__init_array_start = .);
163 *(SORT(.init_array.*))
164 *(.init_array)
165 PROVIDE_HIDDEN (__init_array_end = .);
166
167
168 . = ALIGN(4);
169 /* finit data */
170 PROVIDE_HIDDEN (__fini_array_start = .);
171 *(SORT(.fini_array.*))
172 *(.fini_array)
173 PROVIDE_HIDDEN (__fini_array_end = .);
174
175 *(.jcr)
176 . = ALIGN(4);
177 /* All data end */
178 __data_end__ = .;
179
180 } > RAM
181
182 .bss :
183 {
184 . = ALIGN(4);
185 __bss_start__ = .;
186 *(.bss*)
187 *(COMMON)
188 . = ALIGN(4);
189 __bss_end__ = .;
190 } > RAM
191
192 .heap (COPY):
193 {
194 __end__ = .;
195 PROVIDE(end = .);
196 *(.heap*)
197 __HeapLimit = .;
198 } > RAM
199
200 /* .stack_dummy section doesn't contains any symbols. It is only
201 * used for linker to calculate size of stack sections, and assign
202 * values to stack symbols later */
203 .stack_dummy (COPY):
204 {
205 *(.stack*)
206 } > RAM
207
208 /* Set stack top to end of RAM, and stack limit move down by
209 * size of stack_dummy section */
210 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
211 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
212 PROVIDE(__stack = __StackTop);
213
214 /* Check if data + heap + stack exceeds RAM limit */
215 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
216 }
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 ETHRAM (xrw) : ORIGIN = 0x2001C000, LENGTH = 16k
35 AUXRAM (xrw) : ORIGIN = 0x20020000, LENGTH = 64k
36 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
37 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
38 }
39
40 /* Linker script to place sections and symbol values. Should be used together
41 * with other linker script that defines memory regions FLASH and RAM.
42 * It references following symbols, which must be defined in code:
43 * Reset_Handler : Entry of reset handler
44 *
45 * It defines following symbols, which code can use without definition:
46 * __exidx_start
47 * __exidx_end
48 * __copy_table_start__
49 * __copy_table_end__
50 * __zero_table_start__
51 * __zero_table_end__
52 * __etext
53 * __data_start__
54 * __preinit_array_start
55 * __preinit_array_end
56 * __init_array_start
57 * __init_array_end
58 * __fini_array_start
59 * __fini_array_end
60 * __data_end__
61 * __bss_start__
62 * __bss_end__
63 * __end__
64 * end
65 * __HeapLimit
66 * __StackLimit
67 * __StackTop
68 * __stack
69 */
70 ENTRY(Reset_Handler)
71
72 SECTIONS
73 {
74 .text :
75 {
76 KEEP(*(.isr_vector))
77 *(.text*)
78
79 *(.init)
80 *(.fini)
81
82 /* .ctors */
83 *crtbegin.o(.ctors)
84 *crtbegin?.o(.ctors)
85 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
86 *(SORT(.ctors.*))
87 *(.ctors)
88
89 /* .dtors */
90 *crtbegin.o(.dtors)
91 *crtbegin?.o(.dtors)
92 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
93 *(SORT(.dtors.*))
94 *(.dtors)
95
96 *(.rodata*)
97
98 *(.eh_frame*)
99 } > FLASH
100
101 .ARM.extab :
102 {
103 *(.ARM.extab* .gnu.linkonce.armextab.*)
104 } > FLASH
105
106 __exidx_start = .;
107 .ARM.exidx :
108 {
109 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
110 } > FLASH
111 __exidx_end = .;
112
113 /* To copy multiple ROM to RAM sections,
114 * uncomment .copy.table section and,
115 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
116 /*
117 .copy.table :
118 {
119 . = ALIGN(4);
120 __copy_table_start__ = .;
121 LONG (__etext)
122 LONG (__data_start__)
123 LONG (__data_end__ - __data_start__)
124 LONG (__etext2)
125 LONG (__data2_start__)
126 LONG (__data2_end__ - __data2_start__)
127 __copy_table_end__ = .;
128 } > FLASH
129 */
130
131 /* To clear multiple BSS sections,
132 * uncomment .zero.table section and,
133 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
134 /*
135 .zero.table :
136 {
137 . = ALIGN(4);
138 __zero_table_start__ = .;
139 LONG (__bss_start__)
140 LONG (__bss_end__ - __bss_start__)
141 LONG (__bss2_start__)
142 LONG (__bss2_end__ - __bss2_start__)
143 __zero_table_end__ = .;
144 } > FLASH
145 */
146
147 __etext = .;
148
149 .data : AT (__etext)
150 {
151 __data_start__ = .;
152 *(vtable)
153 *(.data*)
154
155 . = ALIGN(4);
156 /* preinit data */
157 PROVIDE_HIDDEN (__preinit_array_start = .);
158 *(.preinit_array)
159 PROVIDE_HIDDEN (__preinit_array_end = .);
160
161 . = ALIGN(4);
162 /* init data */
163 PROVIDE_HIDDEN (__init_array_start = .);
164 *(SORT(.init_array.*))
165 *(.init_array)
166 PROVIDE_HIDDEN (__init_array_end = .);
167
168
169 . = ALIGN(4);
170 /* finit data */
171 PROVIDE_HIDDEN (__fini_array_start = .);
172 *(SORT(.fini_array.*))
173 *(.fini_array)
174 PROVIDE_HIDDEN (__fini_array_end = .);
175
176 *(.jcr)
177 . = ALIGN(4);
178 /* All data end */
179 __data_end__ = .;
180
181 } > RAM
182
183 .bss :
184 {
185 . = ALIGN(4);
186 __bss_start__ = .;
187 *(.bss*)
188 *(COMMON)
189 . = ALIGN(4);
190 __bss_end__ = .;
191 } > RAM
192
193 .heap (COPY):
194 {
195 __end__ = .;
196 PROVIDE(end = .);
197 *(.heap*)
198 __HeapLimit = .;
199 } > RAM
200
201 /* .stack_dummy section doesn't contains any symbols. It is only
202 * used for linker to calculate size of stack sections, and assign
203 * values to stack symbols later */
204 .stack_dummy (COPY):
205 {
206 *(.stack*)
207 } > RAM
208
209 /* Set stack top to end of RAM, and stack limit move down by
210 * size of stack_dummy section */
211 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
212 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
213 PROVIDE(__stack = __StackTop);
214
215 /* Check if data + heap + stack exceeds RAM limit */
216 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
217 }
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@@ -0,0 +1,44
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #define _PRVATE_D51E5TA7601_
23 #include <D51E5TA7601.h>
24 #include <stdio.h>
25 #include <stddef.h>
26 #include <core.h>
27 #include <math.h>
28 #include <malloc.h>
29
30 #ifdef __OPTIMIZED_MATH
31 #include <optimised_math.h>
32 #endif
33
34
35
36
37
38
39
40
41
42
43
44
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1 TEMPLATE = lib
2 CONFIG += libuc2lib
3 TARGET = D51E5TA7601
4
5 SOURCES += \
6 D51E5TA7601.c
7
8
9
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@@ -0,0 +1,12
1 TEMPLATE = lib
2 CONFIG += libuc2lib
3 TARGET = painting
4
5 SOURCES += \
6 painting.c
7
8 HEADERS += \
9 ../../../../include/GRAPHIC/PAINTING/painting.h
10
11
12
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@@ -0,0 +1,87
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #include <stdio.h>
23 #include <stddef.h>
24 #include <core.h>
25 #include <math.h>
26 #include <malloc.h>
27 #include <genericLCD_Controler.h>
28
29 #ifdef __OPTIMIZED_MATH
30 #include <optimised_math.h>
31 #endif
32
33
34
35
36 void paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height)
37 {
38
39 }
40
41 void paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color)
42 {
43
44 }
45
46 void paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
47 {
48
49 }
50
51 void paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
52 {
53
54 }
55
56 void paintRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
57 {
58
59 }
60
61 void paintCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
62 {
63
64 }
65
66 void getPix(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h)
67 {
68
69 }
70
71 void paintChar(LCD_t* LCD,char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color)
72 {
73
74 }
75
76
77
78
79
80
81
82
83
84
85
86
87
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@@ -0,0 +1,358
1 /* File: startup_ARMCM4.S
2 * Purpose: startup file for Cortex-M4 devices. Should use with
3 * GCC for ARM Embedded Processors
4 * Version: V2.0
5 * Date: 16 August 2013
6 *
7 /* Copyright (c) 2011 - 2013 ARM LIMITED
8
9 All rights reserved.
10 Redistribution and use in source and binary forms, with or without
11 modification, are permitted provided that the following conditions are met:
12 - Redistributions of source code must retain the above copyright
13 notice, this list of conditions and the following disclaimer.
14 - Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17 - Neither the name of ARM nor the names of its contributors may be used
18 to endorse or promote products derived from this software without
19 specific prior written permission.
20 *
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32 ---------------------------------------------------------------------------*/
33 /*
34 2013 Modified for libuc2 use by Alexis Jeandet.
35 */
36 .syntax unified
37 .cpu cortex-m4
38 .fpu fpv4-sp-d16
39
40 .section .stack
41 .align 3
42 #ifdef __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
44 #else
45 .equ Stack_Size, 0x2000
46 #endif
47 .globl __StackTop
48 .globl __StackLimit
49 __StackLimit:
50 .space Stack_Size
51 .size __StackLimit, . - __StackLimit
52 __StackTop:
53 .size __StackTop, . - __StackTop
54
55 .section .heap
56 .align 3
57 #ifdef __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
59 #else
60 .equ Heap_Size, 0x2000
61 #endif
62 .globl __HeapBase
63 .globl __HeapLimit
64 __HeapBase:
65 .if Heap_Size
66 .space Heap_Size
67 .endif
68 .size __HeapBase, . - __HeapBase
69 __HeapLimit:
70 .size __HeapLimit, . - __HeapLimit
71
72 .section .isr_vector
73 .align 2
74 .globl __isr_vector
75 __isr_vector:
76 .long __StackTop /* Top of Stack */
77 .long Reset_Handler /* Reset Handler */
78 .long NMI_Handler /* NMI Handler */
79 .long HardFault_Handler /* Hard Fault Handler */
80 .long MemManage_Handler /* MPU Fault Handler */
81 .long BusFault_Handler /* Bus Fault Handler */
82 .long UsageFault_Handler /* Usage Fault Handler */
83 .long 0 /* Reserved */
84 .long 0 /* Reserved */
85 .long 0 /* Reserved */
86 .long 0 /* Reserved */
87 .long SVC_Handler /* SVCall Handler */
88 .long DebugMon_Handler /* Debug Monitor Handler */
89 .long 0 /* Reserved */
90 .long PendSV_Handler /* PendSV Handler */
91 .long SysTick_Handler /* SysTick Handler */
92
93 /* External interrupts */
94 .word WWDG_IRQHandler /* Window WatchDog */
95 .word PVD_IRQHandler /* PVD through EXTI Line detection */
96 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
97 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
98 .word FLASH_IRQHandler /* FLASH */
99 .word RCC_IRQHandler /* RCC */
100 .word EXTI0_IRQHandler /* EXTI Line0 */
101 .word EXTI1_IRQHandler /* EXTI Line1 */
102 .word EXTI2_IRQHandler /* EXTI Line2 */
103 .word EXTI3_IRQHandler /* EXTI Line3 */
104 .word EXTI4_IRQHandler /* EXTI Line4 */
105 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
106 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
107 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
108 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
109 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
110 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
111 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
112 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
113 .word CAN1_TX_IRQHandler /* CAN1 TX */
114 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
115 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
116 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
117 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
118 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
119 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
120 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
121 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
122 .word TIM2_IRQHandler /* TIM2 */
123 .word TIM3_IRQHandler /* TIM3 */
124 .word TIM4_IRQHandler /* TIM4 */
125 .word I2C1_EV_IRQHandler /* I2C1 Event */
126 .word I2C1_ER_IRQHandler /* I2C1 Error */
127 .word I2C2_EV_IRQHandler /* I2C2 Event */
128 .word I2C2_ER_IRQHandler /* I2C2 Error */
129 .word SPI1_IRQHandler /* SPI1 */
130 .word SPI2_IRQHandler /* SPI2 */
131 .word USART1_IRQHandler /* USART1 */
132 .word USART2_IRQHandler /* USART2 */
133 .word USART3_IRQHandler /* USART3 */
134 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
135 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
136 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
137 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
138 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
139 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
140 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
141 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
142 .word FSMC_IRQHandler /* FSMC */
143 .word SDIO_IRQHandler /* SDIO */
144 .word TIM5_IRQHandler /* TIM5 */
145 .word SPI3_IRQHandler /* SPI3 */
146 .word UART4_IRQHandler /* UART4 */
147 .word UART5_IRQHandler /* UART5 */
148 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
149 .word TIM7_IRQHandler /* TIM7 */
150 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
151 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
152 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
153 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
154 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
155 .word ETH_IRQHandler /* Ethernet */
156 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
157 .word CAN2_TX_IRQHandler /* CAN2 TX */
158 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
159 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
160 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
161 .word OTG_FS_IRQHandler /* USB OTG FS */
162 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
163 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
164 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
165 .word USART6_IRQHandler /* USART6 */
166 .word I2C3_EV_IRQHandler /* I2C3 event */
167 .word I2C3_ER_IRQHandler /* I2C3 error */
168 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
169 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
170 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
171 .word OTG_HS_IRQHandler /* USB OTG HS */
172 .word DCMI_IRQHandler /* DCMI */
173 .word CRYP_IRQHandler /* CRYP crypto */
174 .word HASH_RNG_IRQHandler /* Hash and Rng */
175 .word FPU_IRQHandler /* FPU */
176
177
178 .size __isr_vector, . - __isr_vector
179
180 .text
181 .thumb
182 .thumb_func
183 .align 2
184 .globl Reset_Handler
185 .type Reset_Handler, %function
186 Reset_Handler:
187 /* Firstly it copies data from read only memory to RAM. There are two schemes
188 * to copy. One can copy more than one sections. Another can only copy
189 * one section. The former scheme needs more instructions and read-only
190 * data to implement than the latter.
191 * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
192
193 /* Single section scheme.
194 *
195 * The ranges of copy from/to are specified by following symbols
196 * __etext: LMA of start of the section to copy from. Usually end of text
197 * __data_start__: VMA of start of the section to copy to
198 * __data_end__: VMA of end of the section to copy to
199 *
200 * All addresses must be aligned to 4 bytes boundary.
201 */
202 ldr r1, =__etext
203 ldr r2, =__data_start__
204 ldr r3, =__data_end__
205
206 .L_loop1:
207 cmp r2, r3
208 ittt lt
209 ldrlt r0, [r1], #4
210 strlt r0, [r2], #4
211 blt .L_loop1
212
213 /* This part of work usually is done in C library startup code. Otherwise,
214 * define this macro to enable it in this startup.
215 *
216 * There are two schemes too. One can clear multiple BSS sections. Another
217 * can only clear one section. The former is more size expensive than the
218 * latter.
219 *
220 * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
221 * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
222 */
223
224 /* Single BSS section scheme.
225 *
226 * The BSS section is specified by following symbols
227 * __bss_start__: start of the BSS section.
228 * __bss_end__: end of the BSS section.
229 *
230 * Both addresses must be aligned to 4 bytes boundary.
231 */
232 ldr r1, =__bss_start__
233 ldr r2, =__bss_end__
234
235 movs r0, 0
236 .L_loop3:
237 cmp r1, r2
238 itt lt
239 strlt r0, [r1], #4
240 blt .L_loop3
241
242 bl main
243
244
245 .pool
246 .size Reset_Handler, . - Reset_Handler
247
248 .align 1
249 .thumb_func
250 .weak Default_Handler
251 .type Default_Handler, %function
252 Default_Handler:
253 b .
254 .size Default_Handler, . - Default_Handler
255
256 /* Macro to define default handlers. Default handler
257 * will be weak symbol and just dead loops. They can be
258 * overwritten by other handlers */
259 .macro def_irq_handler handler_name
260 .weak \handler_name
261 .set \handler_name, Default_Handler
262 .endm
263
264 def_irq_handler NMI_Handler
265 def_irq_handler HardFault_Handler
266 def_irq_handler MemManage_Handler
267 def_irq_handler BusFault_Handler
268 def_irq_handler UsageFault_Handler
269 def_irq_handler SVC_Handler
270 def_irq_handler DebugMon_Handler
271 def_irq_handler PendSV_Handler
272 def_irq_handler SysTick_Handler
273 def_irq_handler DEF_IRQHandler
274
275 def_irq_handler WWDG_IRQHandler
276 def_irq_handler PVD_IRQHandler
277 def_irq_handler TAMP_STAMP_IRQHandler
278 def_irq_handler RTC_WKUP_IRQHandler
279 def_irq_handler FLASH_IRQHandler
280 def_irq_handler RCC_IRQHandler
281 def_irq_handler EXTI0_IRQHandler
282 def_irq_handler EXTI1_IRQHandler
283 def_irq_handler EXTI2_IRQHandler
284 def_irq_handler EXTI3_IRQHandler
285 def_irq_handler EXTI4_IRQHandler
286 def_irq_handler DMA1_Stream0_IRQHandler
287 def_irq_handler DMA1_Stream1_IRQHandler
288 def_irq_handler DMA1_Stream2_IRQHandler
289 def_irq_handler DMA1_Stream3_IRQHandler
290 def_irq_handler DMA1_Stream4_IRQHandler
291 def_irq_handler DMA1_Stream5_IRQHandler
292 def_irq_handler DMA1_Stream6_IRQHandler
293 def_irq_handler ADC_IRQHandler
294 def_irq_handler CAN1_TX_IRQHandler
295 def_irq_handler CAN1_RX0_IRQHandler
296 def_irq_handler CAN1_RX1_IRQHandler
297 def_irq_handler CAN1_SCE_IRQHandler
298 def_irq_handler EXTI9_5_IRQHandler
299 def_irq_handler TIM1_BRK_TIM9_IRQHandler
300 def_irq_handler TIM1_UP_TIM10_IRQHandler
301 def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler
302 def_irq_handler TIM1_CC_IRQHandler
303 def_irq_handler TIM2_IRQHandler
304 def_irq_handler TIM3_IRQHandler
305 def_irq_handler TIM4_IRQHandler
306 def_irq_handler I2C1_EV_IRQHandler
307 def_irq_handler I2C1_ER_IRQHandler
308 def_irq_handler I2C2_EV_IRQHandler
309 def_irq_handler I2C2_ER_IRQHandler
310 def_irq_handler SPI1_IRQHandler
311 def_irq_handler SPI2_IRQHandler
312 def_irq_handler USART1_IRQHandler
313 def_irq_handler USART2_IRQHandler
314 def_irq_handler USART3_IRQHandler
315 def_irq_handler EXTI15_10_IRQHandler
316 def_irq_handler RTC_Alarm_IRQHandler
317 def_irq_handler OTG_FS_WKUP_IRQHandler
318 def_irq_handler TIM8_BRK_TIM12_IRQHandler
319 def_irq_handler TIM8_UP_TIM13_IRQHandler
320 def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler
321 def_irq_handler TIM8_CC_IRQHandler
322 def_irq_handler DMA1_Stream7_IRQHandler
323 def_irq_handler FSMC_IRQHandler
324 def_irq_handler SDIO_IRQHandler
325 def_irq_handler TIM5_IRQHandler
326 def_irq_handler SPI3_IRQHandler
327 def_irq_handler UART4_IRQHandler
328 def_irq_handler UART5_IRQHandler
329 def_irq_handler TIM6_DAC_IRQHandler
330 def_irq_handler TIM7_IRQHandler
331 def_irq_handler DMA2_Stream0_IRQHandler
332 def_irq_handler DMA2_Stream1_IRQHandler
333 def_irq_handler DMA2_Stream2_IRQHandler
334 def_irq_handler DMA2_Stream3_IRQHandler
335 def_irq_handler DMA2_Stream4_IRQHandler
336 def_irq_handler ETH_IRQHandler
337 def_irq_handler ETH_WKUP_IRQHandler
338 def_irq_handler CAN2_TX_IRQHandler
339 def_irq_handler CAN2_RX0_IRQHandler
340 def_irq_handler CAN2_RX1_IRQHandler
341 def_irq_handler CAN2_SCE_IRQHandler
342 def_irq_handler OTG_FS_IRQHandler
343 def_irq_handler DMA2_Stream5_IRQHandler
344 def_irq_handler DMA2_Stream6_IRQHandler
345 def_irq_handler DMA2_Stream7_IRQHandler
346 def_irq_handler USART6_IRQHandler
347 def_irq_handler I2C3_EV_IRQHandler
348 def_irq_handler I2C3_ER_IRQHandler
349 def_irq_handler OTG_HS_EP1_OUT_IRQHandler
350 def_irq_handler OTG_HS_EP1_IN_IRQHandler
351 def_irq_handler OTG_HS_WKUP_IRQHandler
352 def_irq_handler OTG_HS_IRQHandler
353 def_irq_handler DCMI_IRQHandler
354 def_irq_handler CRYP_IRQHandler
355 def_irq_handler HASH_RNG_IRQHandler
356 def_irq_handler FPU_IRQHandler
357
358 .end
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@@ -0,0 +1,216
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
35 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0
36 BANK1_SRAM2 (!ixrw): ORIGIN = 0x64000000, LENGTH = 64M
37 }
38
39 /* Linker script to place sections and symbol values. Should be used together
40 * with other linker script that defines memory regions FLASH and RAM.
41 * It references following symbols, which must be defined in code:
42 * Reset_Handler : Entry of reset handler
43 *
44 * It defines following symbols, which code can use without definition:
45 * __exidx_start
46 * __exidx_end
47 * __copy_table_start__
48 * __copy_table_end__
49 * __zero_table_start__
50 * __zero_table_end__
51 * __etext
52 * __data_start__
53 * __preinit_array_start
54 * __preinit_array_end
55 * __init_array_start
56 * __init_array_end
57 * __fini_array_start
58 * __fini_array_end
59 * __data_end__
60 * __bss_start__
61 * __bss_end__
62 * __end__
63 * end
64 * __HeapLimit
65 * __StackLimit
66 * __StackTop
67 * __stack
68 */
69 ENTRY(Reset_Handler)
70
71 SECTIONS
72 {
73 .text :
74 {
75 KEEP(*(.isr_vector))
76 *(.text*)
77
78 *(.init)
79 *(.fini)
80
81 /* .ctors */
82 *crtbegin.o(.ctors)
83 *crtbegin?.o(.ctors)
84 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
85 *(SORT(.ctors.*))
86 *(.ctors)
87
88 /* .dtors */
89 *crtbegin.o(.dtors)
90 *crtbegin?.o(.dtors)
91 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
92 *(SORT(.dtors.*))
93 *(.dtors)
94
95 *(.rodata*)
96
97 *(.eh_frame*)
98 } > FLASH
99
100 .ARM.extab :
101 {
102 *(.ARM.extab* .gnu.linkonce.armextab.*)
103 } > FLASH
104
105 __exidx_start = .;
106 .ARM.exidx :
107 {
108 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
109 } > FLASH
110 __exidx_end = .;
111
112 /* To copy multiple ROM to RAM sections,
113 * uncomment .copy.table section and,
114 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
115 /*
116 .copy.table :
117 {
118 . = ALIGN(4);
119 __copy_table_start__ = .;
120 LONG (__etext)
121 LONG (__data_start__)
122 LONG (__data_end__ - __data_start__)
123 LONG (__etext2)
124 LONG (__data2_start__)
125 LONG (__data2_end__ - __data2_start__)
126 __copy_table_end__ = .;
127 } > FLASH
128 */
129
130 /* To clear multiple BSS sections,
131 * uncomment .zero.table section and,
132 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
133 /*
134 .zero.table :
135 {
136 . = ALIGN(4);
137 __zero_table_start__ = .;
138 LONG (__bss_start__)
139 LONG (__bss_end__ - __bss_start__)
140 LONG (__bss2_start__)
141 LONG (__bss2_end__ - __bss2_start__)
142 __zero_table_end__ = .;
143 } > FLASH
144 */
145
146 __etext = .;
147
148 .data : AT (__etext)
149 {
150 __data_start__ = .;
151 *(vtable)
152 *(.data*)
153
154 . = ALIGN(4);
155 /* preinit data */
156 PROVIDE_HIDDEN (__preinit_array_start = .);
157 *(.preinit_array)
158 PROVIDE_HIDDEN (__preinit_array_end = .);
159
160 . = ALIGN(4);
161 /* init data */
162 PROVIDE_HIDDEN (__init_array_start = .);
163 *(SORT(.init_array.*))
164 *(.init_array)
165 PROVIDE_HIDDEN (__init_array_end = .);
166
167
168 . = ALIGN(4);
169 /* finit data */
170 PROVIDE_HIDDEN (__fini_array_start = .);
171 *(SORT(.fini_array.*))
172 *(.fini_array)
173 PROVIDE_HIDDEN (__fini_array_end = .);
174
175 *(.jcr)
176 . = ALIGN(4);
177 /* All data end */
178 __data_end__ = .;
179
180 } > RAM
181
182 .bss :
183 {
184 . = ALIGN(4);
185 __bss_start__ = .;
186 *(.bss*)
187 *(COMMON)
188 . = ALIGN(4);
189 __bss_end__ = .;
190 } > RAM
191
192 .heap (COPY):
193 {
194 __end__ = .;
195 PROVIDE(end = .);
196 *(.heap*)
197 __HeapLimit = .;
198 } > RAM
199
200 /* .stack_dummy section doesn't contains any symbols. It is only
201 * used for linker to calculate size of stack sections, and assign
202 * values to stack symbols later */
203 .stack_dummy (COPY):
204 {
205 *(.stack*)
206 } > RAM
207
208 /* Set stack top to end of RAM, and stack limit move down by
209 * size of stack_dummy section */
210 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
211 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
212 PROVIDE(__stack = __StackTop);
213
214 /* Check if data + heap + stack exceeds RAM limit */
215 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
216 }
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@@ -0,0 +1,217
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 ETHRAM (xrw) : ORIGIN = 0x2001C000, LENGTH = 16k
35 AUXRAM (xrw) : ORIGIN = 0x20020000, LENGTH = 64k
36 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
37 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
38 }
39
40 /* Linker script to place sections and symbol values. Should be used together
41 * with other linker script that defines memory regions FLASH and RAM.
42 * It references following symbols, which must be defined in code:
43 * Reset_Handler : Entry of reset handler
44 *
45 * It defines following symbols, which code can use without definition:
46 * __exidx_start
47 * __exidx_end
48 * __copy_table_start__
49 * __copy_table_end__
50 * __zero_table_start__
51 * __zero_table_end__
52 * __etext
53 * __data_start__
54 * __preinit_array_start
55 * __preinit_array_end
56 * __init_array_start
57 * __init_array_end
58 * __fini_array_start
59 * __fini_array_end
60 * __data_end__
61 * __bss_start__
62 * __bss_end__
63 * __end__
64 * end
65 * __HeapLimit
66 * __StackLimit
67 * __StackTop
68 * __stack
69 */
70 ENTRY(Reset_Handler)
71
72 SECTIONS
73 {
74 .text :
75 {
76 KEEP(*(.isr_vector))
77 *(.text*)
78
79 *(.init)
80 *(.fini)
81
82 /* .ctors */
83 *crtbegin.o(.ctors)
84 *crtbegin?.o(.ctors)
85 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
86 *(SORT(.ctors.*))
87 *(.ctors)
88
89 /* .dtors */
90 *crtbegin.o(.dtors)
91 *crtbegin?.o(.dtors)
92 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
93 *(SORT(.dtors.*))
94 *(.dtors)
95
96 *(.rodata*)
97
98 *(.eh_frame*)
99 } > FLASH
100
101 .ARM.extab :
102 {
103 *(.ARM.extab* .gnu.linkonce.armextab.*)
104 } > FLASH
105
106 __exidx_start = .;
107 .ARM.exidx :
108 {
109 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
110 } > FLASH
111 __exidx_end = .;
112
113 /* To copy multiple ROM to RAM sections,
114 * uncomment .copy.table section and,
115 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
116 /*
117 .copy.table :
118 {
119 . = ALIGN(4);
120 __copy_table_start__ = .;
121 LONG (__etext)
122 LONG (__data_start__)
123 LONG (__data_end__ - __data_start__)
124 LONG (__etext2)
125 LONG (__data2_start__)
126 LONG (__data2_end__ - __data2_start__)
127 __copy_table_end__ = .;
128 } > FLASH
129 */
130
131 /* To clear multiple BSS sections,
132 * uncomment .zero.table section and,
133 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
134 /*
135 .zero.table :
136 {
137 . = ALIGN(4);
138 __zero_table_start__ = .;
139 LONG (__bss_start__)
140 LONG (__bss_end__ - __bss_start__)
141 LONG (__bss2_start__)
142 LONG (__bss2_end__ - __bss2_start__)
143 __zero_table_end__ = .;
144 } > FLASH
145 */
146
147 __etext = .;
148
149 .data : AT (__etext)
150 {
151 __data_start__ = .;
152 *(vtable)
153 *(.data*)
154
155 . = ALIGN(4);
156 /* preinit data */
157 PROVIDE_HIDDEN (__preinit_array_start = .);
158 *(.preinit_array)
159 PROVIDE_HIDDEN (__preinit_array_end = .);
160
161 . = ALIGN(4);
162 /* init data */
163 PROVIDE_HIDDEN (__init_array_start = .);
164 *(SORT(.init_array.*))
165 *(.init_array)
166 PROVIDE_HIDDEN (__init_array_end = .);
167
168
169 . = ALIGN(4);
170 /* finit data */
171 PROVIDE_HIDDEN (__fini_array_start = .);
172 *(SORT(.fini_array.*))
173 *(.fini_array)
174 PROVIDE_HIDDEN (__fini_array_end = .);
175
176 *(.jcr)
177 . = ALIGN(4);
178 /* All data end */
179 __data_end__ = .;
180
181 } > RAM
182
183 .bss :
184 {
185 . = ALIGN(4);
186 __bss_start__ = .;
187 *(.bss*)
188 *(COMMON)
189 . = ALIGN(4);
190 __bss_end__ = .;
191 } > RAM
192
193 .heap (COPY):
194 {
195 __end__ = .;
196 PROVIDE(end = .);
197 *(.heap*)
198 __HeapLimit = .;
199 } > RAM
200
201 /* .stack_dummy section doesn't contains any symbols. It is only
202 * used for linker to calculate size of stack sections, and assign
203 * values to stack symbols later */
204 .stack_dummy (COPY):
205 {
206 *(.stack*)
207 } > RAM
208
209 /* Set stack top to end of RAM, and stack limit move down by
210 * size of stack_dummy section */
211 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
212 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
213 PROVIDE(__stack = __StackTop);
214
215 /* Check if data + heap + stack exceeds RAM limit */
216 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
217 }
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@@ -1,313 +1,314
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <stm32f4xx_gpio.h>
29 29 #include <stm32f4xx_fsmc.h>
30 30 #include <i2c.h>
31 31 #include <core.h>
32 32 #include <terminal.h>
33 33
34 34 uint32_t OSC0 =8000000;
35 35 uint32_t INTOSC =16000000;
36 36 uint32_t RTCOSC =32768;
37 37 uint32_t currentCpuFreq=0;
38 38 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
39 gpio_t TickLed = LED1;
39 40
40 41 LCD_IF_t lcdIF0={
41 42 .init = &bsp_FSMC_init,
42 43 .writereg = &bsp_lcd0_write_reg,
43 44 .readreg = &bsp_lcd0_read_reg,
44 45 .writeGRAM = &bsp_lcd0_writeGRAM,
45 46 .readGRAM = &bsp_lcd0_readGRAM
46 47 };
47 48
48 49 LCD_t lcd0={
49 50 .interface = &lcdIF0,
50 51 .init = &ili9328init,
51 52 .paint = &ili9328paint,
52 53 .paintText = &ili9328paintText,
53 54 .paintFilRect = &ili9328paintFilRect,
54 55 .getPix = &ili9328getPix,
55 56 .refreshenable = &ili9328refreshenable,
56 57 .width= 240,
57 58 .height = 320
58 59 };
59 60
60 61 terminal_t terminal0;
61 62
62 63 volatile int16_t* lcd0_CMD=(volatile int16_t*)0x60000000;
63 64 volatile int16_t* lcd0_DATA=(volatile int16_t*)0x61FFFFF0;
64 65
65 66 float VREF0 =(float)3.3;
66 67
67 68 int bsp_init()
68 69 {
69 70 int i=0;
70 71 for(i=0;i<32;i++)
71 72 {
72 73 __opnfiles__[i] = NULL;
73 74 }
74 75 bsp_GPIO_init();
75 76 bsp_uart_init();
76 77 bsp_iic_init();
77 78 bsp_FSMC_init();
78 79 bsp_GTerm_init();
79 80 printf("\r=====================\n\r");
80 81 printf( "=====================\n\r");
81 82 printf(BSP);
82 83 printf(" initialised\n\r");
83 84 printf( "=====================\n\r");
84 85 return 1;
85 86 }
86 87
87 88 void bsp_GPIO_init()
88 89 {
89 90 gpio_t gpio1 = gpioopen(LED1);
90 91 gpio_t gpio2 = gpioopen(LED2);
91 92 gpio_t gpio3 = gpioopen(LED3);
92 93 gpio_t gpio4 = gpioopen(PSU_DISABLE);
93 94 gpio_t gpio5 = gpioopen(PSU_ALERT_5V);
94 95 gpio_t gpio6 = gpioopen(PSU_ALERT_1_5V);
95 96 gpio_t gpio7 = gpioopen(PSU_ALERT_3_3V);
96 97 gpiosetspeed(&gpio1,gpiohighspeed);
97 98 gpiosetspeed(&gpio2,gpiohighspeed);
98 99 gpiosetspeed(&gpio3,gpiohighspeed);
99 100 gpiosetspeed(&gpio4,gpiohighspeed);
100 101 gpiosetspeed(&gpio5,gpiohighspeed);
101 102 gpiosetspeed(&gpio6,gpiohighspeed);
102 103 gpiosetspeed(&gpio7,gpiohighspeed);
103 104 gpioclr(PSU_DISABLE);
104 105 gpiosetdir(&gpio1,gpiooutdir);
105 106 gpiosetdir(&gpio3,gpiooutdir);
106 107 gpiosetdir(&gpio2,gpiooutdir);
107 108 gpiosetdir(&gpio4,gpiooutdir);
108 109 gpiosetdir(&gpio5,gpioindir);
109 110 gpiosetdir(&gpio6,gpioindir);
110 111 gpiosetdir(&gpio7,gpioindir);
111 112 gpioclr(PSU_DISABLE);
112 113 }
113 114
114 115 void bsp_uart_init()
115 116 {
116 117 //if(__opnfiles__[1]==NULL)
117 118 //{
118 119 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
119 120 // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
120 121 // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
121 122 //uartmkstreamdev(uart,fd1);
122 123 //__opnfiles__[1] = fd1;
123 124 //}
124 125 //else
125 126 //{
126 127 uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
127 128 //}
128 129 }
129 130
130 131
131 132
132 133 int bsp_FSMC_init()
133 134 {
134 135 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
135 136 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
136 137
137 138 gpio_t gpio1 = gpioopen(LCD_RESET);
138 139 gpiosetspeed(&gpio1,gpiohighspeed);
139 140 gpiosetdir(&gpio1,gpiooutdir);
140 141 gpioclr(LCD_RESET);
141 142
142 143 gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15\
143 144 ,PD8,PD9,PD10,PD4,PD5,PD7,PE4};
144 145 for(int i=0;i<20;i++)
145 146 {
146 147 gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
147 148 LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
148 149 gpiosetconfig(&LCD_DBx);
149 150 GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
150 151 }
151 152
152 153 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
153 154 FSMC_NORSRAMTimingInitTypeDef p;
154 155
155 156 /* Enable FSMC clock */
156 157 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
157 158
158 159 /*-- FSMC Configuration ------------------------------------------------------*/
159 160 /*----------------------- SRAM Bank 3 ----------------------------------------*/
160 161 /* FSMC_Bank1_NORSRAM4 configuration */
161 162 //p.FSMC_AddressSetupTime = 5;
162 163 p.FSMC_AddressSetupTime = 1;
163 164 p.FSMC_AddressHoldTime = 0;
164 165 //p.FSMC_DataSetupTime = 9;
165 166 p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11;
166 167 p.FSMC_BusTurnAroundDuration = 0;
167 168 p.FSMC_CLKDivision = 0;
168 169 p.FSMC_DataLatency = 0;
169 170 p.FSMC_AccessMode = FSMC_AccessMode_A;
170 171 /* Color LCD configuration ------------------------------------
171 172 LCD configured as follow:
172 173 - Data/Address MUX = Disable
173 174 - Memory Type = SRAM
174 175 - Data Width = 16bit
175 176 - Write Operation = Enable
176 177 - Extended Mode = Enable
177 178 - Asynchronous Wait = Disable */
178 179
179 180 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
180 181 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
181 182 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
182 183 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
183 184 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
184 185 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
185 186 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
186 187 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
187 188 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
188 189 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
189 190 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
190 191 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
191 192 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
192 193 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
193 194 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
194 195
195 196 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
196 197
197 198 /* Enable FSMC NOR/SRAM Bank1 */
198 199 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
199 200 gpioset(LCD_RESET);
200 201 lcd0.init(&lcd0);
201 202 return 1;
202 203 }
203 204
204 205 void bsp_spi_init()
205 206 {
206 207
207 208 }
208 209
209 210
210 211 void bsp_iic_init()
211 212 {
212 213 i2copenandconfig(i2c2,0,10000,PF0,PF1);
213 214 }
214 215
215 216 void bsp_SD_init()
216 217 {
217 218
218 219 }
219 220
220 221 void vs10XXclearXCS(){}
221 222 void vs10XXsetXCS(){}
222 223 int vs10XXDREQ()
223 224 {
224 225 return 1;
225 226 }
226 227
227 228
228 229 void bsppowersdcard(char onoff) //always ON
229 230 {
230 231
231 232 }
232 233
233 234 char bspsdcardpresent()
234 235 {
235 236 return 0;
236 237 }
237 238
238 239 char bspsdcardwriteprotected()
239 240 {
240 241 return 0;
241 242 }
242 243
243 244 void bspsdcardselect(char YESNO)
244 245 {
245 246
246 247 }
247 248
248 249
249 250 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
250 251 {
251 252 *lcd0_CMD=(uint16_t)reg;
252 253 *lcd0_DATA=(uint16_t)data;
253 254 }
254 255
255 256 uint32_t bsp_lcd0_read_reg(uint32_t reg)
256 257 {
257 258 *lcd0_CMD=(uint16_t)reg;
258 259 return (uint16_t)*lcd0_DATA;
259 260 }
260 261
261 262 void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
262 263 {
263 264 *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
264 265 uint16_t* castedBuff=(uint16_t*)buffer;
265 266 for(int i=0;i<(int)count;i++)
266 267 {
267 268 *lcd0_DATA=castedBuff[i];
268 269 }
269 270 }
270 271
271 272 void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
272 273 {
273 274 *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
274 275 uint16_t* castedBuff=(uint16_t*)buffer;
275 276 castedBuff[0]=*lcd0_DATA;
276 277 for(int i=0;i<(int)count;i++)
277 278 {
278 279 castedBuff[i]=*lcd0_DATA;
279 280 }
280 281 }
281 282
282 283
283 284 void bsp_GTerm_init()
284 285 {
285 286 if(__opnfiles__[1]==NULL)
286 287 {
287 288 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
288 289 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
289 290 terminal_init(&terminal0 ,&lcd0,&ComicSansMS_8,fd1);
290 291 __opnfiles__[1] = fd1;
291 292 }
292 293 else
293 294 {
294 295
295 296 }
296 297 }
297 298
298 299
299 300
300 301
301 302
302 303
303 304
304 305
305 306
306 307
307 308
308 309
309 310
310 311
311 312
312 313
313 314
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@@ -1,126 +1,127
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 uint32_t OSC0 =8000000;
29 29 uint32_t INTOSC =16000000;
30 30 uint32_t RTCOSC =32768;
31 31 uint32_t currentCpuFreq=0;
32 32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33 gpio_t TickLed = LED1;
33 34
34 35 float VREF0 =(float)3.3;
35 36
36 37 int bsp_init()
37 38 {
38 39 int i=0;
39 40 for(i=0;i<32;i++)
40 41 {
41 42 __opnfiles__[i] = NULL;
42 43 }
43 44 bsp_GPIO_init();
44 45 bsp_uart_init();
45 46 printf("\r================================================================\n\r");
46 47 printf("================================================================\n\r");
47 48 printf(BSP);
48 49 printf(" initialised\n\r");
49 50 printf("================================================================\n\r");
50 51 return 1;
51 52 }
52 53
53 54 void bsp_GPIO_init()
54 55 {
55 56 gpio_t gpio1 = gpioopen(PC6);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
56 57 gpio_t gpio2 = gpioopen(PC7);//gpioopen(LED2);
57 58 gpiosetspeed(&gpio1,gpiohighspeed);
58 59 gpiosetspeed(&gpio2,gpiohighspeed);
59 60 gpiosetdir(&gpio1,gpiooutdir);
60 61 gpiosetdir(&gpio2,gpiooutdir);
61 62 }
62 63
63 64 void bsp_uart_init()
64 65 {
65 66 if(__opnfiles__[1]==NULL)
66 67 {
67 68 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
68 69 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
69 70 uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,115200,LED2,LED1,-1,-1);
70 71 uartmkstreamdev(uart,fd1);
71 72 __opnfiles__[1] = fd1;
72 73 }
73 74 else
74 75 {
75 76 uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,115200,LED2,LED1,-1,-1);
76 77 }
77 78 }
78 79
79 80 void bsp_spi_init()
80 81 {
81 82
82 83 }
83 84
84 85
85 86 void bsp_iic_init()
86 87 {
87 88
88 89 }
89 90
90 91 void bsp_SD_init()
91 92 {
92 93
93 94 }
94 95
95 96 void vs10XXclearXCS(){}
96 97 void vs10XXsetXCS(){}
97 98 int vs10XXDREQ()
98 99 {
99 100 return 1;
100 101 }
101 102
102 103
103 104 void bsppowersdcard(char onoff) //always ON
104 105 {
105 106
106 107 }
107 108
108 109 char bspsdcardpresent()
109 110 {
110 111 return 0;
111 112 }
112 113
113 114 char bspsdcardwriteprotected()
114 115 {
115 116 return 0;
116 117 }
117 118
118 119 void bspsdcardselect(char YESNO)
119 120 {
120 121
121 122 }
122 123
123 124
124 125
125 126
126 127
Show file before | Show file after | Hide comments
@@ -1,143 +1,144
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <spi.h>
28 28 #include <stdio.h>
29 29 #include <core.h>
30 30 uint32_t OSC0 =8000000;
31 31 uint32_t INTOSC =16000000;
32 32 uint32_t RTCOSC =32768;
33 33 uint32_t currentCpuFreq=0;
34 34 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
35 gpio_t TickLed = LED1;
35 36
36 37 float VREF0 =(float)3.3;
37 38
38 39 int bsp_init()
39 40 {
40 41 int i=0;
41 42 for(i=0;i<32;i++)
42 43 {
43 44 __opnfiles__[i] = NULL;
44 45 }
45 46 bsp_GPIO_init();
46 47 bsp_uart_init();
47 48 bsp_spi_init();
48 49 printf("\r================================================================\n\r");
49 50 printf("================================================================\n\r");
50 51 printf(BSP);
51 52 printf(" initialised\n\r");
52 53 printf("================================================================\n\r");
53 54 return 1;
54 55 }
55 56
56 57 void bsp_GPIO_init()
57 58 {
58 59 gpio_t GPIOList[]={LED1,LED2,LED3,ADC_MODE0,ADC_MODE1,ADC_FSYNC
59 60 ,ADC_SYNC,ADC_CLKDIV};
60 61 gpio_t GPIOx;
61 62 for(int i=0;i<8;i++)
62 63 {
63 64 GPIOx = gpioopen(GPIOList[i]);
64 65 gpiosetspeed(&GPIOx,gpiohighspeed);
65 66 gpiosetdir(&GPIOx,gpiooutdir);
66 67 gpiosetouttype(&GPIOx,gpiopushpulltype);
67 68 }
68 69 gpioset(ADC_CLKDIV);
69 70 gpioset(ADC_MODE0);
70 71 gpioset(ADC_MODE1);
71 72 gpioclr(ADC_SYNC);
72 73 gpioclr(ADC_FSYNC);
73 74 delay_100us(10);
74 75 gpioset(ADC_SYNC);
75 76
76 77 }
77 78
78 79 void bsp_uart_init()
79 80 {
80 81 if(__opnfiles__[1]==NULL)
81 82 {
82 83 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
83 84 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
84 85 //uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,230400,PA9,PA10,-1,-1);
85 86 uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
86 87 uartmkstreamdev(uart,fd1);
87 88 __opnfiles__[1] = fd1;
88 89 }
89 90 else
90 91 {
91 92 // uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,230400,PA9,PA10,-1,-1);
92 93 uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
93 94 }
94 95 }
95 96
96 97 void bsp_spi_init()
97 98 {
98 99 spiopenandconfig(spi1,spi8bits | spimaster |spiclkinhlow | spiclkfirstedge | spimsbfirst,4000000,DAC_DIN,ADC_DOUT1,ADC_SCLK,-1);
99 100 }
100 101
101 102
102 103 void bsp_iic_init()
103 104 {
104 105
105 106 }
106 107
107 108 void bsp_SD_init()
108 109 {
109 110
110 111 }
111 112
112 113 void vs10XXclearXCS(){}
113 114 void vs10XXsetXCS(){}
114 115 int vs10XXDREQ()
115 116 {
116 117 return 1;
117 118 }
118 119
119 120
120 121 void bsppowersdcard(char onoff) //always ON
121 122 {
122 123
123 124 }
124 125
125 126 char bspsdcardpresent()
126 127 {
127 128 return 0;
128 129 }
129 130
130 131 char bspsdcardwriteprotected()
131 132 {
132 133 return 0;
133 134 }
134 135
135 136 void bspsdcardselect(char YESNO)
136 137 {
137 138
138 139 }
139 140
140 141
141 142
142 143
143 144
Show file before | Show file after | Hide comments
@@ -1,204 +1,204
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2013, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <stm32f4xx_gpio.h>
29 29 #include <stm32f4xx_fsmc.h>
30 30 #include <i2c.h>
31 31 #include <core.h>
32 32 #include <terminal.h>
33 33 #include "bsp_gpio.h"
34 34 #include "bsp_i2c.h"
35 35 #include "bsp_i2c.h"
36 36
37 37 uint32_t OSC0 =8000000;
38 38 uint32_t INTOSC =16000000;
39 39 uint32_t RTCOSC =32768;
40 40 uint32_t currentCpuFreq=0;
41 41 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
42
42 gpio_t TickLed = LED1;
43 43
44 44
45 45 LCD_IF_t lcdIF0={
46 46 .init = &bsp_FSMC_init,
47 47 .writereg = &bsp_lcd0_write_reg,
48 48 .readreg = &bsp_lcd0_read_reg,
49 49 .writeGRAM = &bsp_lcd0_writeGRAM,
50 50 .readGRAM = &bsp_lcd0_readGRAM
51 51 };
52 52
53 53 LCD_t lcd0={
54 54 .interface = &lcdIF0,
55 55 .init = &ili9328init,
56 56 .paint = &ili9328paint,
57 57 .paintText = &ili9328paintText,
58 58 .paintFilRect = &ili9328paintFilRect,
59 59 .getPix = &ili9328getPix,
60 60 .refreshenable = &ili9328refreshenable,
61 61 .width= 240,
62 62 .height = 320
63 63 };
64 64
65 65 terminal_t terminal0;
66 66
67 67
68 68
69 69 float VREF0 =(float)3.3;
70 70 volatile vs10XXDev audioCodec0;
71 71
72 72 ADS7843_t TC0;
73 73
74 74 sdcardDev sdcard2;
75 75 blkdevice sdcard2blkdev;
76 76 dikpartition sdcard2Part1;
77 77 FAT32fs sdcard2FAT32part1;
78 78 dikpartition sdcard2Part2;
79 79 FAT32fs sdcard2FAT32part2;
80 80 dikpartition sdcard2Part3;
81 81 FAT32fs sdcard2FAT32part3;
82 82 dikpartition sdcard2Part4;
83 83 FAT32fs sdcard2FAT32part4;
84 84
85 85 int bsp_init()
86 86 {
87 87 int i=0;
88 88 for(i=0;i<__MAX_OPENED_FILES__;i++)
89 89 {
90 90 __opnfiles__[i] = NULL;
91 91 }
92 92 bsp_GPIO_init();
93 93 bsp_uart_init();
94 94 bsp_iic_init();
95 95 bsp_FSMC_init();
96 96 bsp_GTerm_init();
97 97 bsp_spi_init();
98 98 bsp_SD_init();
99 99 bsp_Audio_init();
100 100 bsp_TC_init();
101 101 printf("\r=====================\n\r");
102 102 printf( "=====================\n\r");
103 103 printf(BSP);
104 104 printf(" initialised\n\r");
105 105 printf( "=====================\n\r");
106 106 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
107 107 printf( "BIG ENDIAN MACHINE\n\r");
108 108 #else
109 109 printf( "LITLE ENDIAN MACHINE\n\r");
110 110 #endif
111 111 return 1;
112 112 }
113 113
114 114 void bsp_GPIO_init()
115 115 {
116 116 gpio_t GPIO_Out_init_List[]={LED1,LED2,LCD_RESET,LCD_BACKL,VS1053xCS,VS1053xDCS,\
117 117 VS1053xRESET,SDCARD2CS,LCD_RS,LCD_CS,TC_CS};
118 118
119 119 gpio_t GPIO_In_init_List[]={VS1053DREQ,SDCARD2CD,BP3,TC_BUSY};
120 120
121 121 bsp_gpio_set_outputs(GPIO_Out_init_List,11);
122 122 bsp_gpio_set_inputs(GPIO_In_init_List,4);
123 123
124 124 gpioclr(VS1053xRESET);
125 125 gpioset(VS1053xCS);
126 126 gpioset(VS1053xDCS);
127 127 gpioset(SDCARD2CS);
128 128 gpioclr(LCD_RESET);
129 129 gpioclr(LCD_BACKL);
130 130 }
131 131
132 132 void bsp_uart_init()
133 133 {
134 134
135 135 }
136 136
137 137
138 138
139 139
140 140
141 141 int bsp_TC_init()
142 142 {
143 143 ads7843init(&TC0,TC_SPI,tcsetncs,tcbusy);
144 144 }
145 145
146 146
147 147
148 148
149 149 void bsp_iic_init()
150 150 {
151 151 // i2copenandconfig(i2c2,0,10000,PF0,PF1);
152 152 }
153 153
154 154
155 155
156 156
157 157 void tcsetncs(char val)
158 158 {
159 159 if(val)
160 160 gpioset(TC_CS);
161 161 else
162 162 gpioclr(TC_CS);
163 163 }
164 164
165 165 int tcbusy()
166 166 {
167 167 return gpiogetval(TC_BUSY);
168 168 }
169 169
170 170
171 171
172 172
173 173
174 174 void bsp_GTerm_init()
175 175 {
176 176 if(__opnfiles__[1]==NULL)
177 177 {
178 178 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
179 179 terminal_init(&terminal0 ,&lcd0,&ComicSansMS_8,fd1);
180 180 terminal_settextColor(&terminal0,0);
181 181 __opnfiles__[1] = fd1;
182 182 }
183 183 else
184 184 {
185 185
186 186 }
187 187 }
188 188
189 189
190 190
191 191
192 192
193 193
194 194
195 195
196 196
197 197
198 198
199 199
200 200
201 201
202 202
203 203
204 204
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@@ -1,140 +1,141
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <i2c.h>
29 29
30 30 uint32_t OSC0 =8000000;
31 31 uint32_t INTOSC =16000000;
32 32 uint32_t RTCOSC =32768;
33 33 uint32_t currentCpuFreq=0;
34 34 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
35 gpio_t TickLed = LED1;
35 36
36 37 float VREF0 =(float)3.3;
37 38
38 39 int bsp_init()
39 40 {
40 41 int i=0;
41 42 for(i=0;i<32;i++)
42 43 {
43 44 __opnfiles__[i] = NULL;
44 45 }
45 46 bsp_GPIO_init();
46 47 bsp_uart_init();
47 48 bsp_iic_init();
48 49 printf("\r================================================================\n\r");
49 50 printf("================================================================\n\r");
50 51 printf(BSP);
51 52 printf(" initialised\n\r");
52 53 printf("================================================================\n\r");
53 54 return 1;
54 55 }
55 56
56 57 void bsp_GPIO_init()
57 58 {
58 59 gpio_t gpio1 = gpioopen(PD12);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
59 60 gpio_t gpio2 = gpioopen(PD13);//gpioopen(LED2);
60 61 gpio_t gpio3 = gpioopen(PD14);//gpioopen(LED2);
61 62 gpio_t gpio4 = gpioopen(PD15);//gpioopen(LED2);
62 63 gpio_t dacRst=gpioopen(PD4);
63 64 gpiosetspeed(&gpio1,gpiohighspeed);
64 65 gpiosetspeed(&gpio2,gpiohighspeed);
65 66 gpiosetspeed(&gpio3,gpiohighspeed);
66 67 gpiosetspeed(&gpio4,gpiohighspeed);
67 68 gpiosetspeed(&dacRst,gpiohighspeed);
68 69 gpiosetdir(&gpio1,gpiooutdir);
69 70 gpiosetdir(&gpio3,gpiooutdir);
70 71 gpiosetdir(&gpio2,gpiooutdir);
71 72 gpiosetdir(&gpio4,gpiooutdir);
72 73 gpiosetdir(&dacRst,gpiooutdir);
73 74 gpioset(dacRst);
74 75 }
75 76
76 77 void bsp_uart_init()
77 78 {
78 79 if(__opnfiles__[1]==NULL)
79 80 {
80 81 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
81 82 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
82 83 uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,115200,PB10,PB11,-1,-1);
83 84 uartmkstreamdev(uart,fd1);
84 85 __opnfiles__[1] = fd1;
85 86 }
86 87 else
87 88 {
88 89 uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,115200,PB10,PB11,-1,-1);
89 90 }
90 91 }
91 92
92 93 void bsp_spi_init()
93 94 {
94 95
95 96 }
96 97
97 98
98 99 void bsp_iic_init()
99 100 {
100 101 i2copenandconfig(i2c1,0,400000,PB9,PB6);
101 102 i2copenandconfig(i2c3,0,400000,PC9,PA8);
102 103 }
103 104
104 105 void bsp_SD_init()
105 106 {
106 107
107 108 }
108 109
109 110 void vs10XXclearXCS(){}
110 111 void vs10XXsetXCS(){}
111 112 int vs10XXDREQ()
112 113 {
113 114 return 1;
114 115 }
115 116
116 117
117 118 void bsppowersdcard(char onoff) //always ON
118 119 {
119 120
120 121 }
121 122
122 123 char bspsdcardpresent()
123 124 {
124 125 return 0;
125 126 }
126 127
127 128 char bspsdcardwriteprotected()
128 129 {
129 130 return 0;
130 131 }
131 132
132 133 void bspsdcardselect(char YESNO)
133 134 {
134 135
135 136 }
136 137
137 138
138 139
139 140
140 141
Show file before | Show file after | Hide comments
@@ -1,139 +1,139
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2013, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <stm32f4xx_gpio.h>
29 29 #include <stm32f4xx_fsmc.h>
30 30 #include <i2c.h>
31 31 #include <core.h>
32 32 #include <terminal.h>
33 33 #include "bsp_gpio.h"
34 34 #include "bsp_i2c.h"
35 35 #include "bsp_i2c.h"
36 36
37 37 uint32_t OSC0 =12000000;
38 38 uint32_t INTOSC =16000000;
39 39 uint32_t RTCOSC =32768;
40 40 uint32_t currentCpuFreq=0;
41 41 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
42
42 gpio_t TickLed = LED1;
43 43
44 44 float VREF0 =(float)3.3;
45 45
46 46 sdcardDev sdcard2;
47 47 blkdevice sdcard2blkdev;
48 48 dikpartition sdcard2Part1;
49 49 FAT32fs sdcard2FAT32part1;
50 50 dikpartition sdcard2Part2;
51 51 FAT32fs sdcard2FAT32part2;
52 52 dikpartition sdcard2Part3;
53 53 FAT32fs sdcard2FAT32part3;
54 54 dikpartition sdcard2Part4;
55 55 FAT32fs sdcard2FAT32part4;
56 56
57 57 int bsp_init()
58 58 {
59 59 int i=0;
60 60 for(i=0;i<__MAX_OPENED_FILES__;i++)
61 61 {
62 62 __opnfiles__[i] = NULL;
63 63 }
64 64 bsp_GPIO_init();
65 65 bsp_uart_init();
66 66 bsp_iic_init();
67 67 bsp_spi_init();
68 68 bsp_SD_init();
69 69 printf("\r=====================\n\r");
70 70 printf( "=====================\n\r");
71 71 printf(BSP);
72 72 printf(" initialised\n\r");
73 73 printf( "=====================\n\r");
74 74 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
75 75 printf( "BIG ENDIAN MACHINE\n\r");
76 76 #else
77 77 printf( "LITLE ENDIAN MACHINE\n\r");
78 78 #endif
79 79 return 1;
80 80 }
81 81
82 82 void bsp_GPIO_init()
83 83 {
84 84 gpio_t GPIO_Out_init_List[]={LED1};
85 85
86 86 gpio_t GPIO_In_init_List[]={BP1};
87 87
88 88 bsp_gpio_set_outputs(GPIO_Out_init_List,1);
89 89 bsp_gpio_set_inputs(GPIO_In_init_List,1);
90 90
91 91 }
92 92
93 93 void bsp_uart_init()
94 94 {
95 95 if(__opnfiles__[1]==NULL)
96 96 {
97 97 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
98 98 uart_t uart = uartopenandconfig(uart6,uartparitynone | uart8bits | uartonestop,115200,PC6,PC7,-1,-1);
99 99 uartmkstreamdev(uart,fd1);
100 100 __opnfiles__[1] = fd1;
101 101 }
102 102 else
103 103 {
104 104 uartopenandconfig(uart6,uartparitynone | uart8bits | uartonestop,115200,PC6,PC7,-1,-1);
105 105 }
106 106 }
107 107
108 108
109 109
110 110
111 111 void bsp_iic_init()
112 112 {
113 113 // i2copenandconfig(i2c2,0,10000,PF0,PF1);
114 114 }
115 115
116 116
117 117
118 118
119 119 void bsp_GTerm_init()
120 120 {
121 121
122 122 }
123 123
124 124
125 125
126 126
127 127
128 128
129 129
130 130
131 131
132 132
133 133
134 134
135 135
136 136
137 137
138 138
139 139
Show file before | Show file after | Hide comments
@@ -1,131 +1,132
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 uint32_t OSC0 =8000000;
29 29 uint32_t INTOSC =16000000;
30 30 uint32_t RTCOSC =32768;
31 31 uint32_t currentCpuFreq=0;
32 32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33 gpio_t TickLed = LED1;
33 34
34 35 float VREF0 =(float)3.3;
35 36
36 37 int bsp_init()
37 38 {
38 39 int i=0;
39 40 for(i=0;i<32;i++)
40 41 {
41 42 __opnfiles__[i] = NULL;
42 43 }
43 44 bsp_GPIO_init();
44 45 bsp_uart_init();
45 46 printf("\r================================================================\n\r");
46 47 printf("================================================================\n\r");
47 48 printf(BSP);
48 49 printf(" initialised\n\r");
49 50 printf("================================================================\n\r");
50 51 return 1;
51 52 }
52 53
53 54 void bsp_GPIO_init()
54 55 {
55 56 gpio_t gpio1 = gpioopen(LED1);
56 57 gpio_t gpio2 = gpioopen(LED2);
57 58 gpio_t gpio3 = gpioopen(BP0);
58 59 gpiosetspeed(&gpio1,gpiohighspeed);
59 60 gpiosetspeed(&gpio2,gpiohighspeed);
60 61 gpiosetspeed(&gpio3,gpiohighspeed);
61 62 gpiosetdir(&gpio1,gpiooutdir);
62 63 gpiosetdir(&gpio2,gpiooutdir);
63 64 gpiosetdir(&gpio3,gpioindir);
64 65 }
65 66
66 67 void bsp_uart_init()
67 68 {
68 69 if(__opnfiles__[1]==NULL)
69 70 {
70 71 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
71 72 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
72 73 uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
73 74 uartmkstreamdev(uart,fd1);
74 75 __opnfiles__[1] = fd1; //stdo
75 76 __opnfiles__[0] = fd1; //stdi
76 77 }
77 78 else
78 79 {
79 80 uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
80 81 }
81 82 }
82 83
83 84 void bsp_spi_init()
84 85 {
85 86
86 87 }
87 88
88 89
89 90 void bsp_iic_init()
90 91 {
91 92
92 93 }
93 94
94 95 void bsp_SD_init()
95 96 {
96 97
97 98 }
98 99
99 100
100 101 void vs10XXclearXCS(){}
101 102 void vs10XXsetXCS(){}
102 103 int vs10XXDREQ()
103 104 {
104 105 return 1;
105 106 }
106 107
107 108
108 109 void bsppowersdcard(char onoff) //always ON
109 110 {
110 111
111 112 }
112 113
113 114 char bspsdcardpresent()
114 115 {
115 116 return 0;
116 117 }
117 118
118 119 char bspsdcardwriteprotected()
119 120 {
120 121 return 0;
121 122 }
122 123
123 124 void bspsdcardselect(char YESNO)
124 125 {
125 126
126 127 }
127 128
128 129
129 130
130 131
131 132
Show file before | Show file after | Hide comments
@@ -1,311 +1,312
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <stm32f4xx_gpio.h>
29 29 #include <stm32f4xx_fsmc.h>
30 30 #include <stm32f4xx_gpio.h>
31 31 #include <stm32f4xx_rcc.h>
32 32 #include <core.h>
33 33
34 34 uint32_t OSC0 =8000000;
35 35 uint32_t INTOSC =16000000;
36 36 uint32_t RTCOSC =32768;
37 37 uint32_t currentCpuFreq=0;
38 38 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
39 gpio_t TickLed = LED1;
39 40
40 41 float VREF0 =(float)3.3;
41 42
42 43 LCD_IF_t lcdIF0={
43 44 .init = &bsp_FSMC_init,
44 45 .writereg = &bsp_lcd0_write_reg,
45 46 .readreg = &bsp_lcd0_read_reg,
46 47 .writeGRAM = &bsp_lcd0_writeGRAM,
47 48 .readGRAM = &bsp_lcd0_readGRAM
48 49 };
49 50
50 51 LCD_t lcd0={
51 52 .interface = &lcdIF0,
52 53 .init = &ssd2119init,
53 54 .paint = &ssd2119paint,
54 55 .paintText = &ssd2119paintText,
55 56 .paintFilRect = &ssd2119paintFilRect,
56 57 .refreshenable = &ssd2119refreshenable,
57 58 .width= 320,
58 59 .height = 240
59 60 };
60 61
61 62
62 63 volatile int16_t* lcd0_CMD=(volatile int16_t*) 0x60000000;
63 64 volatile int16_t* lcd0_DATA=(volatile int16_t*)(0x60FFFFF0);
64 65
65 66 int bsp_init()
66 67 {
67 68 int i=0;
68 69 for(i=0;i<32;i++)
69 70 {
70 71 __opnfiles__[i] = NULL;
71 72 }
72 73 bsp_GPIO_init();
73 74 bsp_uart_init();
74 75 bsp_FSMC_init();
75 76 printf("\r================================================================\n\r");
76 77 printf("================================================================\n\r");
77 78 printf(BSP);
78 79 printf(" initialised\n\r");
79 80 printf("================================================================\n\r");
80 81 return 1;
81 82 }
82 83
83 84 void bsp_GPIO_init()
84 85 {
85 86 gpio_t gpio1 = gpioopen(PD12);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
86 87 // gpio_t gpio2 = gpioopen(PD13);//gpioopen(LED2);
87 88 gpio_t gpio3 = gpioopen(PD14);//gpioopen(LED2);
88 89 // gpio_t gpio4 = gpioopen(PD15);//gpioopen(LED2);
89 90 gpiosetspeed(&gpio1,gpiohighspeed);
90 91 //gpiosetspeed(&gpio2,gpiohighspeed);
91 92 gpiosetspeed(&gpio3,gpiohighspeed);
92 93 //gpiosetspeed(&gpio4,gpiohighspeed);
93 94 gpiosetdir(&gpio1,gpiooutdir);
94 95 gpiosetdir(&gpio3,gpiooutdir);
95 96 // gpiosetdir(&gpio2,gpiooutdir);
96 97 //gpiosetdir(&gpio4,gpiooutdir);
97 98 }
98 99
99 100 void bsp_uart_init()
100 101 {
101 102 if(__opnfiles__[1]==NULL)
102 103 {
103 104 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
104 105 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
105 106 uart_t uart = uartopenandconfig(uart6,uartparitynone | uart8bits | uartonestop,9600,PC6,PC7,-1,-1);
106 107 uartmkstreamdev(uart,fd1);
107 108 __opnfiles__[1] = fd1; //stdo
108 109 __opnfiles__[0] = fd1; //stdi
109 110 }
110 111 else
111 112 {
112 113 uartopenandconfig(uart6,uartparitynone | uart8bits | uartonestop,9600,PC6,PC7,-1,-1);
113 114 }
114 115 }
115 116
116 117
117 118 /*
118 119 D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7
119 120 D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12
120 121 D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9
121 122 D15 PD10
122 123 A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S
123 124 FSMC_NOE PD4 RD
124 125 */
125 126 /*-- GPIOs Configuration -----------------------------------------------------*/
126 127 /*
127 128 +-------------------+--------------------+------------------+------------------+
128 129 + SRAM pins assignment +
129 130 +-------------------+--------------------+------------------+------------------+
130 131 | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
131 132 | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
132 133 | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
133 134 | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
134 135 | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
135 136 | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
136 137 | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
137 138 | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |------------------+
138 139 | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 |
139 140 | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 |
140 141 | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+
141 142 | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 |
142 143 | | PE15 <-> FSMC_D12 |
143 144 +-------------------+--------------------+
144 145 */
145 146 int bsp_FSMC_init()
146 147 {
147 148 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
148 149 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
149 150
150 151 gpio_t gpio1 = gpioopen(LCD_RESET);
151 152 gpiosetspeed(&gpio1,gpiohighspeed);
152 153 gpiosetdir(&gpio1,gpiooutdir);
153 154 gpioclr(LCD_RESET);
154 155 gpio1 = gpioopen(LCD_CS);
155 156 gpiosetspeed(&gpio1,gpiohighspeed);
156 157 gpiosetdir(&gpio1,gpiooutdir);
157 158 gpioset(LCD_CS);
158 159 gpio_t LCD_DBxList[]={
159 160 PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD14,PD15,
160 161 PE3 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14,
161 162 PE15 };
162 163
163 164 for(int i=0;i<19;i++)
164 165 {
165 166 gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
166 167 LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
167 168 gpiosetconfig(&LCD_DBx);
168 169 GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
169 170 }
170 171
171 172 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
172 173 FSMC_NORSRAMTimingInitTypeDef p;
173 174
174 175 /* Enable FSMC clock */
175 176 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
176 177
177 178 /*-- FSMC Configuration ------------------------------------------------------*/
178 179 /*----------------------- SRAM Bank 3 ----------------------------------------*/
179 180 /* FSMC_Bank1_NORSRAM3 configuration */
180 181 p.FSMC_AddressSetupTime = 1;
181 182 p.FSMC_AddressHoldTime = 0;
182 183 p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11;
183 184 p.FSMC_BusTurnAroundDuration = 0;
184 185 p.FSMC_CLKDivision = 0;
185 186 p.FSMC_DataLatency = 0;
186 187 p.FSMC_AccessMode = FSMC_AccessMode_A;
187 188 /* Color LCD configuration ------------------------------------
188 189 LCD configured as follow:
189 190 - Data/Address MUX = Disable
190 191 - Memory Type = SRAM
191 192 - Data Width = 16bit
192 193 - Write Operation = Enable
193 194 - Extended Mode = Enable
194 195 - Asynchronous Wait = Disable */
195 196
196 197 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
197 198 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
198 199 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
199 200 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
200 201 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
201 202 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
202 203 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
203 204 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
204 205 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
205 206 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
206 207 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
207 208 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
208 209 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
209 210 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
210 211 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
211 212
212 213 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
213 214
214 215 /* Enable FSMC NOR/SRAM Bank1 */
215 216 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
216 217 gpioset(LCD_RESET);
217 218 gpioclr(LCD_CS);
218 219 lcd0.init(&lcd0);
219 220 return 1;
220 221 }
221 222
222 223 void bsp_spi_init()
223 224 {
224 225
225 226 }
226 227
227 228
228 229 void bsp_iic_init()
229 230 {
230 231
231 232 }
232 233
233 234 void bsp_SD_init()
234 235 {
235 236
236 237 }
237 238
238 239
239 240 void vs10XXclearXCS(){}
240 241 void vs10XXsetXCS(){}
241 242 int vs10XXDREQ()
242 243 {
243 244 return 1;
244 245 }
245 246
246 247
247 248 void bsppowersdcard(char onoff) //always ON
248 249 {
249 250
250 251 }
251 252
252 253 char bspsdcardpresent()
253 254 {
254 255 return 0;
255 256 }
256 257
257 258 char bspsdcardwriteprotected()
258 259 {
259 260 return 0;
260 261 }
261 262
262 263 void bspsdcardselect(char YESNO)
263 264 {
264 265
265 266 }
266 267
267 268
268 269
269 270 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
270 271 {
271 272 gpioclr(LCD_CS);
272 273 *lcd0_CMD=(uint16_t)reg;
273 274 *lcd0_DATA=(uint16_t)data;
274 275 gpioset(LCD_CS);
275 276 }
276 277
277 278 uint32_t bsp_lcd0_read_reg(uint32_t reg)
278 279 {
279 280 gpioclr(LCD_CS);
280 281 *lcd0_CMD=(uint16_t)reg;
281 282 uint32_t data=(uint16_t)*lcd0_DATA;
282 283 gpioset(LCD_CS);
283 284 return data;
284 285 }
285 286
286 287 void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
287 288 {
288 289 gpioclr(LCD_CS);
289 290 *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
290 291 uint16_t* castedBuff=(uint16_t*)buffer;
291 292 for(int i=0;i<(int)count;i++)
292 293 {
293 294 *lcd0_DATA=castedBuff[i];
294 295 }
295 296 gpioset(LCD_CS);
296 297 }
297 298
298 299 void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
299 300 {
300 301 gpioclr(LCD_CS);
301 302 *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
302 303 uint16_t* castedBuff=(uint16_t*)buffer;
303 304 castedBuff[0]=*lcd0_DATA;
304 305 for(int i=0;i<(int)count;i++)
305 306 {
306 307 castedBuff[i]=*lcd0_DATA;
307 308 }
308 309 gpioset(LCD_CS);
309 310 }
310 311
311 312
Show file before | Show file after | Hide comments
@@ -1,378 +1,379
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <ili9328.h>
29 29 #include <genericLCD_Controler.h>
30 30 #include <stm32f4xx.h>
31 31 #include <stm32f4xx_gpio.h>
32 32 #include <stm32f4xx_rcc.h>
33 33 #include <stm32f4xx_gpio.h>
34 34 #include <stm32f4xx_fsmc.h>
35 35 #include <terminal.h>
36 36 uint32_t OSC0 =8000000;
37 37 uint32_t INTOSC =16000000;
38 38 uint32_t RTCOSC =32768;
39 39 uint32_t currentCpuFreq=0;
40 40 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
41 gpio_t TickLed = LED1;
41 42
42 43 volatile uint8_t* lcd0_CMD=(volatile uint8_t*)0x60000000;
43 44 volatile uint8_t* lcd0_DATA=(volatile uint8_t*)0x61FFFFF0;
44 45 terminal_t terminal0;
45 46 volatile vs10XXDev audioCodec0;
46 47 sdcardDev sdcard2;
47 48 blkdevice sdcard2blkdev;
48 49 dikpartition sdcard2Part1;
49 50 FAT32fs sdcard2FAT32part1;
50 51 dikpartition sdcard2Part2;
51 52 FAT32fs sdcard2FAT32part2;
52 53 dikpartition sdcard2Part3;
53 54 FAT32fs sdcard2FAT32part3;
54 55 dikpartition sdcard2Part4;
55 56 FAT32fs sdcard2FAT32part4;
56 57
57 58 LCD_IF_t lcdIF0={
58 59 .init = &bsp_FSMC_init,
59 60 .writereg = &bsp_lcd0_write_reg,
60 61 .readreg = &bsp_lcd0_read_reg,
61 62 .writeGRAM = &bsp_lcd0_writeGRAM,
62 63 .readGRAM = &bsp_lcd0_readGRAM
63 64 };
64 65
65 66 LCD_t lcd0={
66 67 .interface = &lcdIF0,
67 68 .init = &ili9328init,
68 69 .paint = &ili9328paint,
69 70 .paintText = &ili9328paintText,
70 71 .paintFilRect = &ili9328paintFilRect,
71 72 .refreshenable = &ili9328refreshenable,
72 73 .width= 240,
73 74 .height = 320
74 75 };
75 76
76 77
77 78 float VREF0 =(float)3.3;
78 79
79 80 int bsp_init()
80 81 {
81 82 int i=0;
82 83 for(i=0;i<32;i++)
83 84 {
84 85 __opnfiles__[i] = NULL;
85 86 }
86 87 bsp_GPIO_init();
87 88 bsp_uart_init();
88 89 bsp_FSMC_init();
89 90 bsp_GTerm_init();
90 91 printf("\r================================================================\n\r");
91 92 printf("================================================================\n\r");
92 93 printf(BSP);
93 94 printf(" initialised\n\r");
94 95 printf("================================================================\n\r");
95 96 return 1;
96 97 }
97 98
98 99 void bsp_GPIO_init()
99 100 {
100 101 gpio_t gpio1 = gpioopen(PD12);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
101 102 gpio_t gpio2 = gpioopen(PD13);//gpioopen(LED2);
102 103 gpio_t gpio3 = gpioopen(PD14);//gpioopen(LED2);
103 104 gpio_t gpio4 = gpioopen(PD15);//gpioopen(LED2);
104 105 gpiosetspeed(&gpio1,gpiohighspeed);
105 106 gpiosetspeed(&gpio2,gpiohighspeed);
106 107 gpiosetspeed(&gpio3,gpiohighspeed);
107 108 gpiosetspeed(&gpio4,gpiohighspeed);
108 109 gpiosetdir(&gpio1,gpiooutdir);
109 110 gpiosetdir(&gpio3,gpiooutdir);
110 111 gpiosetdir(&gpio2,gpiooutdir);
111 112 gpiosetdir(&gpio4,gpiooutdir);
112 113 }
113 114
114 115 void bsp_uart_init()
115 116 {
116 117 // if(__opnfiles__[1]==NULL)
117 118 // {
118 119 // //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
119 120 // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
120 121 // uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,19200,PB10,PB11,-1,-1);
121 122 // uartmkstreamdev(uart,fd1);
122 123 // __opnfiles__[1] = fd1; //stdo
123 124 // __opnfiles__[0] = fd1; //stdi
124 125 // }
125 126 // else
126 127 // {
127 128 // uartopenandconfig(2,uartparitynone | uart8bits | uartonestop,115200,PB10,PB11,-1,-1);
128 129 // }
129 130 }
130 131
131 132 void bsp_spi_init()
132 133 {
133 134
134 135 }
135 136
136 137
137 138 int bsp_FSMC_init()
138 139 {
139 140 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
140 141 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
141 142
142 143 gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
143 144 ,PD4,PD5,PD7,PE4};
144 145 for(int i=0;i<12;i++)
145 146 {
146 147 gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
147 148 LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
148 149 gpiosetconfig(&LCD_DBx);
149 150 GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
150 151 }
151 152
152 153 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
153 154 FSMC_NORSRAMTimingInitTypeDef p,readtim;
154 155
155 156 /* Enable FSMC clock */
156 157 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
157 158
158 159 /*-- FSMC Configuration ------------------------------------------------------*/
159 160 /*----------------------- SRAM Bank 3 ----------------------------------------*/
160 161 /* FSMC_Bank1_NORSRAM4 configuration */
161 162 p.FSMC_AddressSetupTime = 3;
162 163 p.FSMC_AddressHoldTime = 3;
163 164 //ili9328 -> data setup time > 10ns
164 165 p.FSMC_DataSetupTime = 1;
165 166 if(getCpuFreq()>100*1000*1000)
166 167 p.FSMC_DataSetupTime = 2;// 11;
167 168 p.FSMC_BusTurnAroundDuration = 0;
168 169 p.FSMC_CLKDivision = 0;
169 170 p.FSMC_DataLatency = 0;
170 171 //ili9328 -> data hold time > 15ns
171 172 if(getCpuFreq()>66*1000*1000)
172 173 p.FSMC_DataLatency = 1;
173 174 p.FSMC_AccessMode = FSMC_AccessMode_A;
174 175
175 176 readtim.FSMC_AddressSetupTime = 0xF;
176 177 readtim.FSMC_AddressHoldTime = 0xF;
177 178 //p.FSMC_DataSetupTime = 9;
178 179 readtim.FSMC_DataSetupTime = 0xF ;// 11;
179 180 if(getCpuFreq()>100*1000*1000)
180 181 readtim.FSMC_DataSetupTime = 0xF;// 11;
181 182 readtim.FSMC_BusTurnAroundDuration = 0xf;
182 183 readtim.FSMC_CLKDivision = 0;
183 184 readtim.FSMC_DataLatency = 0xF;
184 185 if(getCpuFreq()>66*1000*1000)
185 186 readtim.FSMC_DataLatency = 0xF;
186 187 readtim.FSMC_AccessMode = FSMC_AccessMode_A;
187 188
188 189
189 190 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
190 191 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
191 192 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
192 193 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
193 194 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
194 195 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
195 196 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
196 197 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
197 198 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
198 199 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
199 200 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
200 201 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
201 202 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
202 203 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &readtim;
203 204 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
204 205
205 206 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
206 207
207 208 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
208 209 gpioset(LCD_RESET);
209 210 gpioclr(LCD_RESET);
210 211 delay_100us(500);
211 212 gpioset(LCD_RESET);
212 213 delay_100us(500);
213 214 lcd0.init(&lcd0);
214 215 gpioset(LCD_BACKL);
215 216 return 1;
216 217 }
217 218
218 219
219 220 void bsp_iic_init()
220 221 {
221 222
222 223 }
223 224
224 225 void bsp_SD_init()
225 226 {
226 227
227 228 }
228 229
229 230
230 231 void vs10XXclearXCS(){}
231 232 void vs10XXsetXCS(){}
232 233 int vs10XXDREQ()
233 234 {
234 235 return 1;
235 236 }
236 237
237 238
238 239 void bsppowersdcard(char onoff) //always ON
239 240 {
240 241
241 242 }
242 243
243 244 char bspsdcardpresent()
244 245 {
245 246 return 0;
246 247 }
247 248
248 249 char bspsdcardwriteprotected()
249 250 {
250 251 return 0;
251 252 }
252 253
253 254 void bspsdcardselect(char YESNO)
254 255 {
255 256
256 257 }
257 258
258 259
259 260
260 261 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
261 262 {
262 263 uint8_t* pt8 = (uint8_t*)(void*)&reg;
263 264 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
264 265 *lcd0_CMD=pt8[3];
265 266 *lcd0_CMD=pt8[2];
266 267 pt8 = (uint8_t*)(void*)&data;
267 268 *lcd0_DATA=pt8[3];
268 269 *lcd0_DATA=pt8[2];
269 270 #else
270 271 *lcd0_CMD=pt8[1];
271 272 *lcd0_CMD=pt8[0];
272 273 pt8 = (uint8_t*)(void*)&data;
273 274 *lcd0_DATA=pt8[1];
274 275 *lcd0_DATA=pt8[0];
275 276 #endif
276 277
277 278 }
278 279
279 280 uint32_t bsp_lcd0_read_reg(uint32_t reg)
280 281 {
281 282 uint8_t* pt8 = (uint8_t*)(void*)&reg;
282 283 uint32_t DATA=0;
283 284 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
284 285 *lcd0_CMD=pt8[3];
285 286 *lcd0_CMD=pt8[2];
286 287 pt8 = (uint8_t*)(void*)&DATA;
287 288 pt8[3]=*lcd0_DATA;
288 289 pt8[2]=*lcd0_DATA;
289 290 #else
290 291
291 292 *lcd0_CMD=pt8[1];
292 293 *lcd0_CMD=pt8[0];
293 294 pt8 = (uint8_t*)(void*)&DATA;
294 295 pt8[1]=*lcd0_DATA;
295 296 pt8[0]=*lcd0_DATA;
296 297 #endif
297 298
298 299 return DATA;
299 300 }
300 301
301 302 void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
302 303 {
303 304 uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
304 305 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
305 306 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
306 307 *lcd0_CMD=pt8[3];
307 308 *lcd0_CMD=pt8[2];
308 309 pt8 = (uint8_t*)(void*)buffer;
309 310 for(int i=0;i<(int)count;i++)
310 311 {
311 312 *lcd0_DATA=pt8[(2*i) +1];
312 313 *lcd0_DATA=pt8[2*i];
313 314 }
314 315 #else
315 316
316 317 *lcd0_CMD=pt8[1];
317 318 *lcd0_CMD=pt8[0];
318 319 pt8 = (uint8_t*)(void*)buffer;
319 320 for(int i=0;i<(int)count;i++)
320 321 {
321 322
322 323 *lcd0_DATA=pt8[(2*i) +1];
323 324 *lcd0_DATA=pt8[2*i];
324 325 }
325 326 #endif
326 327 }
327 328
328 329 void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
329 330 {
330 331 uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
331 332 uint8_t* pt8 = (uint8_t*)(void*)&reg;
332 333 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
333 334 *lcd0_CMD=pt8[3];
334 335 *lcd0_CMD=pt8[2];
335 336 pt8 = (uint8_t*)(void*)buffer;
336 337 for(int i=0;i<(int)count;i++)
337 338 {
338 339 pt8[(2*i) +1]=*lcd0_DATA;
339 340 pt8[2*i]=*lcd0_DATA;
340 341 }
341 342 #else
342 343 *lcd0_CMD=pt8[1];
343 344 *lcd0_CMD=pt8[0];
344 345 pt8 = (uint8_t*)(void*)buffer;
345 346 /*
346 347 * x dummy reads Cf ili9328 datasheet p79!
347 348 */
348 349 pt8[0]=*lcd0_DATA;
349 350 pt8[0]=*lcd0_DATA;
350 351
351 352 for(int i=0;i<(int)count;i++)
352 353 {
353 354 pt8[(2*i) +1]=*lcd0_DATA;
354 355 pt8[2*i]=*lcd0_DATA;
355 356 // pt8[(2*i) +1]=(uint8_t)0;
356 357 // pt8[(2*i)]=(uint8_t)0;
357 358 }
358 359 #endif
359 360 }
360 361
361 362 void bsp_GTerm_init()
362 363 {
363 364 if(__opnfiles__[1]==NULL)
364 365 {
365 366 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
366 367 terminal_init(&terminal0 ,&lcd0,&ComicSansMS_8,fd1);
367 368 __opnfiles__[1] = fd1;
368 369 }
369 370 else
370 371 {
371 372
372 373 }
373 374 }
374 375
375 376
376 377
377 378
378 379
Show file before | Show file after | Hide comments
@@ -1,134 +1,135
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 uint32_t OSC0 =8000000;
29 29 uint32_t INTOSC =16000000;
30 30 uint32_t RTCOSC =32768;
31 31 uint32_t currentCpuFreq=0;
32 32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33 gpio_t TickLed = LED1;
33 34
34 35 float VREF0 =(float)3.3;
35 36
36 37 int bsp_init()
37 38 {
38 39 int i=0;
39 40 for(i=0;i<32;i++)
40 41 {
41 42 __opnfiles__[i] = NULL;
42 43 }
43 44 bsp_GPIO_init();
44 45 bsp_uart_init();
45 46 printf("\r================================================================\n\r");
46 47 printf("================================================================\n\r");
47 48 printf(BSP);
48 49 printf(" initialised\n\r");
49 50 printf("================================================================\n\r");
50 51 return 1;
51 52 }
52 53
53 54 void bsp_GPIO_init()
54 55 {
55 56 gpio_t gpio1 = gpioopen(PD12);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
56 57 gpio_t gpio2 = gpioopen(PD13);//gpioopen(LED2);
57 58 gpio_t gpio3 = gpioopen(PD14);//gpioopen(LED2);
58 59 gpio_t gpio4 = gpioopen(PD15);//gpioopen(LED2);
59 60 gpiosetspeed(&gpio1,gpiohighspeed);
60 61 gpiosetspeed(&gpio2,gpiohighspeed);
61 62 gpiosetspeed(&gpio3,gpiohighspeed);
62 63 gpiosetspeed(&gpio4,gpiohighspeed);
63 64 gpiosetdir(&gpio1,gpiooutdir);
64 65 gpiosetdir(&gpio3,gpiooutdir);
65 66 gpiosetdir(&gpio2,gpiooutdir);
66 67 gpiosetdir(&gpio4,gpiooutdir);
67 68 }
68 69
69 70 void bsp_uart_init()
70 71 {
71 72 if(__opnfiles__[1]==NULL)
72 73 {
73 74 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
74 75 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
75 76 uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,19200,PB10,PB11,-1,-1);
76 77 uartmkstreamdev(uart,fd1);
77 78 __opnfiles__[1] = fd1; //stdo
78 79 __opnfiles__[0] = fd1; //stdi
79 80 }
80 81 else
81 82 {
82 83 uartopenandconfig(2,uartparitynone | uart8bits | uartonestop,115200,PB10,PB11,-1,-1);
83 84 }
84 85 }
85 86
86 87 void bsp_spi_init()
87 88 {
88 89
89 90 }
90 91
91 92
92 93 void bsp_iic_init()
93 94 {
94 95
95 96 }
96 97
97 98 void bsp_SD_init()
98 99 {
99 100
100 101 }
101 102
102 103
103 104 void vs10XXclearXCS(){}
104 105 void vs10XXsetXCS(){}
105 106 int vs10XXDREQ()
106 107 {
107 108 return 1;
108 109 }
109 110
110 111
111 112 void bsppowersdcard(char onoff) //always ON
112 113 {
113 114
114 115 }
115 116
116 117 char bspsdcardpresent()
117 118 {
118 119 return 0;
119 120 }
120 121
121 122 char bspsdcardwriteprotected()
122 123 {
123 124 return 0;
124 125 }
125 126
126 127 void bspsdcardselect(char YESNO)
127 128 {
128 129
129 130 }
130 131
131 132
132 133
133 134
134 135
Show file before | Show file after | Hide comments
@@ -1,363 +1,373
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include "bsp.h"
23 23 #include <streamdevices.h>
24 24 #include <malloc.h>
25 25 #include <gpio.h>
26 26 #include <uart.h>
27 27 #include <stdio.h>
28 28 #include <stm32f4xx_gpio.h>
29 29 #include <stm32f4xx_fsmc.h>
30 30 #include <i2c.h>
31 31 #include <core.h>
32 32 #include <terminal.h>
33 33 uint32_t OSC0 =8000000;
34 34 uint32_t INTOSC =16000000;
35 35 uint32_t RTCOSC =32768;
36 36 uint32_t currentCpuFreq=0;
37 37 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
38 gpio_t TickLed = LED1;
38 39
39 40 LCD_IF_t lcdIF0={
40 41 .init = &bsp_FSMC_init,
41 42 .writereg = &bsp_lcd0_write_reg,
42 43 .readreg = &bsp_lcd0_read_reg,
43 44 .writeGRAM = &bsp_lcd0_writeGRAM,
44 45 .readGRAM = &bsp_lcd0_readGRAM
45 46 };
46 47
47 48 LCD_t lcd0={
48 49 .interface = &lcdIF0,
49 50 .init = &ili9328init,
50 51 .paint = &ili9328paint,
51 52 .paintText = &ili9328paintText,
52 53 .paintFilRect = &ili9328paintFilRect,
53 54 .getPix = &ili9328getPix,
54 55 .refreshenable = &ili9328refreshenable,
55 56 .width= 240,
56 57 .height = 320
57 58 };
58 59
59 60 terminal_t terminal0;
60 61
61 62
62 63 volatile int16_t* lcd0_CMD=(volatile int16_t*) (0x60000000 | 0x08000000);
63 64 volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 | 0x08000002));
64 65
65 66 float VREF0 =(float)3.3;
66 67
67 68 int bsp_init()
68 69 {
69 70 int i=0;
70 71 for(i=0;i<32;i++)
71 72 {
72 73 __opnfiles__[i] = NULL;
73 74 }
75 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
76 RCC_AHB1Periph_GPIOG, ENABLE);
74 77 bsp_GPIO_init();
75 78 bsp_uart_init();
76 79 bsp_iic_init();
77 80 bsp_FSMC_init();
78 81 bsp_GTerm_init();
79 82 printf("\r=====================\n\r");
80 83 printf( "=====================\n\r");
81 84 printf(BSP);
82 85 printf(" initialised\n\r");
83 86 printf( "=====================\n\r");
84 87 return 1;
85 88 }
86 89
87 90 void bsp_GPIO_init()
88 91 {
89 92 gpio_t gpio1 = gpioopen(LED1);
90 93 gpio_t gpio2 = gpioopen(LED2);
91 94 gpio_t gpio3 = gpioopen(LED3);
92 95 gpiosetspeed(&gpio1,gpiohighspeed);
93 96 gpiosetspeed(&gpio2,gpiohighspeed);
94 97 gpiosetspeed(&gpio3,gpiohighspeed);
95 98 gpiosetdir(&gpio1,gpiooutdir);
96 99 gpiosetdir(&gpio2,gpiooutdir);
97 100 gpiosetdir(&gpio3,gpiooutdir);
98 101 }
99 102
100 103 void bsp_uart_init()
101 104 {
102 105 //if(__opnfiles__[1]==NULL)
103 106 //{
104 107 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
105 108 // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
106 109 // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
107 110 //uartmkstreamdev(uart,fd1);
108 111 //__opnfiles__[1] = fd1;
109 112 //}
110 113 //else
111 114 //{
112 115 uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);
113 116 //}
114 117 }
115 118
116 119 /*
117 120 D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7
118 121 D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12
119 122 D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9
120 123 D15 PD10
121 124 A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S
122 125 FSMC_NOE PD4 RD
123 126 */
124 127 /*-- GPIOs Configuration -----------------------------------------------------*/
125 128 /*
126 129 +-------------------+--------------------+------------------+------------------+
127 130 + SRAM pins assignment +
128 131 +-------------------+--------------------+------------------+------------------+
129 132 | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
130 133 | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
131 134 | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
132 135 | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
133 136 | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
134 137 | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
135 138 | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
136 139 | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |------------------+
137 140 | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 |
138 141 | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 |
139 142 | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+
140 143 | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 |
141 144 | | PE15 <-> FSMC_D12 |
142 145 +-------------------+--------------------+
143 146 */
144 147 int bsp_FSMC_init()
145 148 {
146 149 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
147 150 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
148 151
149 152 gpio_t LCD_DBxList[]={
150 153 PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15,
151 154 PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14,
152 155 PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 ,
153 156 PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10
154 157 };
155 158
156 159 for(int i=0;i<43;i++)
157 160 {
158 161 gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
159 162 LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
160 163 gpiosetconfig(&LCD_DBx);
161 164 GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
162 165 }
163 166
164 167 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
165 168 FSMC_NORSRAMTimingInitTypeDef p,readtim;
166 169
167 170 /* Enable FSMC clock */
168 171 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
169 172
170 173 /*-- FSMC Configuration ------------------------------------------------------*/
171 174 /*----------------------- SRAM Bank 3 ----------------------------------------*/
172 175 /* FSMC_Bank1_NORSRAM3 configuration */
173 176 p.FSMC_AddressSetupTime = 0xf;
174 177 p.FSMC_AddressHoldTime = 0xf;
175 178 //ili9328 -> data setup time > 10ns
176 179 p.FSMC_DataSetupTime = 0xf;
177 180 if(getCpuFreq()>100*1000*1000)
178 181 p.FSMC_DataSetupTime = 0xf;// 11;
179 182 p.FSMC_BusTurnAroundDuration = 0xf;
180 183 p.FSMC_CLKDivision = 0;
181 184 p.FSMC_DataLatency = 0xf;
182 185 //ili9328 -> data hold time > 15ns
183 186 if(getCpuFreq()>66*1000*1000)
184 187 p.FSMC_DataLatency = 0xf;
185 188 p.FSMC_AccessMode = FSMC_AccessMode_A;
186 189
187 190 readtim.FSMC_AddressSetupTime = 0xf;
188 191 readtim.FSMC_AddressHoldTime = 0xf;
189 192 //p.FSMC_DataSetupTime = 9;
190 193 readtim.FSMC_DataSetupTime = 0xf ;// 11;
191 194 if(getCpuFreq()>100*1000*1000)
192 195 readtim.FSMC_DataSetupTime = 0xf;// 11;
193 196 readtim.FSMC_BusTurnAroundDuration = 0xf;
194 197 readtim.FSMC_CLKDivision = 0;
195 198 readtim.FSMC_DataLatency = 0xf;
196 199 if(getCpuFreq()>66*1000*1000)
197 200 readtim.FSMC_DataLatency = 0xf;
198 201 readtim.FSMC_AccessMode = FSMC_AccessMode_A;
199 202 /* Color LCD configuration ------------------------------------
200 203 LCD configured as follow:
201 204 - Data/Address MUX = Disable
202 205 - Memory Type = SRAM
203 206 - Data Width = 16bit
204 207 - Write Operation = Enable
205 208 - Extended Mode = Enable
206 209 - Asynchronous Wait = Disable */
207 210
208 211 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
209 212 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
210 213 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
211 214 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
212 215 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
213 216 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
214 217 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
215 218 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
216 219 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
217 220 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
218 221 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
219 222 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
220 223 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
221 224 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &readtim;
222 225 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
223 226
224 227 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
225 228
226 229 /* Enable FSMC NOR/SRAM Bank1 */
227 230 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
228 231
232 gpio_t SRAM_DBxList[]={
233 PF0,PF1,PF2,PF3,PF4,PF5,PF12,PF13,
234 PF14,PF15,
235 PD11,PD12,PD13,PG9,PE0,PE1};
229 236
230 p.FSMC_AddressSetupTime = getCpuFreq()/50000000;
231 p.FSMC_AddressHoldTime = 0;
232 p.FSMC_DataSetupTime = getCpuFreq()/25000000;
233 p.FSMC_BusTurnAroundDuration = 1;
234 p.FSMC_CLKDivision = 0;
235 p.FSMC_DataLatency = 0;
236 p.FSMC_AccessMode = FSMC_AccessMode_A;
237 for(int i=0;i<22;i++)
238 {
239 gpio_t SRAM_DBx = gpioopen(SRAM_DBxList[i]);
240 SRAM_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
241 gpiosetconfig(&SRAM_DBx);
242 GPIO_PinAFConfig(GPIOGETPORT(SRAM_DBx), (uint8_t)(SRAM_DBx & 0xF), GPIO_AF_FSMC);
243 }
244 /*-- FSMC Configuration ------------------------------------------------------*/
245 p.FSMC_AddressSetupTime = 3;
246 p.FSMC_AddressHoldTime = 0;
247 p.FSMC_DataSetupTime = 6;
248 p.FSMC_BusTurnAroundDuration = 1;
249 p.FSMC_CLKDivision = 0;
250 p.FSMC_DataLatency = 0;
251 p.FSMC_AccessMode = FSMC_AccessMode_A;
237 252
238 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
239 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
240 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
241 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
242 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
243 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
244 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
245 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
246 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
247 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
248 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
249 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
250 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
251 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
252 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
253 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
254 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
255 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
256 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
257 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
258 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
259 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
260 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
261 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
262 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
263 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
264 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
265 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
266 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
267 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
253 268
254 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
269 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
255 270
256 /*!< Enable FSMC Bank1_SRAM2 Bank */
257 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
271 /*!< Enable FSMC Bank1_SRAM2 Bank */
272 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
258 273 lcd0.init(&lcd0);
259 274 return 1;
260 275 }
261 276
262 277 void bsp_spi_init()
263 278 {
264 279
265 280 }
266 281
267 282
268 283 void bsp_iic_init()
269 284 {
270 285 i2copenandconfig(i2c1,0,10000,PB9,PB6);
271 286 }
272 287
273 288 void bsp_SD_init()
274 289 {
275 290 gpio_t SDIO_DBxList[]={PC8 ,PC9 ,PC10 ,PC11 ,PC12,PD2};
276 291 for(int i=0;i<6;i++)
277 292 {
278 293 gpio_t SDIO_DBx = gpioopen(SDIO_DBxList[i]);
279 294 SDIO_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
280 295 gpiosetconfig(&SDIO_DBx);
281 296 GPIO_PinAFConfig(GPIOGETPORT(SDIO_DBx), (uint8_t)(SDIO_DBx & 0xF), GPIO_AF_SDIO);
282 297 }
283 298 }
284 299
285 300 void vs10XXclearXCS(){}
286 301 void vs10XXsetXCS(){}
287 302 int vs10XXDREQ()
288 303 {
289 304 return 1;
290 305 }
291 306
292 307
293 308 void bsppowersdcard(char onoff) //always ON
294 309 {
295 310
296 311 }
297 312
298 313 char bspsdcardpresent()
299 314 {
300 315 return 0;
301 316 }
302 317
303 318 char bspsdcardwriteprotected()
304 319 {
305 320 return 0;
306 321 }
307 322
308 323 void bspsdcardselect(char YESNO)
309 324 {
310 325
311 326 }
312 327
313 328
314 329 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
315 330 {
316 331 *lcd0_CMD=(uint16_t)reg;
317 332 *lcd0_DATA=(uint16_t)data;
318 333 }
319 334
320 335 uint32_t bsp_lcd0_read_reg(uint32_t reg)
321 336 {
322 337 *lcd0_CMD=(uint16_t)reg;
323 338 return (uint16_t)*lcd0_DATA;
324 339 }
325 340
326 341 void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
327 342 {
328 343 *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
329 344 uint16_t* castedBuff=(uint16_t*)buffer;
330 345 for(int i=0;i<(int)count;i++)
331 346 {
332 347 *lcd0_DATA=castedBuff[i];
333 348 }
334 349 }
335 350
336 351 void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
337 352 {
338 353 *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
339 354 uint16_t* castedBuff=(uint16_t*)buffer;
340 355 castedBuff[0]=*lcd0_DATA;
341 356 for(int i=0;i<(int)count;i++)
342 357 {
343 358 castedBuff[i]=*lcd0_DATA;
344 359 }
345 360 }
346 361
347 362 void bsp_GTerm_init()
348 363 {
349 if(__opnfiles__[1]==NULL)
350 {
364
351 365 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
352 366 ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0);
353 367 terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1);
368 terminal_setgeometry(&terminal0,5,5,terminal0.LCD->width-10,(terminal0.LCD->height)-10);
354 369 __opnfiles__[1] = fd1;
355 }
356 else
357 {
358
359 }
360 370 }
361 371
362 372
363 373
Show file before | Show file after | Hide comments
@@ -1,20 +1,21
1 1 TEMPLATE = subdirs
2 2 CONFIG += ordered
3 3 SUBDIRS += STM32F4Discovery \
4 4 M4Stick \
5 5 M4StickV2 \
6 6 SOLAR_LFR_PSU \
7 7 BEAGLESYNTH \
8 8 STM32F4Eval \
9 9 STM32F4Discovery-EXT \
10 10 STM32F4Discovery-ILI9328-8bits \
11 11 OPLAYER \
12 12 STM32-E407 \
13 STM32F429Discovery
13 STM32F429Discovery \
14 STM32F4Discovery_35LCD
14 15
15 16
16 17
17 18
18 19
19 20
20 21
Show file before | Show file after | Hide comments
@@ -1,57 +1,75
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2012, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@gmail.com
21 21 -------------------------------------------------------------------------------*/
22 22 #ifndef GENERICLCD_CONTROLER_H
23 23 #define GENERICLCD_CONTROLER_H
24 24
25 25 #include <uhandle.h>
26 26 #include <fonts.h>
27 27
28 28
29 29 typedef struct LCD_IF_t
30 30 {
31 31 int (*init)();
32 32 void (*writereg)(uint32_t reg,uint32_t data);
33 33 uint32_t (*readreg)(uint32_t reg);
34 34 void (*writeGRAM)(void* buffer,uint32_t count);
35 35 void (*readGRAM)(void* buffer,uint32_t count);
36 36 }LCD_IF_t;
37 37
38 /**
39 * @brief Lcd buffer
40 *
41 * This structure contains a W width an H height buffer poiter to be copied to the screen at X;Y position.
42 */
43
44 typedef struct LCD_BUFFER_t
45 {
46 void* buffer; /**< Buffer pointer write on pixels you want to print*/
47 uint32_t size; /**< The size of the buffer in bytes*/
48 uint16_t X; /**< The X position of the buffer*/
49 uint16_t Y; /**< The Y position of the buffer*/
50 uint16_t W; /**< The width of the buffer*/
51 uint16_t H; /**< The height of the buffer*/
52 }LCD_BUFFER_t;
53
38 54 typedef struct LCD_t
39 55 {
40 56 LCD_IF_t* interface;
41 57 int (*init)(struct LCD_t* LCD);
42 58 void (*paint)(struct LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
43 59 void (*paintText)(struct LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
44 60 void (*paintFilRect)(struct LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
45 61 void (*getPix)(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
46 62 void (*refreshenable)(struct LCD_t* LCD,int enable);
63 LCD_BUFFER_t* (*getBuffer)(struct LCD_t* LCD);
64 void (*writeBuffer)(struct LCD_t* LCD,LCD_BUFFER_t* buffer);
47 65 uint16_t width;
48 66 uint16_t height;
49 67 }LCD_t;
50 68
51 69
52 70 #endif /*GENERICLCD_CONTROLER_H*/
53 71
54 72
55 73
56 74
57 75
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@@ -1,96 +1,97
1 1 #
2 2 # Libuc2 common rules
3 3 #
4 4 #
5 5
6 6 defineTest(copyFiles) {
7 7 files = $$1
8 8 DDIR = $$2
9 9 win32:DDIR ~= s,/,\\,g
10 10 QMAKE_POST_LINK += $$QMAKE_MKDIR $$quote($$DDIR) $$escape_expand(\\n\\t)
11 11 for(FILE, files) {
12 12 message(copying file $$FILE)
13 13 # Replace slashes in paths with backslashes for Windows
14 14 win32:FILE ~= s,/,\\,g
15 15 QMAKE_POST_LINK += $$QMAKE_COPY $$quote($$FILE) $$quote($$DDIR) $$escape_expand(\\n\\t)
16 16 }
17 17 export(QMAKE_POST_LINK)
18 18 }
19 19
20 20 INCLUDEPATH += $$[QT_INSTALL_HEADERS] \
21 21 $$[QT_INSTALL_HEADERS]/FS \
22 22 $$[QT_INSTALL_HEADERS]/EEPROMS \
23 23 $$[QT_INSTALL_HEADERS]/AUDIO \
24 24 $$[QT_INSTALL_HEADERS]/POWER \
25 25 $$[QT_INSTALL_HEADERS]/PERIPHERALS \
26 26 $$[QT_INSTALL_HEADERS]/FLASH \
27 27 $$[QT_INSTALL_HEADERS]/ADC \
28 28 $$[QT_INSTALL_HEADERS]/GRAPHIC/CONTROLERS \
29 29 $$[QT_INSTALL_HEADERS]/GRAPHIC/TC_CONTROLERS \
30 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI \
30 31 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/FONTS \
31 32 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/Widgets
32 33
33 34 isEmpty( UCMODEL ) {
34 35 message("You didn't define any target architecture, default is stm32f4")
35 36 message("To define a target architecture set the UCMODEL variable to the desired architecture")
36 37 #UCMODEL=stm32f4
37 38 }
38 39
39 40 contains( TEMPLATE, app ) {
40 41 !isEmpty( BSP ) {
41 42 include(./boards/$$BSP/bsp.pri)
42 43 }
43 44 INCLUDEPATH+= $$[QT_INSTALL_PREFIX]/bsp/src/$$UCMODEL/$$BSP
44 45 CONFIG += link_prl
45 46 OBJECTS_DIR=obj-$$UCMODEL
46 47 DESTDIR=bin-$$UCMODEL
47 48 }
48 49
49 50 !isEmpty( UCMODEL ) {
50 51 include(./$$UCMODEL/cpu.pri)
51 52 include(./$$UCMODEL/qmake.conf)
52 53 }
53 54
54 55 !isEmpty(FILESTOCOPY.files) {
55 56 copyFiles($$FILESTOCOPY.files,$$FILESTOCOPY.path)
56 57 }
57 58
58 59 contains( TEMPLATE, lib ) {
59 60
60 61 CONFIG+=staticlib
61 62 OBJECTS_DIR=obj-$$UCMODEL
62 63
63 64 contains( CONFIG, libuc2lib) {
64 65 CONFIG += create_prl
65 66 DESTDIR=$$[QT_INSTALL_LIBS]/$$UCMODEL
66 67 }else{
67 68 contains( CONFIG, bsp) {
68 69 DESTDIR=$$[QT_INSTALL_PREFIX]/bsp/lib/$$BSP
69 70 CONFIG += create_prl
70 71 !isEmpty( BSPFILE ) {
71 72 #bspFileCopy.target = bspFileCopy
72 73 #bspFileCopy.commands = echo hello
73 74 #QMAKE_EXTRA_TARGETS += bspFileCopy
74 75 #target.depend += bspFileCopy
75 76 #PRE_TARGETDEPS += bspFileCopy
76 77 copyFiles($$BSPFILE,$$[QT_INSTALL_PREFIX]/mkspecs/features/boards/$$BSP)
77 78 }
78 79 }else{
79 80 DESTDIR=bin-$$UCMODEL
80 81 }
81 82 }
82 83 }
83 84
84 85
85 86
86 87
87 88
88 89
89 90
90 91
91 92
92 93
93 94
94 95
95 96
96 97
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@@ -1,77 +1,82
1 1 #
2 2 # qmake configuration for stm32f4
3 3 #
4 4 #
5 5
6 6
7 7 isEmpty(_stm32f4_conf){
8 8 _stm32f4_conf="oneshot"
9 9
10 10 QMAKE_CFLAGS=-mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99
11 11
12 12 include(../../common/arm-none-eabi.conf)
13 13
14 14 DEFINES += __OPTIMIZED_MATH
15 15 DEFINES += \"assert_param(expr)=((void)0)\"
16 16 INCLUDEPATH += $$PWD
17 17
18 18 DEFINES += __FPU_PRESENT=1
19 19 DEFINES += ARM_MATH_CM4
20 20
21 21 DEFINES += BSP="\"\\\"$$BSP"\\\"\"
22 22
23 23
24 24 contains(CPU, stm32f42x){
25 LDSCRIPT=stm32f42_flash.ld
25 LDSCRIPT=stm32f42.ld
26 26 }
27 27 contains(CPU, stm32f4xxxG){
28 LDSCRIPT=stm32_flash.ld
28 LDSCRIPT=stm32f4.ld
29 29 }
30 30
31 31
32 32 contains( TEMPLATE, app ) {
33 33
34 unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin && python $$[QT_INSTALL_BINS]/dfu.py -b 0x08000000:"$$DESTDIR/"$(QMAKE_TARGET).bin " $$DESTDIR/"$(QMAKE_TARGET).dfu"
35 win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin"
36
34 unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" $$escape_expand(\\n\\t)
35 unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O binary "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" $$escape_expand(\\n\\t)
36 win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" $$escape_expand(\\n\\t)
37 win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O binary "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" $$escape_expand(\\n\\t)
38
39 contains( CONFIG, dfu ){
40 unix:QMAKE_POST_LINK += python $$[QT_INSTALL_BINS]/dfu.py -b 0x08000000:$$DESTDIR/"$(QMAKE_TARGET).bin" $$DESTDIR/"$(QMAKE_TARGET).dfu" $$escape_expand(\\n\\t)
41 }
37 42
38 43 LIBS += -L$$[QT_INSTALL_PREFIX]/bsp/lib/$$BSP -lbsp
39 44 LIBS += -L$$[QT_INSTALL_LIBS]/$$UCMODEL
40 45 LIBS += -lcpu
41 46 LIBS += -lcore -lm -lc
42 47
43 48 QMAKE_LFLAGS= -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -T $$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/$$LDSCRIPT
44 49
45 50
46 51
47 52 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/syscalls.c
48 53 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/fs.c
49 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/startup.s
54 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/crt0.s
50 55 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/cpuinit.c
51 56
52 57
53 58 stflash.target = stflash
54 59 stflash.commands = cd $$DESTDIR && st-flash write $(QMAKE_TARGET).bin 0x08000000
55 60 dfu.target = dfu
56 61 dfu.commands = cd $$DESTDIR && dfu-util d 0483:df11 -c 1 -i 0 -a 0 -s 0x08000000 -D $(QMAKE_TARGET).bin 0x08000000
57 62 QMAKE_EXTRA_TARGETS += stflash dfu
58 63 }
59 64
60 65
61 66
62 67 }
63 68
64 69
65 70
66 71
67 72
68 73
69 74
70 75
71 76
72 77
73 78
74 79
75 80
76 81
77 82
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@@ -1,281 +1,281
1 1 #include <stdlib.h>
2 2 #include <errno.h>
3 3 #include <string.h>
4 4 #include <sys/stat.h>
5 5 #include <sys/types.h>
6 6 #include <sys/times.h>
7 7 #include <streamdevices.h>
8 8 #include <string.h>
9 9 #include <stdio.h>
10 10 #include <gpio.h>
11 11 #include <uart.h>
12 12 #include <stdint.h>
13 13 #include <bsp.h>
14 14
15 15 #undef errno
16 16
17 17
18 18 #ifdef __cplusplus
19 19 extern "C" {
20 20 #endif
21 21 extern int errno;
22 22 extern int32_t __max_opened_files__;
23 23 extern streamdevice* __opnfiles__[];
24 24 extern int32_t* __fs_root__;
25 25 extern int32_t __fs_root_size__;
26 26
27 27 char *__env[1] = { 0 };
28 28 char **environ = __env;
29 29
30 30 int _exit()
31 31 {
32 32 while(1)
33 33 {
34 34 delay_100us(10000);
35 35 gpioset(LED2);
36 36 delay_100us(10000);
37 37 gpioclr(LED2);
38 38 }
39 39 }
40 40
41 41 int _close(int file)
42 42 {
43 43 if(file<__max_opened_files__ && __opnfiles__[file]!=NULL)
44 44 {
45 45 return __opnfiles__[file]->ops->close( __opnfiles__[file]);
46 46 }
47 47 return 0;
48 48 }
49 49
50 50
51 51 int _write(int file, char *ptr, int len)
52 52 {
53 53 if(file<__max_opened_files__ && __opnfiles__[file]!=NULL)
54 54 {
55 55 if(__opnfiles__[file]->ops->write(__opnfiles__[file],ptr,1,len)) return len;
56 56 }
57 57 return len;
58 58 }
59 59
60 60 int _execve(char *name, char **argv, char **env) {
61 61 errno = ENOMEM;
62 62 return -1;
63 63 }
64 64
65 65
66 66 int _fork(void) {
67 67 errno = EAGAIN;
68 68 return -1;
69 69 }
70 70
71 71 int _fstat(int file, struct stat *st) {
72 72 st->st_mode = S_IFCHR;
73 73 return 0;
74 74 }
75 75
76 76
77 77 int _getpid(void) {
78 78 return 1;
79 79 }
80 80
81 81
82 82 int _isatty(int file) {
83 83 return 1;
84 84 }
85 85
86 86
87 87 int _kill(int pid, int sig) {
88 88 errno = EINVAL;
89 89 return -1;
90 90 }
91 91
92 92
93 93 int _link(char *old, char *_new) {
94 94 errno = EMLINK;
95 95 return -1;
96 96 }
97 97
98 98
99 99 int _lseek(int file, int ptr, int dir) {
100 100 return 0;
101 101 }
102 102
103 103 #include <gpio.h>
104 104
105 105 int _open(const char *name, int flags, int mode)
106 106 {
107 107 if(!strncmp("UART", name, 4) && ((name[4] & 0x30)==0x30))
108 108 {
109 109 //uart_t* uart1 = malloc(sizeof(uart_t));
110 110 streamdevice* fd1 = malloc(sizeof(streamdevice));
111 111 uart_t uart=uartopen((name[4] & 0xF)-1);
112 112 if(uart!=-1);
113 113 {
114 114 uartmkstreamdev(uart,fd1);
115 115 int i=2;
116 116 while((i<__max_opened_files__) && (__opnfiles__[i]!=NULL))i++;
117 117 if(i!=__max_opened_files__)
118 118 {
119 119 __opnfiles__[i] = fd1;
120 120 return i;
121 121 }
122 122 else printf("Too much files opened\n\r");
123 123 }
124 124 }
125 125 return -1;
126 126 }
127 127
128 128 int _read(int file, char *ptr, int len) {
129 129 if(file<__max_opened_files__ && __opnfiles__[file]!=NULL)
130 130 {
131 131 if(__opnfiles__[file]->ops->read(__opnfiles__[file],ptr,1,len)) return len;
132 132 }
133 133 return 0;
134 134 }
135 135
136 136
137 137
138 138 caddr_t _sbrk(int incr) {
139 139 register char * stack_ptr __asm__ ("sp");
140 extern char _end; /* Defined by the linker */
140 extern char end; /* Defined by the linker */
141 141 static char *heap_end;
142 142 char *prev_heap_end;
143 143 if (heap_end == 0) {
144 heap_end = &_end;
144 heap_end = &end;
145 145 }
146 146 prev_heap_end = heap_end;
147 147 if (heap_end + incr > stack_ptr) {
148 148 printf("Heap and stack collision\n");
149 149 //abort ();
150 150 while(1)
151 151 {
152 152 delay_100us(10000);
153 153 gpioset(LED2);
154 154 delay_100us(10000);
155 155 gpioclr(LED2);
156 156 }
157 157 }
158 158 heap_end += incr;
159 159 return (caddr_t) prev_heap_end;
160 160 }
161 161
162 162
163 163
164 164 int _stat(char *file, struct stat *st) {
165 165 st->st_mode = S_IFCHR;
166 166 return 0;
167 167 }
168 168
169 169
170 170 int _times(struct tms *buf) {
171 171 return -1;
172 172 }
173 173
174 174
175 175 int _unlink(char *name) {
176 176 errno = ENOENT;
177 177 return -1;
178 178 }
179 179
180 180 int _wait(int *status) {
181 181 errno = ECHILD;
182 182 return -1;
183 183 }
184 184
185 185
186 186 int _read_r (struct _reent *r, int file, char * ptr, int len)
187 187 {
188 188 r = r;
189 189 file = file;
190 190 ptr = ptr;
191 191 len = len;
192 192 _read(file,ptr,len);
193 193 errno = EINVAL;
194 194 return -1;
195 195 }
196 196
197 197 /***************************************************************************/
198 198
199 199 int _lseek_r (struct _reent *r, int file, int ptr, int dir)
200 200 {
201 201 r = r;
202 202 file = file;
203 203 ptr = ptr;
204 204 dir = dir;
205 205
206 206 return 0;
207 207 }
208 208
209 209 /***************************************************************************/
210 210
211 211 int _write_r (struct _reent *r, int file, char * ptr, int len)
212 212 {
213 213 return _write(file, ptr, len);
214 214 }
215 215
216 216 /***************************************************************************/
217 217
218 218 int _close_r (struct _reent *r, int file)
219 219 {
220 220 return 0;
221 221 }
222 222
223 223 /***************************************************************************/
224 224
225 225 caddr_t _sbrk_r (struct _reent *r, int incr)
226 226 {
227 227 register char * stack_ptr __asm__ ("sp");
228 extern char _end; /* Defined by the linker */
228 extern char end; /* Defined by the linker */
229 229 static char *heap_end;
230 230 char *prev_heap_end;
231 231 if (heap_end == 0) {
232 heap_end = &_end;
232 heap_end = &end;
233 233 }
234 234 prev_heap_end = heap_end;
235 235 if (heap_end + incr > stack_ptr) {
236 236 printf( "Heap and stack collision\n");
237 237 //abort ();
238 238 while(1)
239 239 {
240 240 delay_100us(10000);
241 241 gpioset(LED2);
242 242 delay_100us(10000);
243 243 gpioclr(LED2);
244 244 }
245 245 }
246 246 heap_end += incr;
247 247 return (caddr_t) prev_heap_end;
248 248 }
249 249
250 250 /***************************************************************************/
251 251
252 252 int _fstat_r (struct _reent *r, int file, struct stat * st)
253 253 {
254 254 r = r;
255 255 file = file;
256 256
257 257 memset (st, 0, sizeof (* st));
258 258 st->st_mode = S_IFCHR;
259 259 return 0;
260 260 }
261 261
262 262 /***************************************************************************/
263 263 int _open_r(struct _reent *r,const char *name, int flags, int mode)
264 264 {
265 265 return _open(name, flags, mode);
266 266 }
267 267
268 268 int _isatty_r(struct _reent *r, int fd)
269 269 {
270 270 r = r;
271 271 fd = fd;
272 272
273 273 return 1;
274 274 }
275 275
276 276
277 277 #ifdef __cplusplus
278 278 }
279 279 #endif
280 280
281 281
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@@ -1,11 +1,12
1 1 TEMPLATE = subdirs
2 2 SUBDIRS += ILI9328 \
3 SSD2119
3 SSD2119 \
4 D51E5TA7601
4 5
5 6
6 7
7 8
8 9
9 10
10 11
11 12
Show file before | Show file after | Hide comments
@@ -1,11 +1,12
1 1 TEMPLATE = subdirs
2 2 SUBDIRS += CONTROLERS \
3 PAINTING \
3 4 TC_CONTROLERS \
4 5 GUI
5 6
6 7
7 8
8 9
9 10
10 11
11 12
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@@ -1,377 +1,379
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2011, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22 #include <core.h>
23 23 #include <stm32f4xx_rcc.h>
24 24 #include <stdlib.h>
25 25 #include <stdio.h>
26 26 #include <core_cm4.h>
27 27 #include <gpio.h>
28 28
29
29 30 extern uint32_t OSC0;
30 31 extern uint32_t INTOSC;
31 32 extern uint32_t RTCOSC;
33 extern gpio_t TickLed;
32 34
33 35 volatile uint32_t tickCounter=0;
34 36
35 37
36 38 void SysTick_Handler(void)
37 39 {
38 40 tickCounter+=1;
39 41 if((tickCounter&0xFFF)==0x800)
40 gpiosetval(PC15,!gpiogetval(PC15));
42 gpiosetval(TickLed,!gpiogetval(TickLed));
41 43 }
42 44
43 45 void delay_us(uint32_t value)
44 46 {
45 47 extern uint32_t currentCpuFreq;
46 48 if(value)
47 49 {
48 50 uint32_t tickperus=currentCpuFreq/(1000*10);
49 51 uint32_t tickCounterSnap = SysTick->VAL+((value%100)*tickperus);
50 52 uint32_t targetVal=tickCounterSnap +(value/100);
51 53 if(targetVal < tickCounterSnap)
52 54 {
53 55 while(tickCounter > targetVal);
54 56 }
55 57 while((tickCounter < targetVal) | (SysTick->VAL<tickCounterSnap));
56 58 }
57 59 }
58 60
59 61 void delay_100us(uint32_t value)
60 62 {
61 63 if(value)
62 64 {
63 65 uint32_t tickCounterSnap = tickCounter;
64 66 uint32_t SysTickSnap = SysTick->VAL;
65 67 uint32_t targetVal=tickCounterSnap +(value);
66 68 if(targetVal < tickCounterSnap)
67 69 {
68 70 while(tickCounter > targetVal);
69 71 }
70 72 while((tickCounter < targetVal) | (SysTick->VAL<SysTickSnap));
71 73 }
72 74 }
73 75
74 76 uint32_t getAPB1Freq()
75 77 {
76 78 RCC_ClocksTypeDef RCC_ClocksStatus;
77 79 RCC_GetClocksFreq(&RCC_ClocksStatus);
78 80 return RCC_ClocksStatus.PCLK1_Frequency;
79 81 }
80 82
81 83 uint32_t getAPB2Freq()
82 84 {
83 85 RCC_ClocksTypeDef RCC_ClocksStatus;
84 86 RCC_GetClocksFreq(&RCC_ClocksStatus);
85 87 return RCC_ClocksStatus.PCLK2_Frequency;
86 88 }
87 89
88 90
89 91 uint32_t getCpuFreq()
90 92 {
91 93 uint32_t cpufreq = OSC0;
92 94 uint32_t PLLN,PLLM,PLLP;
93 95
94 96 if((RCC->CFGR & 0xC) == 8) //PLL used as sys clk
95 97 {
96 98 uint32_t pllinput=INTOSC;
97 99 if((RCC->PLLCFGR & (1<<22)) == (1<<22))
98 100 {
99 101 pllinput=OSC0;
100 102 }
101 103 PLLN = (RCC->PLLCFGR>>6) & 0x1FF;
102 104 PLLM = RCC->PLLCFGR & 0x3F;
103 105 PLLP = 1<<(((RCC->PLLCFGR>>16) & 3 )+1);
104 106 cpufreq = (pllinput * PLLN )/(PLLM*PLLP);
105 107 }
106 108 else if((RCC->CFGR & 0xC) == 0) //HSI used as sys clk
107 109 {
108 110 cpufreq=INTOSC;
109 111 }
110 112 if((RCC->CFGR & (1<<7))==1<<7)
111 113 {
112 114 return cpufreq>>((RCC->CFGR & (7<<4))>>4);
113 115 }
114 116 return cpufreq;
115 117 }
116 118
117 119 void reset_AHB1()
118 120 {
119 121 RCC->AHB1RSTR = -1;
120 122 RCC->AHB1RSTR = 0;
121 123 }
122 124
123 125 void reset_AHB2()
124 126 {
125 127 RCC->AHB2RSTR = -1;
126 128 RCC->AHB2RSTR = 0;
127 129 }
128 130
129 131 void reset_APB1()
130 132 {
131 133 RCC->APB1RSTR = -1;
132 134 RCC->APB1RSTR = 0;
133 135 }
134 136
135 137 void reset_APB2()
136 138 {
137 139 RCC->APB2RSTR = -1;
138 140 RCC->APB2RSTR = 0;
139 141 }
140 142
141 143
142 144
143 145 /*
144 146 | 2.7->3.6V
145 147 -------------------------
146 148 0WS | 0<HCLK<=30
147 149 1WS | 30<HCLK<=60
148 150 2WS | 60<HCLK<=90
149 151 3WS | 90<HCLK<=120
150 152 4WS | 120<HCLK<=150
151 153 5WS | 150<HCLK<=168
152 154
153 155 f(VCO clock) = f(PLL clock input) × (PLLN / PLLM) [1]
154 156 64MHz <= f(VCO clock) <= 432MHz [2]
155 157
156 158 f(VCO clock input) must be between 1MHz and 2MHz and as close to 2MHz as possible!! [3]
157 159
158 160 f(PLL general clock output) = f(VCO clock) / PLLP [4]
159 161
160 162 CPU<168MHz AHB1<168MHz AHB2<168MHz APB1<42MHz APB2<84MHz [5]
161 163
162 164 ! 63<=PLLN<=432 [6]
163 165 ! 2<=PLLM<=63 [7]
164 166 ! PLLP=2,4,6,8 [8]
165 167 4<=PLLM*PLLP<=504
166 168
167 169 F= f(PLL clock input) * A/B with
168 170 63<=A<=432
169 171 4<=B<=504
170 172
171 173 */
172 174
173 175
174 176 int optimizePLLcfg(uint32_t freq, uint32_t srcfreq,uint32_t PLLM,uint32_t* PLLP, uint32_t* PLLN,uint8_t* AHBPRindx)
175 177 {
176 178 uint32_t AHBPRtbl[9]={1,2,4,8,16,64,128,256,512};
177 179 uint32_t AHBPR=0,AHBPR_r=0,PLLN_r=0,PLLP_r=0;
178 180 uint32_t Fplli=0;
179 181 int32_t f_error=100000000;
180 182 int32_t f_errornw=100000000;
181 183 Fplli = srcfreq / PLLM;
182 184 //not efficient but should find the best parameters
183 185 for((*AHBPRindx)=0;(*AHBPRindx)<9;(*AHBPRindx)++) //lowest priority
184 186 {
185 187 AHBPR = AHBPRtbl[(*AHBPRindx)];
186 188 for(*PLLP=2;*PLLP<9;*PLLP+=2)
187 189 {
188 190 *PLLN = (freq*(*PLLP)*AHBPR)/Fplli;
189 191 if(((*PLLN)>62) && ((*PLLN)<433) && ((Fplli * (*PLLN)) < 433000000))
190 192 {
191 193 f_errornw = abs((int32_t)((int32_t)((Fplli*(*PLLN))/((*PLLP)*AHBPR))-freq));
192 194 if( ( (f_error)>(f_errornw) ) || ( (*AHBPRindx==0)&&(*PLLP==2)&&(*PLLN==63) ) )
193 195 {
194 196 f_error=f_errornw;
195 197 PLLN_r = *PLLN;
196 198 PLLP_r = *PLLP;
197 199 AHBPR_r=*AHBPRindx;
198 200 if(f_error==0)
199 201 {
200 202 *PLLN = PLLN_r;
201 203 *PLLP = PLLP_r;
202 204 *AHBPRindx = AHBPR_r;
203 205 return 1;
204 206 }
205 207 }
206 208 }
207 209 }
208 210 }
209 211 *PLLN = PLLN_r;
210 212 *PLLP = PLLP_r;
211 213 *AHBPRindx = AHBPR_r;
212 214 return 1;
213 215 }
214 216
215 217
216 218 int setPll(uint32_t freq)
217 219 {
218 220 extern uint32_t OSC0;
219 221 extern uint32_t INTOSC;
220 222 uint32_t srcfreq = INTOSC;
221 223 uint8_t AHBPRindx;
222 224 uint32_t AHBPRtbl[9]={1,2,4,8,16,64,128,256,512};
223 225 uint32_t PLLN=0,PLLM=0,PLLP=0,AHBPR=0;
224 226 uint32_t Fplli=0;
225 227 if((RCC->PLLCFGR & (1<<22))==(1<<22))
226 228 {
227 229 srcfreq = OSC0;
228 230 }
229 231 PLLM = srcfreq / 1500000; // [3]
230 232 Fplli = srcfreq / PLLM;
231 233 optimizePLLcfg(freq,srcfreq,PLLM,&PLLP,&PLLN,&AHBPRindx);
232 234 srcfreq = (Fplli*PLLN)/(PLLP*AHBPRtbl[AHBPRindx]); //Put real clk freq in srcfreq for return value
233 235 //now switch to HSIs
234 236 if((RCC->CR & 1)==0)RCC->CR |= 1; //turn ON HSI
235 237 while((RCC->CR & 2)!=2); //wait for HSI Ready
236 238 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
237 239 RCC->CFGR |= RCC_CFGR_SW_HSI; //set HSI as main clk
238 240 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_HSI);
239 241 RCC->CR &= ~(1<<24); //Turn OFF PLL
240 242 RCC->PLLCFGR &= ~0x37FFF; //clear PLLP PLLM PLLN
241 243 RCC->PLLCFGR |= PLLM + (PLLN<<6) + (((PLLP>>1) -1)<<16);
242 244 RCC->CR |= RCC_CR_PLLON; //Turn ON PLL
243 245 while((RCC->CR & (1<<25))!=(1<<25)); //wait for PLL Ready
244 246 if(AHBPRindx!=0)AHBPRindx|=0x8;
245 247 RCC->CFGR &= ~(0xF<<4);
246 248 RCC->CFGR |= (uint32_t)(AHBPRindx<<4);
247 249 AHBPR=0;
248 250 while((srcfreq>>AHBPR)>42000000)AHBPR++; //[5] //Thune APB1 prescaler to keep APB1 CLK below 42MHz
249 251 if(AHBPR!=0)
250 252 {
251 253 AHBPR-=1;
252 254 AHBPR|=0x4;
253 255 }
254 256 RCC->CFGR &= ~(0x7<<10);
255 257 RCC->CFGR |= (uint32_t)(AHBPR<<10);
256 258 AHBPR=0;
257 259 while((srcfreq>>AHBPR)>84000000)AHBPR++; //[5] //Thune APB2 prescaler to keep APB2 CLK below 42MHz
258 260 if(AHBPR!=0)
259 261 {
260 262 AHBPR-=1;
261 263 AHBPR|=0x4;
262 264 }
263 265 RCC->CFGR &= ~(0x7<<13);
264 266 RCC->CFGR |= (uint32_t)(AHBPR<<13);
265 267 FLASH->ACR |= FLASH_ACR_LATENCY_7WS;
266 268 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));//Switch to PLL as main clk source
267 269 RCC->CFGR |= RCC_CFGR_SW_PLL;
268 270 /* Wait untill the main PLL is used as system clock source */
269 271 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
270 272 if(srcfreq>150000000)
271 273 {
272 274 FLASH->ACR &= (~7)|FLASH_ACR_LATENCY_5WS;
273 275 }
274 276 if((srcfreq<150000000) && (srcfreq>=120000000))
275 277 {
276 278 FLASH->ACR &= (~7)|FLASH_ACR_LATENCY_4WS;
277 279 }
278 280 if((srcfreq<120000000) && (srcfreq>=90000000))
279 281 {
280 282 FLASH->ACR &= (~7)|FLASH_ACR_LATENCY_3WS;
281 283 }
282 284 if((srcfreq<90000000) && (srcfreq>=60000000))
283 285 {
284 286 FLASH->ACR &= (~7)|FLASH_ACR_LATENCY_2WS;
285 287 }
286 288 if((srcfreq<60000000) && (srcfreq>=30000000))
287 289 {
288 290 FLASH->ACR &= (~7)|FLASH_ACR_LATENCY_1WS;
289 291 }
290 292 if(srcfreq<30000000)
291 293 {
292 294 FLASH->ACR &= (~7)|FLASH_ACR_LATENCY_0WS;
293 295 }
294 296 return srcfreq;
295 297 }
296 298
297 299 void configureSysTick()
298 300 {
299 301 extern uint32_t currentCpuFreq;
300 302 uint32_t us=currentCpuFreq/(1000*10);
301 303 SysTick_Config(us);
302 304 }
303 305
304 306 int setCpuFreq(uint32_t freq)
305 307 {
306 308 extern uint32_t OSC0;
307 309 extern uint32_t INTOSC;
308 310 uint8_t i=0;
309 311 uint32_t curentFeq = getCpuFreq();
310 312 if(curentFeq==freq)return curentFeq;
311 313 if((freq>2000000) && (freq<=250000000)) //be carefull with 250MHz!!!
312 314 {
313 315 if((RCC->CFGR & 0xC) == 8) //PLL used as sys clk
314 316 {
315 317 return setPll(freq);
316 318 }
317 319 else if((RCC->CFGR & 0xC) == 0) //HSI used as sys clk
318 320 {
319 321 if((INTOSC%freq)==0) //now check if we can directly divide HSI
320 322 {
321 323 if(freq==INTOSC)
322 324 {
323 325 RCC->CFGR &= ~(0xF<<4);
324 326 return freq;
325 327 }
326 328 for(i=1;i<8;i++)
327 329 {
328 330 if((freq<<i)==INTOSC)
329 331 {
330 332 RCC->CFGR &= ~(0xF<<4);
331 333 RCC->CFGR |= ((0x8|i)<<4);
332 334 return freq;
333 335 }
334 336 }
335 337 }
336 338 else
337 339 return setPll(freq);
338 340 }
339 341 else //HSE used as sys clk
340 342 {
341 343 if((OSC0%freq)==0) //now check if we can directly divide HSI
342 344 {
343 345 if(freq==OSC0)
344 346 {
345 347 RCC->CFGR &= ~(0xF<<4);
346 348 return freq;
347 349 }
348 350 for(i=1;i<8;i++)
349 351 {
350 352 if((freq<<i)==OSC0)
351 353 {
352 354 RCC->CFGR &= ~(0xF<<4);
353 355 RCC->CFGR |= ((0x8|i)<<4);
354 356 return freq;
355 357 }
356 358 }
357 359 }
358 360 else
359 361 return setPll(freq);
360 362 }
361 363 }
362 364 return 0;
363 365 }
364 366
365 367
366 368 void enable_FPU()
367 369 {
368 370 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
369 371 __asm__("dsb");
370 372 __asm__("isb");
371 373 }
372 374
373 375
374 376
375 377
376 378
377 379
Show file before | Show file after | Hide comments
@@ -1,31 +1,38
1 1 TEMPLATE = lib
2 2 CONFIG += libuc2lib
3 3
4 4 include(CMSIS/CMSIS.pri)
5 5 include(USB/USB.pri)
6 6 include(STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri)
7 7
8 8 UCMODEL=stm32f4
9 9
10 FILESTOCOPY.files = cpu.pri stm32_flash.ld stm32f42_flash.ld startup.s cpuinit.c fs.c syscalls.c
10 FILESTOCOPY.files = cpu.pri stm32f4.ld stm32f42.ld crt0.s cpuinit.c fs.c syscalls.c
11 11 FILESTOCOPY.path = $$[QT_INSTALL_PREFIX]/mkspecs/features/$$UCMODEL
12 12
13 13
14 14 INCLUDEPATH += \
15 15 STM32F4xx_StdPeriph_Driver/inc \
16 16 CMSIS/Include
17 17
18 18 SOURCES += cpu.c
19 OTHER_FILES += cpu.pri stm32_flash.ld stm32f42_flash.ld startup.s cpuinit.c fs.c syscalls.c
19
20 OTHER_FILES += cpu.pri \
21 stm32f4.ld \
22 stm32f42.ld \
23 crt0.s \
24 cpuinit.c \
25 fs.c \
26 syscalls.c
20 27
21 28
22 29
23 30
24 31
25 32
26 33
27 34
28 35
29 36
30 37
31 38
Show file before | Show file after | Hide comments
@@ -1,281 +1,281
1 1 #include <stdlib.h>
2 2 #include <errno.h>
3 3 #include <string.h>
4 4 #include <sys/stat.h>
5 5 #include <sys/types.h>
6 6 #include <sys/times.h>
7 7 #include <streamdevices.h>
8 8 #include <string.h>
9 9 #include <stdio.h>
10 10 #include <gpio.h>
11 11 #include <uart.h>
12 12 #include <stdint.h>
13 13 #include <bsp.h>
14 14
15 15 #undef errno
16 16
17 17
18 18 #ifdef __cplusplus
19 19 extern "C" {
20 20 #endif
21 21 extern int errno;
22 22 extern int32_t __max_opened_files__;
23 23 extern streamdevice* __opnfiles__[];
24 24 extern int32_t* __fs_root__;
25 25 extern int32_t __fs_root_size__;
26 26
27 27 char *__env[1] = { 0 };
28 28 char **environ = __env;
29 29
30 30 int _exit()
31 31 {
32 32 while(1)
33 33 {
34 34 delay_100us(10000);
35 35 gpioset(LED2);
36 36 delay_100us(10000);
37 37 gpioclr(LED2);
38 38 }
39 39 }
40 40
41 41 int _close(int file)
42 42 {
43 43 if(file<__max_opened_files__ && __opnfiles__[file]!=NULL)
44 44 {
45 45 return __opnfiles__[file]->ops->close( __opnfiles__[file]);
46 46 }
47 47 return 0;
48 48 }
49 49
50 50
51 51 int _write(int file, char *ptr, int len)
52 52 {
53 53 if(file<__max_opened_files__ && __opnfiles__[file]!=NULL)
54 54 {
55 55 if(__opnfiles__[file]->ops->write(__opnfiles__[file],ptr,1,len)) return len;
56 56 }
57 57 return len;
58 58 }
59 59
60 60 int _execve(char *name, char **argv, char **env) {
61 61 errno = ENOMEM;
62 62 return -1;
63 63 }
64 64
65 65
66 66 int _fork(void) {
67 67 errno = EAGAIN;
68 68 return -1;
69 69 }
70 70
71 71 int _fstat(int file, struct stat *st) {
72 72 st->st_mode = S_IFCHR;
73 73 return 0;
74 74 }
75 75
76 76
77 77 int _getpid(void) {
78 78 return 1;
79 79 }
80 80
81 81
82 82 int _isatty(int file) {
83 83 return 1;
84 84 }
85 85
86 86
87 87 int _kill(int pid, int sig) {
88 88 errno = EINVAL;
89 89 return -1;
90 90 }
91 91
92 92
93 93 int _link(char *old, char *_new) {
94 94 errno = EMLINK;
95 95 return -1;
96 96 }
97 97
98 98
99 99 int _lseek(int file, int ptr, int dir) {
100 100 return 0;
101 101 }
102 102
103 103 #include <gpio.h>
104 104
105 105 int _open(const char *name, int flags, int mode)
106 106 {
107 107 if(!strncmp("UART", name, 4) && ((name[4] & 0x30)==0x30))
108 108 {
109 109 //uart_t* uart1 = malloc(sizeof(uart_t));
110 110 streamdevice* fd1 = malloc(sizeof(streamdevice));
111 111 uart_t uart=uartopen((name[4] & 0xF)-1);
112 112 if(uart!=-1);
113 113 {
114 114 uartmkstreamdev(uart,fd1);
115 115 int i=2;
116 116 while((i<__max_opened_files__) && (__opnfiles__[i]!=NULL))i++;
117 117 if(i!=__max_opened_files__)
118 118 {
119 119 __opnfiles__[i] = fd1;
120 120 return i;
121 121 }
122 122 else printf("Too much files opened\n\r");
123 123 }
124 124 }
125 125 return -1;
126 126 }
127 127
128 128 int _read(int file, char *ptr, int len) {
129 129 if(file<__max_opened_files__ && __opnfiles__[file]!=NULL)
130 130 {
131 131 if(__opnfiles__[file]->ops->read(__opnfiles__[file],ptr,1,len)) return len;
132 132 }
133 133 return 0;
134 134 }
135 135
136 136
137 137
138 138 caddr_t _sbrk(int incr) {
139 139 register char * stack_ptr __asm__ ("sp");
140 extern char _end; /* Defined by the linker */
140 extern char end; /* Defined by the linker */
141 141 static char *heap_end;
142 142 char *prev_heap_end;
143 143 if (heap_end == 0) {
144 heap_end = &_end;
144 heap_end = &end;
145 145 }
146 146 prev_heap_end = heap_end;
147 147 if (heap_end + incr > stack_ptr) {
148 148 printf("Heap and stack collision\n");
149 149 //abort ();
150 150 while(1)
151 151 {
152 152 delay_100us(10000);
153 153 gpioset(LED2);
154 154 delay_100us(10000);
155 155 gpioclr(LED2);
156 156 }
157 157 }
158 158 heap_end += incr;
159 159 return (caddr_t) prev_heap_end;
160 160 }
161 161
162 162
163 163
164 164 int _stat(char *file, struct stat *st) {
165 165 st->st_mode = S_IFCHR;
166 166 return 0;
167 167 }
168 168
169 169
170 170 int _times(struct tms *buf) {
171 171 return -1;
172 172 }
173 173
174 174
175 175 int _unlink(char *name) {
176 176 errno = ENOENT;
177 177 return -1;
178 178 }
179 179
180 180 int _wait(int *status) {
181 181 errno = ECHILD;
182 182 return -1;
183 183 }
184 184
185 185
186 186 int _read_r (struct _reent *r, int file, char * ptr, int len)
187 187 {
188 188 r = r;
189 189 file = file;
190 190 ptr = ptr;
191 191 len = len;
192 192 _read(file,ptr,len);
193 193 errno = EINVAL;
194 194 return -1;
195 195 }
196 196
197 197 /***************************************************************************/
198 198
199 199 int _lseek_r (struct _reent *r, int file, int ptr, int dir)
200 200 {
201 201 r = r;
202 202 file = file;
203 203 ptr = ptr;
204 204 dir = dir;
205 205
206 206 return 0;
207 207 }
208 208
209 209 /***************************************************************************/
210 210
211 211 int _write_r (struct _reent *r, int file, char * ptr, int len)
212 212 {
213 213 return _write(file, ptr, len);
214 214 }
215 215
216 216 /***************************************************************************/
217 217
218 218 int _close_r (struct _reent *r, int file)
219 219 {
220 220 return 0;
221 221 }
222 222
223 223 /***************************************************************************/
224 224
225 225 caddr_t _sbrk_r (struct _reent *r, int incr)
226 226 {
227 227 register char * stack_ptr __asm__ ("sp");
228 extern char _end; /* Defined by the linker */
228 extern char end; /* Defined by the linker */
229 229 static char *heap_end;
230 230 char *prev_heap_end;
231 231 if (heap_end == 0) {
232 heap_end = &_end;
232 heap_end = &end;
233 233 }
234 234 prev_heap_end = heap_end;
235 235 if (heap_end + incr > stack_ptr) {
236 236 printf( "Heap and stack collision\n");
237 237 //abort ();
238 238 while(1)
239 239 {
240 240 delay_100us(10000);
241 241 gpioset(LED2);
242 242 delay_100us(10000);
243 243 gpioclr(LED2);
244 244 }
245 245 }
246 246 heap_end += incr;
247 247 return (caddr_t) prev_heap_end;
248 248 }
249 249
250 250 /***************************************************************************/
251 251
252 252 int _fstat_r (struct _reent *r, int file, struct stat * st)
253 253 {
254 254 r = r;
255 255 file = file;
256 256
257 257 memset (st, 0, sizeof (* st));
258 258 st->st_mode = S_IFCHR;
259 259 return 0;
260 260 }
261 261
262 262 /***************************************************************************/
263 263 int _open_r(struct _reent *r,const char *name, int flags, int mode)
264 264 {
265 265 return _open(name, flags, mode);
266 266 }
267 267
268 268 int _isatty_r(struct _reent *r, int fd)
269 269 {
270 270 r = r;
271 271 fd = fd;
272 272
273 273 return 1;
274 274 }
275 275
276 276
277 277 #ifdef __cplusplus
278 278 }
279 279 #endif
280 280
281 281
Show file before | Show file after | Hide comments
@@ -1,386 +1,387
1 1 /*------------------------------------------------------------------------------
2 2 -- This file is a part of the libuc, microcontroler library
3 3 -- Copyright (C) 2012, Alexis Jeandet
4 4 --
5 5 -- This program is free software; you can redistribute it and/or modify
6 6 -- it under the terms of the GNU General Public License as published by
7 7 -- the Free Software Foundation; either version 3 of the License, or
8 8 -- (at your option) any later version.
9 9 --
10 10 -- This program is distributed in the hope that it will be useful,
11 11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 13 -- GNU General Public License for more details.
14 14 --
15 15 -- You should have received a copy of the GNU General Public License
16 16 -- along with this program; if not, write to the Free Software
17 17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 18 -------------------------------------------------------------------------------
19 19 -- Author : Alexis Jeandet
20 20 -- Mail : alexis.jeandet@member.fsf.org
21 21 -------------------------------------------------------------------------------*/
22 22
23 23 #include <i2c.h>
24 24 #include <stm32f4xx_usart.h>
25 25 #include <stm32f4xx_rcc.h>
26 26 #include <stm32f4xx_gpio.h>
27 27 #include <gpio.h>
28 28 #include <core.h>
29 #include <stdio.h>
29 30
30 31 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
31 32 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
32 33
33 34 int i2ctimeout=1000*1000;
34 35
35 36 I2C_TypeDef* _i2c_dev_table[3]={I2C1,I2C2,I2C3};
36 37
37 38 i2c_t i2copen(int count)
38 39 {
39 40 #define _INIT_DEV(_RCC_) \
40 41 RCC_APB1PeriphClockCmd(_RCC_, ENABLE); \
41 42 RCC_APB1PeriphResetCmd(_RCC_, ENABLE); \
42 43 RCC_APB1PeriphResetCmd(_RCC_, DISABLE);
43 44
44 45 switch(count)
45 46 {
46 47 case i2c1:
47 48 _INIT_DEV(RCC_APB1Periph_I2C1);
48 49 return i2c1;
49 50 break;
50 51 case i2c2:
51 52 _INIT_DEV(RCC_APB1Periph_I2C2);
52 53 return i2c2;
53 54 break;
54 55 case i2c3:
55 56 _INIT_DEV(RCC_APB1Periph_I2C3);
56 57 return i2c3;
57 58 break;
58 59 default:
59 60 break;
60 61 }
61 62 return -1;
62 63 }
63 64
64 65 i2c_t i2copenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL)
65 66 {
66 67 i2c_t dev = i2copen(count);
67 68 if(dev!=-1)
68 69 {
69 70 i2cclose(dev);
70 71 i2csetpins(dev,SDA,SCL);
71 72 i2copen(count);
72 73 i2csetspeed(dev,speed);
73 74 i2cenable(count);
74 75 }
75 76 return dev;
76 77 }
77 78
78 79 int i2cclose(i2c_t dev)
79 80 {
80 81 switch(dev)
81 82 {
82 83 case i2c1:
83 84 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
84 85 break;
85 86 case i2c2:
86 87 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
87 88 break;
88 89 case i2c3:
89 90 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE);
90 91 break;
91 92 default:
92 93 break;
93 94 }
94 95 return 1;
95 96 }
96 97
97 98 int i2csetpins(i2c_t dev, uint32_t SDA, uint32_t SCL)
98 99 {
99 100 if((dev<i2c4)&&(dev>=i2c1))
100 101 {
101 102 gpio_t SDApin,SCLpin;
102 103 SDApin = gpioopen(SDA);
103 104 SCLpin = gpioopen(SCL);
104 105 SDApin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype;
105 106 SCLpin |= gpiolowspeed | gpiooutdir | gpioopendraintype | gpionopulltype;
106 107 gpiosetconfig(&SCLpin);
107 108 for(int i=0;i<32;i++)
108 109 {
109 110 gpioclr(SCLpin);
110 111 for(int l=0;l<200;l++)
111 112 {__asm__("nop");}
112 113 gpioset(SCLpin);
113 114 for(int l=0;l<200;l++)
114 115 {__asm__("nop");}
115 116 }
116 117 SCLpin = gpioopen(SCL);
117 118 SCLpin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype;
118 119 gpiosetconfig(&SDApin);
119 120 gpiosetconfig(&SCLpin);
120 121 uint8_t gpioAFi2cx = GPIO_AF_I2C1;
121 122 switch(dev)
122 123 {
123 124 case i2c1:
124 125 gpioAFi2cx = GPIO_AF_I2C1;
125 126 break;
126 127 case i2c2:
127 128 gpioAFi2cx = GPIO_AF_I2C2;
128 129 break;
129 130 case i2c3:
130 131 gpioAFi2cx = GPIO_AF_I2C3;
131 132 break;
132 133 default:
133 134 break;
134 135 }
135 136 GPIO_PinAFConfig(GPIOGETPORT(SDApin), (uint8_t)(SDApin & 0xF), gpioAFi2cx);
136 137 GPIO_PinAFConfig(GPIOGETPORT(SCLpin), (uint8_t)(SCLpin & 0xF), gpioAFi2cx);
137 138 return 0;
138 139 }
139 140 return -1;
140 141 }
141 142
142 143 int i2cenable(i2c_t dev)
143 144 {
144 145 if((dev<i2c4)&&(dev>=i2c1))
145 146 {
146 147 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
147 148 _dev_->CR1 |=1 ;
148 149 return 0;
149 150 }
150 151 return -1;
151 152 }
152 153
153 154 int i2cdisable(i2c_t dev)
154 155 {
155 156 if((dev<i2c4)&&(dev>=i2c1))
156 157 {
157 158 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
158 159 _dev_->CR1 &= ~1;
159 160 return 0;
160 161 }
161 162 return -1;
162 163 }
163 164
164 165
165 166 int i2csetspeed(i2c_t dev,uint32_t speed)
166 167 {
167 168 if((dev<i2c4)&&(dev>=i2c1))
168 169 {
169 170 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
170 171 int32_t APB1Freq=getAPB1Freq()/1000000;
171 172 if((APB1Freq>1)&&(APB1Freq<43))
172 173 {
173 174
174 175 uint16_t tmpreg=_dev_->CR2;
175 176 tmpreg &= ~(0x1f);
176 177 tmpreg |= APB1Freq;
177 178 _dev_->CR2=tmpreg;
178 179 i2cdisable(dev);
179 180 tmpreg=_dev_->CCR;
180 181 APB1Freq=getAPB1Freq();
181 182 if(speed>100000) //100kHz= standard mode, 400kHz= fast mode
182 183 {
183 184 if(speed<=400000)
184 185 {
185 186 tmpreg |= 1<<15;
186 187 tmpreg &= ~(1<<14);
187 188 tmpreg &= ~(0xfff);
188 189 tmpreg |= 0xfff & (APB1Freq/(3*speed));
189 190 }
190 191 }
191 192 else
192 193 {
193 194 tmpreg &= ~(1<<15);
194 195 tmpreg &= ~(0xfff);
195 196 tmpreg |= 0xfff & (APB1Freq/(2*speed));
196 197 }
197 198 _dev_->CCR=tmpreg;
198 199 tmpreg=_dev_->TRISE;
199 200 tmpreg &= ~(0x3f);
200 201 tmpreg |= (APB1Freq/1000000)+1;
201 202 _dev_->TRISE = tmpreg;
202 203 i2cenable(dev);
203 204 return 0;
204 205 }
205 206 }
206 207 return -1;
207 208 }
208 209
209 210 int i2cbusy(i2c_t dev)
210 211 {
211 212 if((dev<i2c4)&&(dev>=i2c1))
212 213 {
213 214 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
214 215 if((_dev_->SR2 & 2) ==2) return 1; /* Dev is busy */
215 216 return 0; /* Dev isn't busy */
216 217 }
217 218 return -1; /* Error, dev is out of range */
218 219 }
219 220
220 221 int i2cwrite(i2c_t dev,char address,char* data,int count)
221 222 {
222 223 if((dev<i2c4)&&(dev>=i2c1))
223 224 {
224 225 int timeout=i2ctimeout;
225 226 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
226 227 while(i2cbusy(dev))
227 228 {
228 229 if(0==(timeout--))
229 230 {
230 231 printf("Exited on timeout @ line %d\n\r",__LINE__);
231 232 return -1;
232 233 }
233 234 }
234 235 _dev_->CR1 |= 1<<8;
235 236 timeout=i2ctimeout;
236 237 while(!i2cStatusCheck(dev,((uint32_t)0x00030001)))
237 238 {
238 239 if(0==(timeout--))
239 240 {
240 241 printf("Exited on timeout @ line %d\n\r",__LINE__);
241 242 return -1;
242 243 }
243 244 }
244 245 _dev_->DR= address<<1;
245 246 timeout=i2ctimeout;
246 247 while(!i2cStatusCheck(dev, ((uint32_t)0x00070082)))
247 248 {
248 249 if(0==(timeout--))
249 250 {
250 251 printf("Exited on timeout @ line %d\n\r",__LINE__);
251 252 return -1;
252 253 }
253 254 }
254 255 address=_dev_->SR2;
255 256 for(int i=0;i<count;i++)
256 257 {
257 258 timeout=i2ctimeout;
258 259 while(!i2cStatusCheck(dev,((uint32_t)0x00070080)))
259 260 {
260 261 if(0==(timeout--))
261 262 {
262 263 printf("Exited on timeout @ line %d\n\r",__LINE__);
263 264 return -1;
264 265 }
265 266 }
266 267 _dev_->DR= data[i];
267 268 }
268 269 timeout=i2ctimeout;
269 270 while(!i2cStatusCheck(dev,1<<7))
270 271 {
271 272 if(0==(timeout--))
272 273 {
273 274 printf("Exited on timeout @ line %d\n\r",__LINE__);
274 275 return -1;
275 276 }
276 277 }
277 278 timeout=i2ctimeout;
278 279 while(!i2cStatusCheck(dev,1<<2))
279 280 {
280 281 if(0==(timeout--))
281 282 {
282 283 printf("Exited on timeout @ line %d\n\r",__LINE__);
283 284 return -1;
284 285 }
285 286 }
286 287 _dev_->CR1 |= 1<<9;
287 288 return count;
288 289 }
289 290 return -1;
290 291 }
291 292
292 293 int i2cread(i2c_t dev,char address,char* data,int count)
293 294 {
294 295 if((dev<i2c4)&&(dev>=i2c1))
295 296 {
296 297 int i=0;
297 298 int timeout=i2ctimeout;
298 299 while(i2cbusy(dev))
299 300 {
300 301 if(0==(timeout--))
301 302 {
302 303 printf("Exited on timeout @ line %d\n\r",__LINE__);
303 304 return -1;
304 305 }
305 306 }
306 307 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
307 308 _dev_->CR1 |= (1<<8) + (1<<10);
308 309 timeout=i2ctimeout;
309 310 while(!i2cStatusCheck(dev,0x00030001))
310 311 {
311 312 if(0==(timeout--))
312 313 {
313 314 printf("Exited on timeout @ line %d\n\r",__LINE__);
314 315 return -1;
315 316 }
316 317 }
317 318 _dev_->DR= (address<<1) + 1;
318 319 while(!i2cStatusCheck(dev,0x000002))
319 320 {
320 321 if(0==(timeout--))
321 322 {
322 323 printf("Exited on timeout @ line %d\n\r",__LINE__);
323 324 return -1;
324 325 }
325 326 }
326 327 if(count==1)
327 328 {
328 329 _dev_->CR1 &= ~(1<<10);
329 330 }
330 331 address=_dev_->SR2;
331 332 for(i=0;i<(count-1);i++)
332 333 {
333 334 timeout=i2ctimeout;
334 335 while(!i2cStatusCheck(dev,0x0000040))
335 336 {
336 337 if(0==(timeout--))
337 338 {
338 339 printf("Exited on timeout @ line %d\n\r",__LINE__);
339 340 return -1;
340 341 }
341 342 }
342 343 data[i]=_dev_->DR;
343 344 }
344 345 _dev_->CR1 &= ~(1<<10);
345 346 _dev_->CR1 |= 1<<9;
346 347 timeout=i2ctimeout;
347 348 while(!i2cStatusCheck(dev,0x0000040))
348 349 {
349 350 if(0==(timeout--))
350 351 {
351 352 printf("Exited on timeout @ line %d\n\r",__LINE__);
352 353 return -1;
353 354 }
354 355 }
355 356 data[i]=_dev_->DR;
356 357 timeout=i2ctimeout;
357 358 while(_dev_->CR1 & ((uint16_t)0x0200))
358 359 {
359 360 if(0==(timeout--))
360 361 {
361 362 printf("Exited on timeout @ line %d\n\r",__LINE__);
362 363 return -1;
363 364 }
364 365 }
365 366 _dev_->CR1 |= 1<<10;
366 367 return count;
367 368 }
368 369 return -1;
369 370 }
370 371
371 372
372 373 int i2cStatusCheck(i2c_t dev,int32_t flagMask)
373 374 {
374 375 int32_t flag;
375 376 if((dev<i2c4)&&(dev>=i2c1))
376 377 {
377 378 I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev];
378 379 flag= _dev_->SR1 + (_dev_->SR2<<16);
379 380 if(flagMask==(flag & flagMask))
380 381 return 1;
381 382 return 0;
382 383 }
383 384 return -1;
384 385 }
385 386
386 387
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