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1 TEMPLATE = lib
2
3 TARGET=bsp
4 CONFIG += bsp gui
5
6 BSP=STM32F4Discovery_35LCD
7
8 UCMODEL=stm32f4
9
10 SOURCES += bsp.c \
11 bsp_lcd.c
12
13 HEADERS += bsp.h
14
15 LIBS+= -lgpio -luart -li2c -lspi
16
17 BSPFILE = bsp.pri
18
19
20
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #include "bsp.h"
23 #include <streamdevices.h>
24 #include <malloc.h>
25 #include <gpio.h>
26 #include <uart.h>
27 #include <stdio.h>
28 uint32_t OSC0 =8000000;
29 uint32_t INTOSC =16000000;
30 uint32_t RTCOSC =32768;
31 uint32_t currentCpuFreq=0;
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33
34 gpio_t TickLed = LED1;
35
36 float VREF0 =(float)3.3;
37
38 LCD_IF_t lcdIF0={
39 .init = &bsp_FSMC_init,
40 .writereg = &bsp_lcd0_write_reg,
41 .readreg = &bsp_lcd0_read_reg,
42 .writeGRAM = &bsp_lcd0_writeGRAM,
43 .readGRAM = &bsp_lcd0_readGRAM
44 };
45
46 LCD_t lcd0={
47 .interface = &lcdIF0,
48 .init = &ili9328init,
49 .paint = &ili9328paint,
50 .paintText = &ili9328paintText,
51 .paintFilRect = &ili9328paintFilRect,
52 .getPix = &ili9328getPix,
53 .refreshenable = &ili9328refreshenable,
54 .width= 240,
55 .height = 320
56 };
57
58 int bsp_init()
59 {
60 int i=0;
61 for(i=0;i<32;i++)
62 {
63 __opnfiles__[i] = NULL;
64 }
65 bsp_GPIO_init();
66 bsp_uart_init();
67 bsp_FSMC_init();
68 printf("\r================================================================\n\r");
69 printf("================================================================\n\r");
70 printf(BSP);
71 printf(" initialised\n\r");
72 printf("================================================================\n\r");
73 return 1;
74 }
75
76 void bsp_GPIO_init()
77 {
78 gpio_t gpio1 = gpioopen(LED1);//gpioopen(LED1); //PD9 D=> 0x0300 9 => 0x0009
79 gpio_t gpio2 = gpioopen(LED2);//gpioopen(LED2);
80 gpiosetspeed(&gpio1,gpiohighspeed);
81 gpiosetspeed(&gpio2,gpiohighspeed);
82 gpiosetdir(&gpio1,gpiooutdir);
83 gpiosetdir(&gpio2,gpiooutdir);
84 }
85
86 void bsp_uart_init()
87 {
88 if(__opnfiles__[1]==NULL)
89 {
90 //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
91 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
92 uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,19200,PB10,PB11,-1,-1);
93 uartmkstreamdev(uart,fd1);
94 __opnfiles__[1] = fd1; //stdo
95 __opnfiles__[0] = fd1; //stdi
96 }
97 else
98 {
99 uartopenandconfig(2,uartparitynone | uart8bits | uartonestop,115200,PB10,PB11,-1,-1);
100 }
101 }
102
103 void bsp_spi_init()
104 {
105
106 }
107
108
109 void bsp_iic_init()
110 {
111
112 }
113
114 void bsp_SD_init()
115 {
116
117 }
118
119
120 void vs10XXclearXCS(){}
121 void vs10XXsetXCS(){}
122 int vs10XXDREQ()
123 {
124 return 1;
125 }
126
127
128 void bsppowersdcard(char onoff) //always ON
129 {
130
131 }
132
133 char bspsdcardpresent()
134 {
135 return 0;
136 }
137
138 char bspsdcardwriteprotected()
139 {
140 return 0;
141 }
142
143 void bspsdcardselect(char YESNO)
144 {
145
146 }
147
148
149
150
151
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2011, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #ifndef BSP_H
23 #define BSP_H
24 #include <stm32f4xx.h>
25 #include <gpio.h>
26 #include <ili9328.h>
27 #include <genericLCD_Controler.h>
28 /*
29 #ifndef PD12
30 #define PD12
31 #endif
32 #ifndef PD13
33 #define PD13
34 #endif
35 */
36 #define __MAX_OPENED_FILES__ 32
37 #define __FS_ROOT_SIZE__ 32
38
39 #define LED1 PD12
40 #define LED2 PD13
41
42 #define LCD_RESET PD10
43 #define LCD_BACKL PE11
44 #define LCD_RS PE4
45 #define LCD_CS PD7
46
47
48 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
49 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
50
51
52 extern float VREF0;
53 extern LCD_t lcd0;
54 extern uint32_t OSC0;
55 extern uint32_t currentCpuFreq;
56
57
58
59 extern int bsp_init();
60
61 extern void bsp_GPIO_init();
62 extern void bsp_uart_init();
63 extern void bsp_iic_init();
64 extern void bsp_spi_init();
65 extern void bsp_SD_init();
66 extern int bsp_FSMC_init();
67
68 /* VS1053 */
69 extern void clearXCS();
70 extern void setXCS();
71 extern int vs10XXDREQ();
72
73 /* SD CARD */
74 void bsppowersdcard(char onoff);
75 char bspsdcardpresent();
76 void bspsdcardselect(char YESNO);
77 char bspsdcardwriteprotected();
78
79 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data);
80 uint32_t bsp_lcd0_read_reg(uint32_t reg);
81 void bsp_lcd0_writeGRAM(void *buffer, uint32_t count);
82 void bsp_lcd0_readGRAM(void *buffer, uint32_t count);
83
84
85 #endif
86
87
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1 CPU=stm32f4xxxG
2 DEFINES+=BSP=\\\"STM32F4Discovery_35LCD\\\"
3 UCMODEL=stm32f4
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #include "bsp.h"
23 #include <streamdevices.h>
24 #include <malloc.h>
25 #include <gpio.h>
26 #include <uart.h>
27 #include <stdio.h>
28 #include <stm32f4xx_gpio.h>
29 #include <stm32f4xx_fsmc.h>
30 #include <stm32f4xx_rcc.h>
31 #include <i2c.h>
32 #include <core.h>
33 #include <terminal.h>
34
35
36 #define clr_RS gpioclr(LCD_RS)
37 #define set_RS gpioset(LCD_RS)
38
39 #define clr_CS gpioclr(LCD_CS)
40 #define set_CS gpioset(LCD_CS)
41
42 volatile int8_t* lcd0_CMD=(volatile int8_t*)0x60000000;
43 volatile int16_t* lcd0_CMD16=(volatile int16_t*)0x60000000;
44 volatile int8_t* lcd0_DATA=(volatile int8_t*)0x61FFFFF0;
45 volatile int16_t* lcd0_DATA16=(volatile int16_t*)0x61FFFFF0;
46
47 /*
48 D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7
49 D5 PE8 D6 PE9 D7 PE10
50 A20 PE4 = RS FSMC_NE1 PD7 CS FSMC_NWE PD5 W/S
51 FSMC_NOE PD4 RD
52 */
53
54 int bsp_FSMC_init()
55 {
56
57 gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
58 ,PD4,PD5};
59 // gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
60 // ,PD4,PD5,PD7,PE4};
61 for(int i=0;i<10;i++)
62 {
63 gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
64 LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
65 gpiosetconfig(&LCD_DBx);
66 GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
67 }
68
69 FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
70 FSMC_NORSRAMTimingInitTypeDef p;
71
72 /* Enable FSMC clock */
73 RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
74
75 /*-- FSMC Configuration ------------------------------------------------------*/
76 /*----------------------- SRAM Bank 3 ----------------------------------------*/
77 /* FSMC_Bank1_NORSRAM4 configuration */
78 p.FSMC_AddressSetupTime = 1;//3
79 p.FSMC_AddressHoldTime = 1;//3
80 //ili9328 -> data setup time > 10ns
81 p.FSMC_DataSetupTime = 6;
82 p.FSMC_CLKDivision = 3;
83 if(getCpuFreq()>=100*1000*1000)
84 {
85 p.FSMC_CLKDivision = 3;
86 p.FSMC_DataSetupTime = 6;// 11;
87 }
88 p.FSMC_BusTurnAroundDuration = 0;
89 p.FSMC_DataLatency = 3;
90 //ili9328 -> data hold time > 15ns
91 if(getCpuFreq()>66*1000*1000)
92 p.FSMC_DataLatency = 3;
93 p.FSMC_AccessMode = FSMC_AccessMode_D;
94
95
96 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
97 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
98 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
99 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
100 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
101 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
102 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
103 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
104 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
105 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
106 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
107 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; //Dis
108 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
109 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
110 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
111
112 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
113
114 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
115 gpioset(LCD_RESET);
116 gpioclr(LCD_RESET);
117 delay_100us(500);
118 gpioset(LCD_RESET);
119 delay_100us(500);
120 lcd0.init(&lcd0);
121 gpioset(LCD_BACKL);
122 return 1;
123 }
124
125
126
127 void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
128 {
129 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
130 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
131 *lcd0_CMD=pt8[3];
132 *lcd0_CMD=pt8[2];
133 pt8 = (uint8_t*)(void*)&data;
134 *lcd0_DATA=pt8[3];
135 *lcd0_DATA=pt8[2];
136 #else
137 clr_CS;
138 clr_RS;
139 *lcd0_CMD=pt8[1];
140 *lcd0_CMD=pt8[0];
141 set_RS;
142 pt8 = (uint8_t*)(void*)&data;
143 *lcd0_DATA=pt8[1];
144 *lcd0_DATA=pt8[0];
145 set_CS;
146 #endif
147
148 }
149
150 uint32_t bsp_lcd0_read_reg(uint32_t reg)
151 {
152 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
153 uint32_t DATA=0;
154
155 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
156 *lcd0_CMD=pt8[3];
157 *lcd0_CMD=pt8[2];
158 pt8 = (uint8_t*)(void*)&DATA;
159 pt8[3]=*lcd0_DATA;
160 pt8[2]=*lcd0_DATA;
161 #else
162 clr_CS;
163 clr_RS;
164 *lcd0_CMD=pt8[1];
165 *lcd0_CMD=pt8[0];
166 set_RS;
167 pt8 = (uint8_t*)(void*)&DATA;
168 pt8[1]=*lcd0_DATA;
169 pt8[0]=*lcd0_DATA;
170 set_CS;
171 #endif
172
173 return DATA;
174 }
175
176 void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
177 {
178 uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
179 uint8_t* pt8 = (uint8_t*)(void*)(&reg);
180 #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
181 *lcd0_CMD=pt8[3];
182 *lcd0_CMD=pt8[2];
183 pt8 = (uint8_t*)(void*)buffer;
184 for(int i=0;i<(int)count;i++)
185 {
186 *lcd0_DATA=pt8[(2*i) +1];
187 *lcd0_DATA=pt8[2*i];
188 }
189 #else
190 clr_CS;
191 clr_RS;
192 *lcd0_CMD=pt8[1];
193 *lcd0_CMD=pt8[0];
194 set_RS;
195 pt8 = (uint8_t*)(void*)buffer;
196 for(int i=0;i<(int)count;i++)
197 {
198
199 *lcd0_DATA=pt8[(2*i) +1];
200 *lcd0_DATA=pt8[2*i];
201 }
202 set_CS;
203 #endif
204 }
205
206
207 void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
208 {
209 //uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
210 volatile uint8_t* pt8;// = (uint8_t*)(void*)&reg;
211 /* #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
212 *lcd0_CMD=pt8[3];
213 *lcd0_CMD=pt8[2];
214 pt8 = (uint8_t*)(void*)buffer;
215 for(int i=0;i<(int)count;i++)
216 {
217 pt8[(2*i) +1]=*lcd0_DATA;
218 pt8[2*i]=*lcd0_DATA;
219 }
220 #else
221 *lcd0_CMD=(uint8_t)0;
222 *lcd0_CMD=(uint8_t)0;
223 *lcd0_CMD=(uint8_t)0;
224 *lcd0_CMD=(uint8_t)0;
225 *lcd0_CMD=pt8[1];
226 *lcd0_CMD=pt8[0];
227 pt8 = (uint8_t*)buffer;*/
228 /*
229 * x dummy reads Cf ili9328 datasheet p79!
230 */
231 /* pt8[0]=*lcd0_DATA;
232 pt8[1]=*lcd0_DATA;
233
234 for(int i=0;i<(int)count;i++)
235 {
236 pt8[(2*i) +1]=*lcd0_DATA;
237 pt8[2*i]=*lcd0_DATA;
238 pt8[(2*i) +1]=*lcd0_DATA;
239 pt8[2*i]=*lcd0_DATA;
240 }
241 #endif*/
242 //clr_CS;
243 //clr_RS;
244 //*lcd0_CMD=(int8_t)0;
245 //*lcd0_CMD=(int8_t)0x22;
246 // *lcd0_CMD=(int8_t)0x00;
247 //set_RS;
248 pt8 = (uint8_t*)buffer;
249 //pt8[1]=*lcd0_DATA;
250 //pt8[0]=*lcd0_DATA;
251 pt8[0]=0xFF;
252 pt8[1]=0xFF;
253 /* for(int i=0;i<(int)count;i++)
254 {
255 pt8[(2*i)+1]= *lcd0_DATA;
256 pt8[2*i]= *lcd0_DATA;
257 }*/
258 set_CS;
259 }
260
261
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef D51E5TA7601_H
23 #define D51E5TA7601_H
24
25 /**
26 @todo Make an abstract layer for framebuffer devices and a painting api for it.
27 */
28
29
30 #include <genericLCD_Controler.h>
31
32 /**
33 * @brief ili9328init
34 * @param LCD
35 * @return
36 */
37
38 extern int D51E5TA7601init(struct LCD_t* LCD);
39 extern void D51E5TA7601setFrame(LCD_t* LCD,uint16_t X,uint16_t Y,uint16_t W,uint16_t H);
40 extern void D51E5TA7601setGRAMaddress(LCD_t* LCD,uint16_t Haddress,uint16_t Vaddress);
41 extern void D51E5TA7601paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
42 extern void D51E5TA7601paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
43 extern void D51E5TA7601paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
44 extern void D51E5TA7601paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
45 extern void D51E5TA7601paintFilCircMidPoint(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
46 extern void D51E5TA7601getPix(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
47 extern void D51E5TA7601refreshenable(struct LCD_t* LCD,int enable);
48 extern void D51E5TA7601paintChar(LCD_t* LCD,char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color);
49
50 #define ILI9328_REGISTER_DRIVERCODEREAD ((uint32_t) 0x0000 )
51 #define ILI9328_REGISTER_DRIVEROUTPUTCONTROL1 ((uint32_t) 0x0001 )
52 #define ILI9328_REGISTER_LCDDRIVINGCONTROL ((uint32_t) 0x0002 )
53 #define ILI9328_REGISTER_ENTRYMODE ((uint32_t) 0x0003 )
54 #define ILI9328_REGISTER_RESIZECONTROL ((uint32_t) 0x0004 )
55 #define ILI9328_REGISTER_DISPLAYCONTROL1 ((uint32_t) 0x0007 )
56 #define ILI9328_REGISTER_DISPLAYCONTROL2 ((uint32_t) 0x0008 )
57 #define ILI9328_REGISTER_DISPLAYCONTROL3 ((uint32_t) 0x0009 )
58 #define ILI9328_REGISTER_DISPLAYCONTROL4 ((uint32_t) 0x000A )
59 #define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL1 ((uint32_t) 0x000C )
60 #define ILI9328_REGISTER_FRAMEMAKERPOSITION ((uint32_t) 0x000D )
61 #define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL2 ((uint32_t) 0x000F )
62 #define ILI9328_REGISTER_POWERCONTROL1 ((uint32_t) 0x0010 )
63 #define ILI9328_REGISTER_POWERCONTROL2 ((uint32_t) 0x0011 )
64 #define ILI9328_REGISTER_POWERCONTROL3 ((uint32_t) 0x0012 )
65 #define ILI9328_REGISTER_POWERCONTROL4 ((uint32_t) 0x0013 )
66 #define ILI9328_REGISTER_HORIZONTALGRAMADDRESSSET ((uint32_t) 0x0020 )
67 #define ILI9328_REGISTER_VERTICALGRAMADDRESSSET ((uint32_t) 0x0021 )
68 #define ILI9328_REGISTER_WRITEDATATOGRAM ((uint32_t) 0x0022 )
69 #define ILI9328_REGISTER_POWERCONTROL7 ((uint32_t) 0x0029 )
70 #define ILI9328_REGISTER_FRAMERATEANDCOLORCONTROL ((uint32_t) 0x002B )
71 #define ILI9328_REGISTER_GAMMACONTROL1 ((uint32_t) 0x0030 )
72 #define ILI9328_REGISTER_GAMMACONTROL2 ((uint32_t) 0x0031 )
73 #define ILI9328_REGISTER_GAMMACONTROL3 ((uint32_t) 0x0032 )
74 #define ILI9328_REGISTER_GAMMACONTROL4 ((uint32_t) 0x0035 )
75 #define ILI9328_REGISTER_GAMMACONTROL5 ((uint32_t) 0x0036 )
76 #define ILI9328_REGISTER_GAMMACONTROL6 ((uint32_t) 0x0037 )
77 #define ILI9328_REGISTER_GAMMACONTROL7 ((uint32_t) 0x0038 )
78 #define ILI9328_REGISTER_GAMMACONTROL8 ((uint32_t) 0x0039 )
79 #define ILI9328_REGISTER_GAMMACONTROL9 ((uint32_t) 0x003C )
80 #define ILI9328_REGISTER_GAMMACONTROL10 ((uint32_t) 0x003D )
81 #define ILI9328_REGISTER_HORIZONTALADDRESSSTARTPOSITION ((uint32_t) 0x0050 )
82 #define ILI9328_REGISTER_HORIZONTALADDRESSENDPOSITION ((uint32_t) 0x0051 )
83 #define ILI9328_REGISTER_VERTICALADDRESSSTARTPOSITION ((uint32_t) 0x0052 )
84 #define ILI9328_REGISTER_VERTICALADDRESSENDPOSITION ((uint32_t) 0x0053 )
85 #define ILI9328_REGISTER_DRIVEROUTPUTCONTROL2 ((uint32_t) 0x0060 )
86 #define ILI9328_REGISTER_BASEIMAGEDISPLAYCONTROL ((uint32_t) 0x0061 )
87 #define ILI9328_REGISTER_VERTICALSCROLLCONTROL ((uint32_t) 0x006A )
88 #define ILI9328_REGISTER_PARTIALIMAGE1DISPLAYPOSITION ((uint32_t) 0x0080 )
89 #define ILI9328_REGISTER_PARTIALIMAGE1AREASTARTLINE ((uint32_t) 0x0081 )
90 #define ILI9328_REGISTER_PARTIALIMAGE1AREAENDLINE ((uint32_t) 0x0082 )
91 #define ILI9328_REGISTER_PARTIALIMAGE2DISPLAYPOSITION ((uint32_t) 0x0083 )
92 #define ILI9328_REGISTER_PARTIALIMAGE2AREASTARTLINE ((uint32_t) 0x0084 )
93 #define ILI9328_REGISTER_PARTIALIMAGE2AREAENDLINE ((uint32_t) 0x0085 )
94 #define ILI9328_REGISTER_PANELINTERFACECONTROL1 ((uint32_t) 0x0090 )
95 #define ILI9328_REGISTER_PANELINTERFACECONTROL2 ((uint32_t) 0x0092 )
96 #define ILI9328_REGISTER_PANELINTERFACECONTROL4 ((uint32_t) 0x0095 )
97 #define ILI9328_REGISTER_OTPVCMPROGRAMMINGCONTROL ((uint32_t) 0x00A1 )
98 #define ILI9328_REGISTER_OTPVCMSTATUSANDENABLE ((uint32_t) 0x00A2 )
99 #define ILI9328_REGISTER_OTPPROGRAMMINGIDKEY ((uint32_t) 0x00A5 )
100
101 #ifdef _PRVATE_D51E5TA7601_
102 void ili9328cpFrame(LCD_t* LCD,void* buffer,int x,int y,int w, int h);
103 #endif
104
105 #endif
106
107
108
109
110
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef PAINTER_H
23 #define PAINTER_H
24 #include <stdint.h>
25 #include <surface.h>
26
27 typedef struct painter
28 {
29 surface* __surface__;
30 void (*paint)(void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
31 void (*paintText)(char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
32 void (*paintFilRect)(uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
33 void (*paintFilCirc)(uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
34 void (*paintRect)(uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
35 void (*paintCirc)(uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
36 void (*getPix)(uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
37 void (*paintChar)(char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color);
38
39 } painter;
40
41
42
43
44
45
46 #endif
47
48
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef WIDGET_H
23 #define WIDGET_H
24 #include <stdint.h>
25
26 typedef struct widget
27 {
28 uint16_t Width;
29 uint16_t Height;
30 uint16_t Xpos;
31 uint16_t Ypos;
32 void (*paint)();
33 } widget;
34
35
36
37
38
39
40 #endif
41
42
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef SURFACE_H
23 #define SURFACE_H
24 #include <stdint.h>
25
26 typedef struct surface
27 {
28 uint16_t Width;
29 uint16_t Height;
30 uint16_t Xpos;
31 uint16_t Ypos;
32 void (*paint)();
33 } surface;
34
35
36
37
38
39
40 #endif
41
42
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef WIDGET_H
23 #define WIDGET_H
24 #include <stdint.h>
25
26 typedef struct widget
27 {
28 uint16_t Width;
29 uint16_t Height;
30 uint16_t Xpos;
31 uint16_t Ypos;
32 void (*paint)();
33 } widget;
34
35
36
37
38
39
40 #endif
41
42
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@gmail.com
21 -------------------------------------------------------------------------------*/
22 #ifndef PAINTING_H
23 #define PAINTING_H
24
25 #include <genericLCD_Controler.h>
26
27 /**
28 * @brief ili9328init
29 * @param LCD
30 * @return
31 */
32
33 extern void paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height);
34 extern void paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color);
35 extern void paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
36 extern void paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
37 extern void paintRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
38 extern void paintCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
39 extern void getPix(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
40 extern void paintChar(LCD_t* LCD,char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color);
41
42
43 #endif
44
45
46
47
48
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1 CPU=stm32f4xxxG
2 DEFINES+=BSP=\\\"STM32F4Discovery_35LCD\\\"
3 UCMODEL=stm32f4
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1 /* File: startup_ARMCM4.S
2 * Purpose: startup file for Cortex-M4 devices. Should use with
3 * GCC for ARM Embedded Processors
4 * Version: V2.0
5 * Date: 16 August 2013
6 *
7 /* Copyright (c) 2011 - 2013 ARM LIMITED
8
9 All rights reserved.
10 Redistribution and use in source and binary forms, with or without
11 modification, are permitted provided that the following conditions are met:
12 - Redistributions of source code must retain the above copyright
13 notice, this list of conditions and the following disclaimer.
14 - Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17 - Neither the name of ARM nor the names of its contributors may be used
18 to endorse or promote products derived from this software without
19 specific prior written permission.
20 *
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32 ---------------------------------------------------------------------------*/
33 /*
34 2013 Modified for libuc2 use by Alexis Jeandet.
35 */
36 .syntax unified
37 .cpu cortex-m4
38 .fpu fpv4-sp-d16
39
40 .section .stack
41 .align 3
42 #ifdef __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
44 #else
45 .equ Stack_Size, 0x2000
46 #endif
47 .globl __StackTop
48 .globl __StackLimit
49 __StackLimit:
50 .space Stack_Size
51 .size __StackLimit, . - __StackLimit
52 __StackTop:
53 .size __StackTop, . - __StackTop
54
55 .section .heap
56 .align 3
57 #ifdef __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
59 #else
60 .equ Heap_Size, 0x2000
61 #endif
62 .globl __HeapBase
63 .globl __HeapLimit
64 __HeapBase:
65 .if Heap_Size
66 .space Heap_Size
67 .endif
68 .size __HeapBase, . - __HeapBase
69 __HeapLimit:
70 .size __HeapLimit, . - __HeapLimit
71
72 .section .isr_vector
73 .align 2
74 .globl __isr_vector
75 __isr_vector:
76 .long __StackTop /* Top of Stack */
77 .long Reset_Handler /* Reset Handler */
78 .long NMI_Handler /* NMI Handler */
79 .long HardFault_Handler /* Hard Fault Handler */
80 .long MemManage_Handler /* MPU Fault Handler */
81 .long BusFault_Handler /* Bus Fault Handler */
82 .long UsageFault_Handler /* Usage Fault Handler */
83 .long 0 /* Reserved */
84 .long 0 /* Reserved */
85 .long 0 /* Reserved */
86 .long 0 /* Reserved */
87 .long SVC_Handler /* SVCall Handler */
88 .long DebugMon_Handler /* Debug Monitor Handler */
89 .long 0 /* Reserved */
90 .long PendSV_Handler /* PendSV Handler */
91 .long SysTick_Handler /* SysTick Handler */
92
93 /* External interrupts */
94 .word WWDG_IRQHandler /* Window WatchDog */
95 .word PVD_IRQHandler /* PVD through EXTI Line detection */
96 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
97 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
98 .word FLASH_IRQHandler /* FLASH */
99 .word RCC_IRQHandler /* RCC */
100 .word EXTI0_IRQHandler /* EXTI Line0 */
101 .word EXTI1_IRQHandler /* EXTI Line1 */
102 .word EXTI2_IRQHandler /* EXTI Line2 */
103 .word EXTI3_IRQHandler /* EXTI Line3 */
104 .word EXTI4_IRQHandler /* EXTI Line4 */
105 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
106 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
107 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
108 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
109 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
110 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
111 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
112 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
113 .word CAN1_TX_IRQHandler /* CAN1 TX */
114 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
115 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
116 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
117 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
118 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
119 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
120 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
121 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
122 .word TIM2_IRQHandler /* TIM2 */
123 .word TIM3_IRQHandler /* TIM3 */
124 .word TIM4_IRQHandler /* TIM4 */
125 .word I2C1_EV_IRQHandler /* I2C1 Event */
126 .word I2C1_ER_IRQHandler /* I2C1 Error */
127 .word I2C2_EV_IRQHandler /* I2C2 Event */
128 .word I2C2_ER_IRQHandler /* I2C2 Error */
129 .word SPI1_IRQHandler /* SPI1 */
130 .word SPI2_IRQHandler /* SPI2 */
131 .word USART1_IRQHandler /* USART1 */
132 .word USART2_IRQHandler /* USART2 */
133 .word USART3_IRQHandler /* USART3 */
134 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
135 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
136 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
137 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
138 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
139 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
140 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
141 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
142 .word FSMC_IRQHandler /* FSMC */
143 .word SDIO_IRQHandler /* SDIO */
144 .word TIM5_IRQHandler /* TIM5 */
145 .word SPI3_IRQHandler /* SPI3 */
146 .word UART4_IRQHandler /* UART4 */
147 .word UART5_IRQHandler /* UART5 */
148 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
149 .word TIM7_IRQHandler /* TIM7 */
150 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
151 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
152 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
153 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
154 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
155 .word ETH_IRQHandler /* Ethernet */
156 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
157 .word CAN2_TX_IRQHandler /* CAN2 TX */
158 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
159 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
160 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
161 .word OTG_FS_IRQHandler /* USB OTG FS */
162 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
163 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
164 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
165 .word USART6_IRQHandler /* USART6 */
166 .word I2C3_EV_IRQHandler /* I2C3 event */
167 .word I2C3_ER_IRQHandler /* I2C3 error */
168 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
169 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
170 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
171 .word OTG_HS_IRQHandler /* USB OTG HS */
172 .word DCMI_IRQHandler /* DCMI */
173 .word CRYP_IRQHandler /* CRYP crypto */
174 .word HASH_RNG_IRQHandler /* Hash and Rng */
175 .word FPU_IRQHandler /* FPU */
176
177
178 .size __isr_vector, . - __isr_vector
179
180 .text
181 .thumb
182 .thumb_func
183 .align 2
184 .globl Reset_Handler
185 .type Reset_Handler, %function
186 Reset_Handler:
187 /* Firstly it copies data from read only memory to RAM. There are two schemes
188 * to copy. One can copy more than one sections. Another can only copy
189 * one section. The former scheme needs more instructions and read-only
190 * data to implement than the latter.
191 * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
192
193 /* Single section scheme.
194 *
195 * The ranges of copy from/to are specified by following symbols
196 * __etext: LMA of start of the section to copy from. Usually end of text
197 * __data_start__: VMA of start of the section to copy to
198 * __data_end__: VMA of end of the section to copy to
199 *
200 * All addresses must be aligned to 4 bytes boundary.
201 */
202 ldr r1, =__etext
203 ldr r2, =__data_start__
204 ldr r3, =__data_end__
205
206 .L_loop1:
207 cmp r2, r3
208 ittt lt
209 ldrlt r0, [r1], #4
210 strlt r0, [r2], #4
211 blt .L_loop1
212
213 /* This part of work usually is done in C library startup code. Otherwise,
214 * define this macro to enable it in this startup.
215 *
216 * There are two schemes too. One can clear multiple BSS sections. Another
217 * can only clear one section. The former is more size expensive than the
218 * latter.
219 *
220 * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
221 * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
222 */
223
224 /* Single BSS section scheme.
225 *
226 * The BSS section is specified by following symbols
227 * __bss_start__: start of the BSS section.
228 * __bss_end__: end of the BSS section.
229 *
230 * Both addresses must be aligned to 4 bytes boundary.
231 */
232 ldr r1, =__bss_start__
233 ldr r2, =__bss_end__
234
235 movs r0, 0
236 .L_loop3:
237 cmp r1, r2
238 itt lt
239 strlt r0, [r1], #4
240 blt .L_loop3
241
242 bl main
243
244
245 .pool
246 .size Reset_Handler, . - Reset_Handler
247
248 .align 1
249 .thumb_func
250 .weak Default_Handler
251 .type Default_Handler, %function
252 Default_Handler:
253 b .
254 .size Default_Handler, . - Default_Handler
255
256 /* Macro to define default handlers. Default handler
257 * will be weak symbol and just dead loops. They can be
258 * overwritten by other handlers */
259 .macro def_irq_handler handler_name
260 .weak \handler_name
261 .set \handler_name, Default_Handler
262 .endm
263
264 def_irq_handler NMI_Handler
265 def_irq_handler HardFault_Handler
266 def_irq_handler MemManage_Handler
267 def_irq_handler BusFault_Handler
268 def_irq_handler UsageFault_Handler
269 def_irq_handler SVC_Handler
270 def_irq_handler DebugMon_Handler
271 def_irq_handler PendSV_Handler
272 def_irq_handler SysTick_Handler
273 def_irq_handler DEF_IRQHandler
274
275 def_irq_handler WWDG_IRQHandler
276 def_irq_handler PVD_IRQHandler
277 def_irq_handler TAMP_STAMP_IRQHandler
278 def_irq_handler RTC_WKUP_IRQHandler
279 def_irq_handler FLASH_IRQHandler
280 def_irq_handler RCC_IRQHandler
281 def_irq_handler EXTI0_IRQHandler
282 def_irq_handler EXTI1_IRQHandler
283 def_irq_handler EXTI2_IRQHandler
284 def_irq_handler EXTI3_IRQHandler
285 def_irq_handler EXTI4_IRQHandler
286 def_irq_handler DMA1_Stream0_IRQHandler
287 def_irq_handler DMA1_Stream1_IRQHandler
288 def_irq_handler DMA1_Stream2_IRQHandler
289 def_irq_handler DMA1_Stream3_IRQHandler
290 def_irq_handler DMA1_Stream4_IRQHandler
291 def_irq_handler DMA1_Stream5_IRQHandler
292 def_irq_handler DMA1_Stream6_IRQHandler
293 def_irq_handler ADC_IRQHandler
294 def_irq_handler CAN1_TX_IRQHandler
295 def_irq_handler CAN1_RX0_IRQHandler
296 def_irq_handler CAN1_RX1_IRQHandler
297 def_irq_handler CAN1_SCE_IRQHandler
298 def_irq_handler EXTI9_5_IRQHandler
299 def_irq_handler TIM1_BRK_TIM9_IRQHandler
300 def_irq_handler TIM1_UP_TIM10_IRQHandler
301 def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler
302 def_irq_handler TIM1_CC_IRQHandler
303 def_irq_handler TIM2_IRQHandler
304 def_irq_handler TIM3_IRQHandler
305 def_irq_handler TIM4_IRQHandler
306 def_irq_handler I2C1_EV_IRQHandler
307 def_irq_handler I2C1_ER_IRQHandler
308 def_irq_handler I2C2_EV_IRQHandler
309 def_irq_handler I2C2_ER_IRQHandler
310 def_irq_handler SPI1_IRQHandler
311 def_irq_handler SPI2_IRQHandler
312 def_irq_handler USART1_IRQHandler
313 def_irq_handler USART2_IRQHandler
314 def_irq_handler USART3_IRQHandler
315 def_irq_handler EXTI15_10_IRQHandler
316 def_irq_handler RTC_Alarm_IRQHandler
317 def_irq_handler OTG_FS_WKUP_IRQHandler
318 def_irq_handler TIM8_BRK_TIM12_IRQHandler
319 def_irq_handler TIM8_UP_TIM13_IRQHandler
320 def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler
321 def_irq_handler TIM8_CC_IRQHandler
322 def_irq_handler DMA1_Stream7_IRQHandler
323 def_irq_handler FSMC_IRQHandler
324 def_irq_handler SDIO_IRQHandler
325 def_irq_handler TIM5_IRQHandler
326 def_irq_handler SPI3_IRQHandler
327 def_irq_handler UART4_IRQHandler
328 def_irq_handler UART5_IRQHandler
329 def_irq_handler TIM6_DAC_IRQHandler
330 def_irq_handler TIM7_IRQHandler
331 def_irq_handler DMA2_Stream0_IRQHandler
332 def_irq_handler DMA2_Stream1_IRQHandler
333 def_irq_handler DMA2_Stream2_IRQHandler
334 def_irq_handler DMA2_Stream3_IRQHandler
335 def_irq_handler DMA2_Stream4_IRQHandler
336 def_irq_handler ETH_IRQHandler
337 def_irq_handler ETH_WKUP_IRQHandler
338 def_irq_handler CAN2_TX_IRQHandler
339 def_irq_handler CAN2_RX0_IRQHandler
340 def_irq_handler CAN2_RX1_IRQHandler
341 def_irq_handler CAN2_SCE_IRQHandler
342 def_irq_handler OTG_FS_IRQHandler
343 def_irq_handler DMA2_Stream5_IRQHandler
344 def_irq_handler DMA2_Stream6_IRQHandler
345 def_irq_handler DMA2_Stream7_IRQHandler
346 def_irq_handler USART6_IRQHandler
347 def_irq_handler I2C3_EV_IRQHandler
348 def_irq_handler I2C3_ER_IRQHandler
349 def_irq_handler OTG_HS_EP1_OUT_IRQHandler
350 def_irq_handler OTG_HS_EP1_IN_IRQHandler
351 def_irq_handler OTG_HS_WKUP_IRQHandler
352 def_irq_handler OTG_HS_IRQHandler
353 def_irq_handler DCMI_IRQHandler
354 def_irq_handler CRYP_IRQHandler
355 def_irq_handler HASH_RNG_IRQHandler
356 def_irq_handler FPU_IRQHandler
357
358 .end
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@@ -0,0 +1,216
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
35 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0
36 BANK1_SRAM2 (!ixrw): ORIGIN = 0x64000000, LENGTH = 64M
37 }
38
39 /* Linker script to place sections and symbol values. Should be used together
40 * with other linker script that defines memory regions FLASH and RAM.
41 * It references following symbols, which must be defined in code:
42 * Reset_Handler : Entry of reset handler
43 *
44 * It defines following symbols, which code can use without definition:
45 * __exidx_start
46 * __exidx_end
47 * __copy_table_start__
48 * __copy_table_end__
49 * __zero_table_start__
50 * __zero_table_end__
51 * __etext
52 * __data_start__
53 * __preinit_array_start
54 * __preinit_array_end
55 * __init_array_start
56 * __init_array_end
57 * __fini_array_start
58 * __fini_array_end
59 * __data_end__
60 * __bss_start__
61 * __bss_end__
62 * __end__
63 * end
64 * __HeapLimit
65 * __StackLimit
66 * __StackTop
67 * __stack
68 */
69 ENTRY(Reset_Handler)
70
71 SECTIONS
72 {
73 .text :
74 {
75 KEEP(*(.isr_vector))
76 *(.text*)
77
78 *(.init)
79 *(.fini)
80
81 /* .ctors */
82 *crtbegin.o(.ctors)
83 *crtbegin?.o(.ctors)
84 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
85 *(SORT(.ctors.*))
86 *(.ctors)
87
88 /* .dtors */
89 *crtbegin.o(.dtors)
90 *crtbegin?.o(.dtors)
91 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
92 *(SORT(.dtors.*))
93 *(.dtors)
94
95 *(.rodata*)
96
97 *(.eh_frame*)
98 } > FLASH
99
100 .ARM.extab :
101 {
102 *(.ARM.extab* .gnu.linkonce.armextab.*)
103 } > FLASH
104
105 __exidx_start = .;
106 .ARM.exidx :
107 {
108 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
109 } > FLASH
110 __exidx_end = .;
111
112 /* To copy multiple ROM to RAM sections,
113 * uncomment .copy.table section and,
114 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
115 /*
116 .copy.table :
117 {
118 . = ALIGN(4);
119 __copy_table_start__ = .;
120 LONG (__etext)
121 LONG (__data_start__)
122 LONG (__data_end__ - __data_start__)
123 LONG (__etext2)
124 LONG (__data2_start__)
125 LONG (__data2_end__ - __data2_start__)
126 __copy_table_end__ = .;
127 } > FLASH
128 */
129
130 /* To clear multiple BSS sections,
131 * uncomment .zero.table section and,
132 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
133 /*
134 .zero.table :
135 {
136 . = ALIGN(4);
137 __zero_table_start__ = .;
138 LONG (__bss_start__)
139 LONG (__bss_end__ - __bss_start__)
140 LONG (__bss2_start__)
141 LONG (__bss2_end__ - __bss2_start__)
142 __zero_table_end__ = .;
143 } > FLASH
144 */
145
146 __etext = .;
147
148 .data : AT (__etext)
149 {
150 __data_start__ = .;
151 *(vtable)
152 *(.data*)
153
154 . = ALIGN(4);
155 /* preinit data */
156 PROVIDE_HIDDEN (__preinit_array_start = .);
157 *(.preinit_array)
158 PROVIDE_HIDDEN (__preinit_array_end = .);
159
160 . = ALIGN(4);
161 /* init data */
162 PROVIDE_HIDDEN (__init_array_start = .);
163 *(SORT(.init_array.*))
164 *(.init_array)
165 PROVIDE_HIDDEN (__init_array_end = .);
166
167
168 . = ALIGN(4);
169 /* finit data */
170 PROVIDE_HIDDEN (__fini_array_start = .);
171 *(SORT(.fini_array.*))
172 *(.fini_array)
173 PROVIDE_HIDDEN (__fini_array_end = .);
174
175 *(.jcr)
176 . = ALIGN(4);
177 /* All data end */
178 __data_end__ = .;
179
180 } > RAM
181
182 .bss :
183 {
184 . = ALIGN(4);
185 __bss_start__ = .;
186 *(.bss*)
187 *(COMMON)
188 . = ALIGN(4);
189 __bss_end__ = .;
190 } > RAM
191
192 .heap (COPY):
193 {
194 __end__ = .;
195 PROVIDE(end = .);
196 *(.heap*)
197 __HeapLimit = .;
198 } > RAM
199
200 /* .stack_dummy section doesn't contains any symbols. It is only
201 * used for linker to calculate size of stack sections, and assign
202 * values to stack symbols later */
203 .stack_dummy (COPY):
204 {
205 *(.stack*)
206 } > RAM
207
208 /* Set stack top to end of RAM, and stack limit move down by
209 * size of stack_dummy section */
210 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
211 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
212 PROVIDE(__stack = __StackTop);
213
214 /* Check if data + heap + stack exceeds RAM limit */
215 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
216 }
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1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 ETHRAM (xrw) : ORIGIN = 0x2001C000, LENGTH = 16k
35 AUXRAM (xrw) : ORIGIN = 0x20020000, LENGTH = 64k
36 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
37 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
38 }
39
40 /* Linker script to place sections and symbol values. Should be used together
41 * with other linker script that defines memory regions FLASH and RAM.
42 * It references following symbols, which must be defined in code:
43 * Reset_Handler : Entry of reset handler
44 *
45 * It defines following symbols, which code can use without definition:
46 * __exidx_start
47 * __exidx_end
48 * __copy_table_start__
49 * __copy_table_end__
50 * __zero_table_start__
51 * __zero_table_end__
52 * __etext
53 * __data_start__
54 * __preinit_array_start
55 * __preinit_array_end
56 * __init_array_start
57 * __init_array_end
58 * __fini_array_start
59 * __fini_array_end
60 * __data_end__
61 * __bss_start__
62 * __bss_end__
63 * __end__
64 * end
65 * __HeapLimit
66 * __StackLimit
67 * __StackTop
68 * __stack
69 */
70 ENTRY(Reset_Handler)
71
72 SECTIONS
73 {
74 .text :
75 {
76 KEEP(*(.isr_vector))
77 *(.text*)
78
79 *(.init)
80 *(.fini)
81
82 /* .ctors */
83 *crtbegin.o(.ctors)
84 *crtbegin?.o(.ctors)
85 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
86 *(SORT(.ctors.*))
87 *(.ctors)
88
89 /* .dtors */
90 *crtbegin.o(.dtors)
91 *crtbegin?.o(.dtors)
92 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
93 *(SORT(.dtors.*))
94 *(.dtors)
95
96 *(.rodata*)
97
98 *(.eh_frame*)
99 } > FLASH
100
101 .ARM.extab :
102 {
103 *(.ARM.extab* .gnu.linkonce.armextab.*)
104 } > FLASH
105
106 __exidx_start = .;
107 .ARM.exidx :
108 {
109 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
110 } > FLASH
111 __exidx_end = .;
112
113 /* To copy multiple ROM to RAM sections,
114 * uncomment .copy.table section and,
115 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
116 /*
117 .copy.table :
118 {
119 . = ALIGN(4);
120 __copy_table_start__ = .;
121 LONG (__etext)
122 LONG (__data_start__)
123 LONG (__data_end__ - __data_start__)
124 LONG (__etext2)
125 LONG (__data2_start__)
126 LONG (__data2_end__ - __data2_start__)
127 __copy_table_end__ = .;
128 } > FLASH
129 */
130
131 /* To clear multiple BSS sections,
132 * uncomment .zero.table section and,
133 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
134 /*
135 .zero.table :
136 {
137 . = ALIGN(4);
138 __zero_table_start__ = .;
139 LONG (__bss_start__)
140 LONG (__bss_end__ - __bss_start__)
141 LONG (__bss2_start__)
142 LONG (__bss2_end__ - __bss2_start__)
143 __zero_table_end__ = .;
144 } > FLASH
145 */
146
147 __etext = .;
148
149 .data : AT (__etext)
150 {
151 __data_start__ = .;
152 *(vtable)
153 *(.data*)
154
155 . = ALIGN(4);
156 /* preinit data */
157 PROVIDE_HIDDEN (__preinit_array_start = .);
158 *(.preinit_array)
159 PROVIDE_HIDDEN (__preinit_array_end = .);
160
161 . = ALIGN(4);
162 /* init data */
163 PROVIDE_HIDDEN (__init_array_start = .);
164 *(SORT(.init_array.*))
165 *(.init_array)
166 PROVIDE_HIDDEN (__init_array_end = .);
167
168
169 . = ALIGN(4);
170 /* finit data */
171 PROVIDE_HIDDEN (__fini_array_start = .);
172 *(SORT(.fini_array.*))
173 *(.fini_array)
174 PROVIDE_HIDDEN (__fini_array_end = .);
175
176 *(.jcr)
177 . = ALIGN(4);
178 /* All data end */
179 __data_end__ = .;
180
181 } > RAM
182
183 .bss :
184 {
185 . = ALIGN(4);
186 __bss_start__ = .;
187 *(.bss*)
188 *(COMMON)
189 . = ALIGN(4);
190 __bss_end__ = .;
191 } > RAM
192
193 .heap (COPY):
194 {
195 __end__ = .;
196 PROVIDE(end = .);
197 *(.heap*)
198 __HeapLimit = .;
199 } > RAM
200
201 /* .stack_dummy section doesn't contains any symbols. It is only
202 * used for linker to calculate size of stack sections, and assign
203 * values to stack symbols later */
204 .stack_dummy (COPY):
205 {
206 *(.stack*)
207 } > RAM
208
209 /* Set stack top to end of RAM, and stack limit move down by
210 * size of stack_dummy section */
211 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
212 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
213 PROVIDE(__stack = __StackTop);
214
215 /* Check if data + heap + stack exceeds RAM limit */
216 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
217 }
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@@ -0,0 +1,44
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2012, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #define _PRVATE_D51E5TA7601_
23 #include <D51E5TA7601.h>
24 #include <stdio.h>
25 #include <stddef.h>
26 #include <core.h>
27 #include <math.h>
28 #include <malloc.h>
29
30 #ifdef __OPTIMIZED_MATH
31 #include <optimised_math.h>
32 #endif
33
34
35
36
37
38
39
40
41
42
43
44
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@@ -0,0 +1,9
1 TEMPLATE = lib
2 CONFIG += libuc2lib
3 TARGET = D51E5TA7601
4
5 SOURCES += \
6 D51E5TA7601.c
7
8
9
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@@ -0,0 +1,12
1 TEMPLATE = lib
2 CONFIG += libuc2lib
3 TARGET = painting
4
5 SOURCES += \
6 painting.c
7
8 HEADERS += \
9 ../../../../include/GRAPHIC/PAINTING/painting.h
10
11
12
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@@ -0,0 +1,87
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22 #include <stdio.h>
23 #include <stddef.h>
24 #include <core.h>
25 #include <math.h>
26 #include <malloc.h>
27 #include <genericLCD_Controler.h>
28
29 #ifdef __OPTIMIZED_MATH
30 #include <optimised_math.h>
31 #endif
32
33
34
35
36 void paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height)
37 {
38
39 }
40
41 void paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color)
42 {
43
44 }
45
46 void paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
47 {
48
49 }
50
51 void paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
52 {
53
54 }
55
56 void paintRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
57 {
58
59 }
60
61 void paintCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor)
62 {
63
64 }
65
66 void getPix(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h)
67 {
68
69 }
70
71 void paintChar(LCD_t* LCD,char buffer,uint16_t Xpos,uint16_t Ypos,sFONT* font,uint32_t color)
72 {
73
74 }
75
76
77
78
79
80
81
82
83
84
85
86
87
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@@ -0,0 +1,358
1 /* File: startup_ARMCM4.S
2 * Purpose: startup file for Cortex-M4 devices. Should use with
3 * GCC for ARM Embedded Processors
4 * Version: V2.0
5 * Date: 16 August 2013
6 *
7 /* Copyright (c) 2011 - 2013 ARM LIMITED
8
9 All rights reserved.
10 Redistribution and use in source and binary forms, with or without
11 modification, are permitted provided that the following conditions are met:
12 - Redistributions of source code must retain the above copyright
13 notice, this list of conditions and the following disclaimer.
14 - Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
17 - Neither the name of ARM nor the names of its contributors may be used
18 to endorse or promote products derived from this software without
19 specific prior written permission.
20 *
21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 POSSIBILITY OF SUCH DAMAGE.
32 ---------------------------------------------------------------------------*/
33 /*
34 2013 Modified for libuc2 use by Alexis Jeandet.
35 */
36 .syntax unified
37 .cpu cortex-m4
38 .fpu fpv4-sp-d16
39
40 .section .stack
41 .align 3
42 #ifdef __STACK_SIZE
43 .equ Stack_Size, __STACK_SIZE
44 #else
45 .equ Stack_Size, 0x2000
46 #endif
47 .globl __StackTop
48 .globl __StackLimit
49 __StackLimit:
50 .space Stack_Size
51 .size __StackLimit, . - __StackLimit
52 __StackTop:
53 .size __StackTop, . - __StackTop
54
55 .section .heap
56 .align 3
57 #ifdef __HEAP_SIZE
58 .equ Heap_Size, __HEAP_SIZE
59 #else
60 .equ Heap_Size, 0x2000
61 #endif
62 .globl __HeapBase
63 .globl __HeapLimit
64 __HeapBase:
65 .if Heap_Size
66 .space Heap_Size
67 .endif
68 .size __HeapBase, . - __HeapBase
69 __HeapLimit:
70 .size __HeapLimit, . - __HeapLimit
71
72 .section .isr_vector
73 .align 2
74 .globl __isr_vector
75 __isr_vector:
76 .long __StackTop /* Top of Stack */
77 .long Reset_Handler /* Reset Handler */
78 .long NMI_Handler /* NMI Handler */
79 .long HardFault_Handler /* Hard Fault Handler */
80 .long MemManage_Handler /* MPU Fault Handler */
81 .long BusFault_Handler /* Bus Fault Handler */
82 .long UsageFault_Handler /* Usage Fault Handler */
83 .long 0 /* Reserved */
84 .long 0 /* Reserved */
85 .long 0 /* Reserved */
86 .long 0 /* Reserved */
87 .long SVC_Handler /* SVCall Handler */
88 .long DebugMon_Handler /* Debug Monitor Handler */
89 .long 0 /* Reserved */
90 .long PendSV_Handler /* PendSV Handler */
91 .long SysTick_Handler /* SysTick Handler */
92
93 /* External interrupts */
94 .word WWDG_IRQHandler /* Window WatchDog */
95 .word PVD_IRQHandler /* PVD through EXTI Line detection */
96 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
97 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
98 .word FLASH_IRQHandler /* FLASH */
99 .word RCC_IRQHandler /* RCC */
100 .word EXTI0_IRQHandler /* EXTI Line0 */
101 .word EXTI1_IRQHandler /* EXTI Line1 */
102 .word EXTI2_IRQHandler /* EXTI Line2 */
103 .word EXTI3_IRQHandler /* EXTI Line3 */
104 .word EXTI4_IRQHandler /* EXTI Line4 */
105 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
106 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
107 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
108 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
109 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
110 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
111 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
112 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
113 .word CAN1_TX_IRQHandler /* CAN1 TX */
114 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
115 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
116 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
117 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
118 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
119 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
120 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
121 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
122 .word TIM2_IRQHandler /* TIM2 */
123 .word TIM3_IRQHandler /* TIM3 */
124 .word TIM4_IRQHandler /* TIM4 */
125 .word I2C1_EV_IRQHandler /* I2C1 Event */
126 .word I2C1_ER_IRQHandler /* I2C1 Error */
127 .word I2C2_EV_IRQHandler /* I2C2 Event */
128 .word I2C2_ER_IRQHandler /* I2C2 Error */
129 .word SPI1_IRQHandler /* SPI1 */
130 .word SPI2_IRQHandler /* SPI2 */
131 .word USART1_IRQHandler /* USART1 */
132 .word USART2_IRQHandler /* USART2 */
133 .word USART3_IRQHandler /* USART3 */
134 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
135 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
136 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
137 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
138 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
139 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
140 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
141 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
142 .word FSMC_IRQHandler /* FSMC */
143 .word SDIO_IRQHandler /* SDIO */
144 .word TIM5_IRQHandler /* TIM5 */
145 .word SPI3_IRQHandler /* SPI3 */
146 .word UART4_IRQHandler /* UART4 */
147 .word UART5_IRQHandler /* UART5 */
148 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
149 .word TIM7_IRQHandler /* TIM7 */
150 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
151 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
152 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
153 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
154 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
155 .word ETH_IRQHandler /* Ethernet */
156 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
157 .word CAN2_TX_IRQHandler /* CAN2 TX */
158 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
159 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
160 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
161 .word OTG_FS_IRQHandler /* USB OTG FS */
162 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
163 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
164 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
165 .word USART6_IRQHandler /* USART6 */
166 .word I2C3_EV_IRQHandler /* I2C3 event */
167 .word I2C3_ER_IRQHandler /* I2C3 error */
168 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
169 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
170 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
171 .word OTG_HS_IRQHandler /* USB OTG HS */
172 .word DCMI_IRQHandler /* DCMI */
173 .word CRYP_IRQHandler /* CRYP crypto */
174 .word HASH_RNG_IRQHandler /* Hash and Rng */
175 .word FPU_IRQHandler /* FPU */
176
177
178 .size __isr_vector, . - __isr_vector
179
180 .text
181 .thumb
182 .thumb_func
183 .align 2
184 .globl Reset_Handler
185 .type Reset_Handler, %function
186 Reset_Handler:
187 /* Firstly it copies data from read only memory to RAM. There are two schemes
188 * to copy. One can copy more than one sections. Another can only copy
189 * one section. The former scheme needs more instructions and read-only
190 * data to implement than the latter.
191 * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
192
193 /* Single section scheme.
194 *
195 * The ranges of copy from/to are specified by following symbols
196 * __etext: LMA of start of the section to copy from. Usually end of text
197 * __data_start__: VMA of start of the section to copy to
198 * __data_end__: VMA of end of the section to copy to
199 *
200 * All addresses must be aligned to 4 bytes boundary.
201 */
202 ldr r1, =__etext
203 ldr r2, =__data_start__
204 ldr r3, =__data_end__
205
206 .L_loop1:
207 cmp r2, r3
208 ittt lt
209 ldrlt r0, [r1], #4
210 strlt r0, [r2], #4
211 blt .L_loop1
212
213 /* This part of work usually is done in C library startup code. Otherwise,
214 * define this macro to enable it in this startup.
215 *
216 * There are two schemes too. One can clear multiple BSS sections. Another
217 * can only clear one section. The former is more size expensive than the
218 * latter.
219 *
220 * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
221 * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
222 */
223
224 /* Single BSS section scheme.
225 *
226 * The BSS section is specified by following symbols
227 * __bss_start__: start of the BSS section.
228 * __bss_end__: end of the BSS section.
229 *
230 * Both addresses must be aligned to 4 bytes boundary.
231 */
232 ldr r1, =__bss_start__
233 ldr r2, =__bss_end__
234
235 movs r0, 0
236 .L_loop3:
237 cmp r1, r2
238 itt lt
239 strlt r0, [r1], #4
240 blt .L_loop3
241
242 bl main
243
244
245 .pool
246 .size Reset_Handler, . - Reset_Handler
247
248 .align 1
249 .thumb_func
250 .weak Default_Handler
251 .type Default_Handler, %function
252 Default_Handler:
253 b .
254 .size Default_Handler, . - Default_Handler
255
256 /* Macro to define default handlers. Default handler
257 * will be weak symbol and just dead loops. They can be
258 * overwritten by other handlers */
259 .macro def_irq_handler handler_name
260 .weak \handler_name
261 .set \handler_name, Default_Handler
262 .endm
263
264 def_irq_handler NMI_Handler
265 def_irq_handler HardFault_Handler
266 def_irq_handler MemManage_Handler
267 def_irq_handler BusFault_Handler
268 def_irq_handler UsageFault_Handler
269 def_irq_handler SVC_Handler
270 def_irq_handler DebugMon_Handler
271 def_irq_handler PendSV_Handler
272 def_irq_handler SysTick_Handler
273 def_irq_handler DEF_IRQHandler
274
275 def_irq_handler WWDG_IRQHandler
276 def_irq_handler PVD_IRQHandler
277 def_irq_handler TAMP_STAMP_IRQHandler
278 def_irq_handler RTC_WKUP_IRQHandler
279 def_irq_handler FLASH_IRQHandler
280 def_irq_handler RCC_IRQHandler
281 def_irq_handler EXTI0_IRQHandler
282 def_irq_handler EXTI1_IRQHandler
283 def_irq_handler EXTI2_IRQHandler
284 def_irq_handler EXTI3_IRQHandler
285 def_irq_handler EXTI4_IRQHandler
286 def_irq_handler DMA1_Stream0_IRQHandler
287 def_irq_handler DMA1_Stream1_IRQHandler
288 def_irq_handler DMA1_Stream2_IRQHandler
289 def_irq_handler DMA1_Stream3_IRQHandler
290 def_irq_handler DMA1_Stream4_IRQHandler
291 def_irq_handler DMA1_Stream5_IRQHandler
292 def_irq_handler DMA1_Stream6_IRQHandler
293 def_irq_handler ADC_IRQHandler
294 def_irq_handler CAN1_TX_IRQHandler
295 def_irq_handler CAN1_RX0_IRQHandler
296 def_irq_handler CAN1_RX1_IRQHandler
297 def_irq_handler CAN1_SCE_IRQHandler
298 def_irq_handler EXTI9_5_IRQHandler
299 def_irq_handler TIM1_BRK_TIM9_IRQHandler
300 def_irq_handler TIM1_UP_TIM10_IRQHandler
301 def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler
302 def_irq_handler TIM1_CC_IRQHandler
303 def_irq_handler TIM2_IRQHandler
304 def_irq_handler TIM3_IRQHandler
305 def_irq_handler TIM4_IRQHandler
306 def_irq_handler I2C1_EV_IRQHandler
307 def_irq_handler I2C1_ER_IRQHandler
308 def_irq_handler I2C2_EV_IRQHandler
309 def_irq_handler I2C2_ER_IRQHandler
310 def_irq_handler SPI1_IRQHandler
311 def_irq_handler SPI2_IRQHandler
312 def_irq_handler USART1_IRQHandler
313 def_irq_handler USART2_IRQHandler
314 def_irq_handler USART3_IRQHandler
315 def_irq_handler EXTI15_10_IRQHandler
316 def_irq_handler RTC_Alarm_IRQHandler
317 def_irq_handler OTG_FS_WKUP_IRQHandler
318 def_irq_handler TIM8_BRK_TIM12_IRQHandler
319 def_irq_handler TIM8_UP_TIM13_IRQHandler
320 def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler
321 def_irq_handler TIM8_CC_IRQHandler
322 def_irq_handler DMA1_Stream7_IRQHandler
323 def_irq_handler FSMC_IRQHandler
324 def_irq_handler SDIO_IRQHandler
325 def_irq_handler TIM5_IRQHandler
326 def_irq_handler SPI3_IRQHandler
327 def_irq_handler UART4_IRQHandler
328 def_irq_handler UART5_IRQHandler
329 def_irq_handler TIM6_DAC_IRQHandler
330 def_irq_handler TIM7_IRQHandler
331 def_irq_handler DMA2_Stream0_IRQHandler
332 def_irq_handler DMA2_Stream1_IRQHandler
333 def_irq_handler DMA2_Stream2_IRQHandler
334 def_irq_handler DMA2_Stream3_IRQHandler
335 def_irq_handler DMA2_Stream4_IRQHandler
336 def_irq_handler ETH_IRQHandler
337 def_irq_handler ETH_WKUP_IRQHandler
338 def_irq_handler CAN2_TX_IRQHandler
339 def_irq_handler CAN2_RX0_IRQHandler
340 def_irq_handler CAN2_RX1_IRQHandler
341 def_irq_handler CAN2_SCE_IRQHandler
342 def_irq_handler OTG_FS_IRQHandler
343 def_irq_handler DMA2_Stream5_IRQHandler
344 def_irq_handler DMA2_Stream6_IRQHandler
345 def_irq_handler DMA2_Stream7_IRQHandler
346 def_irq_handler USART6_IRQHandler
347 def_irq_handler I2C3_EV_IRQHandler
348 def_irq_handler I2C3_ER_IRQHandler
349 def_irq_handler OTG_HS_EP1_OUT_IRQHandler
350 def_irq_handler OTG_HS_EP1_IN_IRQHandler
351 def_irq_handler OTG_HS_WKUP_IRQHandler
352 def_irq_handler OTG_HS_IRQHandler
353 def_irq_handler DCMI_IRQHandler
354 def_irq_handler CRYP_IRQHandler
355 def_irq_handler HASH_RNG_IRQHandler
356 def_irq_handler FPU_IRQHandler
357
358 .end
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@@ -0,0 +1,216
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
35 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0
36 BANK1_SRAM2 (!ixrw): ORIGIN = 0x64000000, LENGTH = 64M
37 }
38
39 /* Linker script to place sections and symbol values. Should be used together
40 * with other linker script that defines memory regions FLASH and RAM.
41 * It references following symbols, which must be defined in code:
42 * Reset_Handler : Entry of reset handler
43 *
44 * It defines following symbols, which code can use without definition:
45 * __exidx_start
46 * __exidx_end
47 * __copy_table_start__
48 * __copy_table_end__
49 * __zero_table_start__
50 * __zero_table_end__
51 * __etext
52 * __data_start__
53 * __preinit_array_start
54 * __preinit_array_end
55 * __init_array_start
56 * __init_array_end
57 * __fini_array_start
58 * __fini_array_end
59 * __data_end__
60 * __bss_start__
61 * __bss_end__
62 * __end__
63 * end
64 * __HeapLimit
65 * __StackLimit
66 * __StackTop
67 * __stack
68 */
69 ENTRY(Reset_Handler)
70
71 SECTIONS
72 {
73 .text :
74 {
75 KEEP(*(.isr_vector))
76 *(.text*)
77
78 *(.init)
79 *(.fini)
80
81 /* .ctors */
82 *crtbegin.o(.ctors)
83 *crtbegin?.o(.ctors)
84 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
85 *(SORT(.ctors.*))
86 *(.ctors)
87
88 /* .dtors */
89 *crtbegin.o(.dtors)
90 *crtbegin?.o(.dtors)
91 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
92 *(SORT(.dtors.*))
93 *(.dtors)
94
95 *(.rodata*)
96
97 *(.eh_frame*)
98 } > FLASH
99
100 .ARM.extab :
101 {
102 *(.ARM.extab* .gnu.linkonce.armextab.*)
103 } > FLASH
104
105 __exidx_start = .;
106 .ARM.exidx :
107 {
108 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
109 } > FLASH
110 __exidx_end = .;
111
112 /* To copy multiple ROM to RAM sections,
113 * uncomment .copy.table section and,
114 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
115 /*
116 .copy.table :
117 {
118 . = ALIGN(4);
119 __copy_table_start__ = .;
120 LONG (__etext)
121 LONG (__data_start__)
122 LONG (__data_end__ - __data_start__)
123 LONG (__etext2)
124 LONG (__data2_start__)
125 LONG (__data2_end__ - __data2_start__)
126 __copy_table_end__ = .;
127 } > FLASH
128 */
129
130 /* To clear multiple BSS sections,
131 * uncomment .zero.table section and,
132 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
133 /*
134 .zero.table :
135 {
136 . = ALIGN(4);
137 __zero_table_start__ = .;
138 LONG (__bss_start__)
139 LONG (__bss_end__ - __bss_start__)
140 LONG (__bss2_start__)
141 LONG (__bss2_end__ - __bss2_start__)
142 __zero_table_end__ = .;
143 } > FLASH
144 */
145
146 __etext = .;
147
148 .data : AT (__etext)
149 {
150 __data_start__ = .;
151 *(vtable)
152 *(.data*)
153
154 . = ALIGN(4);
155 /* preinit data */
156 PROVIDE_HIDDEN (__preinit_array_start = .);
157 *(.preinit_array)
158 PROVIDE_HIDDEN (__preinit_array_end = .);
159
160 . = ALIGN(4);
161 /* init data */
162 PROVIDE_HIDDEN (__init_array_start = .);
163 *(SORT(.init_array.*))
164 *(.init_array)
165 PROVIDE_HIDDEN (__init_array_end = .);
166
167
168 . = ALIGN(4);
169 /* finit data */
170 PROVIDE_HIDDEN (__fini_array_start = .);
171 *(SORT(.fini_array.*))
172 *(.fini_array)
173 PROVIDE_HIDDEN (__fini_array_end = .);
174
175 *(.jcr)
176 . = ALIGN(4);
177 /* All data end */
178 __data_end__ = .;
179
180 } > RAM
181
182 .bss :
183 {
184 . = ALIGN(4);
185 __bss_start__ = .;
186 *(.bss*)
187 *(COMMON)
188 . = ALIGN(4);
189 __bss_end__ = .;
190 } > RAM
191
192 .heap (COPY):
193 {
194 __end__ = .;
195 PROVIDE(end = .);
196 *(.heap*)
197 __HeapLimit = .;
198 } > RAM
199
200 /* .stack_dummy section doesn't contains any symbols. It is only
201 * used for linker to calculate size of stack sections, and assign
202 * values to stack symbols later */
203 .stack_dummy (COPY):
204 {
205 *(.stack*)
206 } > RAM
207
208 /* Set stack top to end of RAM, and stack limit move down by
209 * size of stack_dummy section */
210 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
211 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
212 PROVIDE(__stack = __StackTop);
213
214 /* Check if data + heap + stack exceeds RAM limit */
215 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
216 }
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@@ -0,0 +1,217
1 /*------------------------------------------------------------------------------
2 -- This file is a part of the libuc, microcontroler library
3 -- Copyright (C) 2013, Alexis Jeandet
4 --
5 -- This program is free software; you can redistribute it and/or modify
6 -- it under the terms of the GNU General Public License as published by
7 -- the Free Software Foundation; either version 3 of the License, or
8 -- (at your option) any later version.
9 --
10 -- This program is distributed in the hope that it will be useful,
11 -- but WITHOUT ANY WARRANTY; without even the implied warranty of
12 -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 -- GNU General Public License for more details.
14 --
15 -- You should have received a copy of the GNU General Public License
16 -- along with this program; if not, write to the Free Software
17 -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 -------------------------------------------------------------------------------
19 -- Author : Alexis Jeandet
20 -- Mail : alexis.jeandet@member.fsf.org
21 -------------------------------------------------------------------------------*/
22
23 /* Linker script to configure memory regions.
24 * Need modifying for a specific board.
25 * FLASH.ORIGIN: starting address of flash
26 * FLASH.LENGTH: length of flash
27 * RAM.ORIGIN: starting address of RAM bank 0
28 * RAM.LENGTH: length of RAM bank 0
29 */
30 MEMORY
31 {
32 FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
33 RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k
34 ETHRAM (xrw) : ORIGIN = 0x2001C000, LENGTH = 16k
35 AUXRAM (xrw) : ORIGIN = 0x20020000, LENGTH = 64k
36 CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k
37 MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
38 }
39
40 /* Linker script to place sections and symbol values. Should be used together
41 * with other linker script that defines memory regions FLASH and RAM.
42 * It references following symbols, which must be defined in code:
43 * Reset_Handler : Entry of reset handler
44 *
45 * It defines following symbols, which code can use without definition:
46 * __exidx_start
47 * __exidx_end
48 * __copy_table_start__
49 * __copy_table_end__
50 * __zero_table_start__
51 * __zero_table_end__
52 * __etext
53 * __data_start__
54 * __preinit_array_start
55 * __preinit_array_end
56 * __init_array_start
57 * __init_array_end
58 * __fini_array_start
59 * __fini_array_end
60 * __data_end__
61 * __bss_start__
62 * __bss_end__
63 * __end__
64 * end
65 * __HeapLimit
66 * __StackLimit
67 * __StackTop
68 * __stack
69 */
70 ENTRY(Reset_Handler)
71
72 SECTIONS
73 {
74 .text :
75 {
76 KEEP(*(.isr_vector))
77 *(.text*)
78
79 *(.init)
80 *(.fini)
81
82 /* .ctors */
83 *crtbegin.o(.ctors)
84 *crtbegin?.o(.ctors)
85 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
86 *(SORT(.ctors.*))
87 *(.ctors)
88
89 /* .dtors */
90 *crtbegin.o(.dtors)
91 *crtbegin?.o(.dtors)
92 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
93 *(SORT(.dtors.*))
94 *(.dtors)
95
96 *(.rodata*)
97
98 *(.eh_frame*)
99 } > FLASH
100
101 .ARM.extab :
102 {
103 *(.ARM.extab* .gnu.linkonce.armextab.*)
104 } > FLASH
105
106 __exidx_start = .;
107 .ARM.exidx :
108 {
109 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
110 } > FLASH
111 __exidx_end = .;
112
113 /* To copy multiple ROM to RAM sections,
114 * uncomment .copy.table section and,
115 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
116 /*
117 .copy.table :
118 {
119 . = ALIGN(4);
120 __copy_table_start__ = .;
121 LONG (__etext)
122 LONG (__data_start__)
123 LONG (__data_end__ - __data_start__)
124 LONG (__etext2)
125 LONG (__data2_start__)
126 LONG (__data2_end__ - __data2_start__)
127 __copy_table_end__ = .;
128 } > FLASH
129 */
130
131 /* To clear multiple BSS sections,
132 * uncomment .zero.table section and,
133 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
134 /*
135 .zero.table :
136 {
137 . = ALIGN(4);
138 __zero_table_start__ = .;
139 LONG (__bss_start__)
140 LONG (__bss_end__ - __bss_start__)
141 LONG (__bss2_start__)
142 LONG (__bss2_end__ - __bss2_start__)
143 __zero_table_end__ = .;
144 } > FLASH
145 */
146
147 __etext = .;
148
149 .data : AT (__etext)
150 {
151 __data_start__ = .;
152 *(vtable)
153 *(.data*)
154
155 . = ALIGN(4);
156 /* preinit data */
157 PROVIDE_HIDDEN (__preinit_array_start = .);
158 *(.preinit_array)
159 PROVIDE_HIDDEN (__preinit_array_end = .);
160
161 . = ALIGN(4);
162 /* init data */
163 PROVIDE_HIDDEN (__init_array_start = .);
164 *(SORT(.init_array.*))
165 *(.init_array)
166 PROVIDE_HIDDEN (__init_array_end = .);
167
168
169 . = ALIGN(4);
170 /* finit data */
171 PROVIDE_HIDDEN (__fini_array_start = .);
172 *(SORT(.fini_array.*))
173 *(.fini_array)
174 PROVIDE_HIDDEN (__fini_array_end = .);
175
176 *(.jcr)
177 . = ALIGN(4);
178 /* All data end */
179 __data_end__ = .;
180
181 } > RAM
182
183 .bss :
184 {
185 . = ALIGN(4);
186 __bss_start__ = .;
187 *(.bss*)
188 *(COMMON)
189 . = ALIGN(4);
190 __bss_end__ = .;
191 } > RAM
192
193 .heap (COPY):
194 {
195 __end__ = .;
196 PROVIDE(end = .);
197 *(.heap*)
198 __HeapLimit = .;
199 } > RAM
200
201 /* .stack_dummy section doesn't contains any symbols. It is only
202 * used for linker to calculate size of stack sections, and assign
203 * values to stack symbols later */
204 .stack_dummy (COPY):
205 {
206 *(.stack*)
207 } > RAM
208
209 /* Set stack top to end of RAM, and stack limit move down by
210 * size of stack_dummy section */
211 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
212 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
213 PROVIDE(__stack = __StackTop);
214
215 /* Check if data + heap + stack exceeds RAM limit */
216 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
217 }
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@@ -36,6 +36,7 uint32_t INTOSC =16000000;
36 uint32_t RTCOSC =32768;
36 uint32_t RTCOSC =32768;
37 uint32_t currentCpuFreq=0;
37 uint32_t currentCpuFreq=0;
38 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
38 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
39 gpio_t TickLed = LED1;
39
40
40 LCD_IF_t lcdIF0={
41 LCD_IF_t lcdIF0={
41 .init = &bsp_FSMC_init,
42 .init = &bsp_FSMC_init,
Show file before | Show file after | Hide comments
@@ -30,6 +30,7 uint32_t INTOSC =16000000;
30 uint32_t RTCOSC =32768;
30 uint32_t RTCOSC =32768;
31 uint32_t currentCpuFreq=0;
31 uint32_t currentCpuFreq=0;
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33 gpio_t TickLed = LED1;
33
34
34 float VREF0 =(float)3.3;
35 float VREF0 =(float)3.3;
35
36
Show file before | Show file after | Hide comments
@@ -32,6 +32,7 uint32_t INTOSC =16000000;
32 uint32_t RTCOSC =32768;
32 uint32_t RTCOSC =32768;
33 uint32_t currentCpuFreq=0;
33 uint32_t currentCpuFreq=0;
34 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
34 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
35 gpio_t TickLed = LED1;
35
36
36 float VREF0 =(float)3.3;
37 float VREF0 =(float)3.3;
37
38
Show file before | Show file after | Hide comments
@@ -39,7 +39,7 uint32_t INTOSC =16000000;
39 uint32_t RTCOSC =32768;
39 uint32_t RTCOSC =32768;
40 uint32_t currentCpuFreq=0;
40 uint32_t currentCpuFreq=0;
41 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
41 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
42
42 gpio_t TickLed = LED1;
43
43
44
44
45 LCD_IF_t lcdIF0={
45 LCD_IF_t lcdIF0={
Show file before | Show file after | Hide comments
@@ -32,6 +32,7 uint32_t INTOSC =16000000;
32 uint32_t RTCOSC =32768;
32 uint32_t RTCOSC =32768;
33 uint32_t currentCpuFreq=0;
33 uint32_t currentCpuFreq=0;
34 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
34 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
35 gpio_t TickLed = LED1;
35
36
36 float VREF0 =(float)3.3;
37 float VREF0 =(float)3.3;
37
38
Show file before | Show file after | Hide comments
@@ -39,7 +39,7 uint32_t INTOSC =16000000;
39 uint32_t RTCOSC =32768;
39 uint32_t RTCOSC =32768;
40 uint32_t currentCpuFreq=0;
40 uint32_t currentCpuFreq=0;
41 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
41 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
42
42 gpio_t TickLed = LED1;
43
43
44 float VREF0 =(float)3.3;
44 float VREF0 =(float)3.3;
45
45
Show file before | Show file after | Hide comments
@@ -30,6 +30,7 uint32_t INTOSC =16000000;
30 uint32_t RTCOSC =32768;
30 uint32_t RTCOSC =32768;
31 uint32_t currentCpuFreq=0;
31 uint32_t currentCpuFreq=0;
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33 gpio_t TickLed = LED1;
33
34
34 float VREF0 =(float)3.3;
35 float VREF0 =(float)3.3;
35
36
Show file before | Show file after | Hide comments
@@ -36,6 +36,7 uint32_t INTOSC =16000000;
36 uint32_t RTCOSC =32768;
36 uint32_t RTCOSC =32768;
37 uint32_t currentCpuFreq=0;
37 uint32_t currentCpuFreq=0;
38 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
38 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
39 gpio_t TickLed = LED1;
39
40
40 float VREF0 =(float)3.3;
41 float VREF0 =(float)3.3;
41
42
Show file before | Show file after | Hide comments
@@ -38,6 +38,7 uint32_t INTOSC =16000000;
38 uint32_t RTCOSC =32768;
38 uint32_t RTCOSC =32768;
39 uint32_t currentCpuFreq=0;
39 uint32_t currentCpuFreq=0;
40 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
40 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
41 gpio_t TickLed = LED1;
41
42
42 volatile uint8_t* lcd0_CMD=(volatile uint8_t*)0x60000000;
43 volatile uint8_t* lcd0_CMD=(volatile uint8_t*)0x60000000;
43 volatile uint8_t* lcd0_DATA=(volatile uint8_t*)0x61FFFFF0;
44 volatile uint8_t* lcd0_DATA=(volatile uint8_t*)0x61FFFFF0;
Show file before | Show file after | Hide comments
@@ -30,6 +30,7 uint32_t INTOSC =16000000;
30 uint32_t RTCOSC =32768;
30 uint32_t RTCOSC =32768;
31 uint32_t currentCpuFreq=0;
31 uint32_t currentCpuFreq=0;
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
32 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
33 gpio_t TickLed = LED1;
33
34
34 float VREF0 =(float)3.3;
35 float VREF0 =(float)3.3;
35
36
Show file before | Show file after | Hide comments
@@ -35,6 +35,7 uint32_t INTOSC =16000000;
35 uint32_t RTCOSC =32768;
35 uint32_t RTCOSC =32768;
36 uint32_t currentCpuFreq=0;
36 uint32_t currentCpuFreq=0;
37 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
37 extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];
38 gpio_t TickLed = LED1;
38
39
39 LCD_IF_t lcdIF0={
40 LCD_IF_t lcdIF0={
40 .init = &bsp_FSMC_init,
41 .init = &bsp_FSMC_init,
@@ -71,6 +72,8 int bsp_init()
71 {
72 {
72 __opnfiles__[i] = NULL;
73 __opnfiles__[i] = NULL;
73 }
74 }
75 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
76 RCC_AHB1Periph_GPIOG, ENABLE);
74 bsp_GPIO_init();
77 bsp_GPIO_init();
75 bsp_uart_init();
78 bsp_uart_init();
76 bsp_iic_init();
79 bsp_iic_init();
@@ -226,35 +229,47 int bsp_FSMC_init()
226 /* Enable FSMC NOR/SRAM Bank1 */
229 /* Enable FSMC NOR/SRAM Bank1 */
227 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
230 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
228
231
232 gpio_t SRAM_DBxList[]={
233 PF0,PF1,PF2,PF3,PF4,PF5,PF12,PF13,
234 PF14,PF15,
235 PD11,PD12,PD13,PG9,PE0,PE1};
229
236
230 p.FSMC_AddressSetupTime = getCpuFreq()/50000000;
237 for(int i=0;i<22;i++)
231 p.FSMC_AddressHoldTime = 0;
238 {
232 p.FSMC_DataSetupTime = getCpuFreq()/25000000;
239 gpio_t SRAM_DBx = gpioopen(SRAM_DBxList[i]);
233 p.FSMC_BusTurnAroundDuration = 1;
240 SRAM_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
234 p.FSMC_CLKDivision = 0;
241 gpiosetconfig(&SRAM_DBx);
235 p.FSMC_DataLatency = 0;
242 GPIO_PinAFConfig(GPIOGETPORT(SRAM_DBx), (uint8_t)(SRAM_DBx & 0xF), GPIO_AF_FSMC);
236 p.FSMC_AccessMode = FSMC_AccessMode_A;
243 }
244 /*-- FSMC Configuration ------------------------------------------------------*/
245 p.FSMC_AddressSetupTime = 3;
246 p.FSMC_AddressHoldTime = 0;
247 p.FSMC_DataSetupTime = 6;
248 p.FSMC_BusTurnAroundDuration = 1;
249 p.FSMC_CLKDivision = 0;
250 p.FSMC_DataLatency = 0;
251 p.FSMC_AccessMode = FSMC_AccessMode_A;
237
252
238 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
253 FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
239 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
254 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
240 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
255 FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
241 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
256 FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
242 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
257 FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
243 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
258 FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
244 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
259 FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
245 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
260 FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
246 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
261 FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
247 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
262 FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
248 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
263 FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
249 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
264 FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
250 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
265 FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
251 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
266 FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
252 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
267 FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
253
268
254 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
269 FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
255
270
256 /*!< Enable FSMC Bank1_SRAM2 Bank */
271 /*!< Enable FSMC Bank1_SRAM2 Bank */
257 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
272 FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
258 lcd0.init(&lcd0);
273 lcd0.init(&lcd0);
259 return 1;
274 return 1;
260 }
275 }
@@ -346,17 +361,12 void bsp_lcd0_readGRAM(void* buffer,uint
346
361
347 void bsp_GTerm_init()
362 void bsp_GTerm_init()
348 {
363 {
349 if(__opnfiles__[1]==NULL)
364
350 {
351 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
365 streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
352 ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0);
366 ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0);
353 terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1);
367 terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1);
368 terminal_setgeometry(&terminal0,5,5,terminal0.LCD->width-10,(terminal0.LCD->height)-10);
354 __opnfiles__[1] = fd1;
369 __opnfiles__[1] = fd1;
355 }
356 else
357 {
358
359 }
360 }
370 }
361
371
362
372
Show file before | Show file after | Hide comments
@@ -10,7 +10,8 SUBDIRS += STM32F4Discovery \
10 STM32F4Discovery-ILI9328-8bits \
10 STM32F4Discovery-ILI9328-8bits \
11 OPLAYER \
11 OPLAYER \
12 STM32-E407 \
12 STM32-E407 \
13 STM32F429Discovery
13 STM32F429Discovery \
14 STM32F4Discovery_35LCD
14
15
15
16
16
17
Show file before | Show file after | Hide comments
@@ -35,6 +35,22 typedef struct LCD_IF_t
35 void (*readGRAM)(void* buffer,uint32_t count);
35 void (*readGRAM)(void* buffer,uint32_t count);
36 }LCD_IF_t;
36 }LCD_IF_t;
37
37
38 /**
39 * @brief Lcd buffer
40 *
41 * This structure contains a W width an H height buffer poiter to be copied to the screen at X;Y position.
42 */
43
44 typedef struct LCD_BUFFER_t
45 {
46 void* buffer; /**< Buffer pointer write on pixels you want to print*/
47 uint32_t size; /**< The size of the buffer in bytes*/
48 uint16_t X; /**< The X position of the buffer*/
49 uint16_t Y; /**< The Y position of the buffer*/
50 uint16_t W; /**< The width of the buffer*/
51 uint16_t H; /**< The height of the buffer*/
52 }LCD_BUFFER_t;
53
38 typedef struct LCD_t
54 typedef struct LCD_t
39 {
55 {
40 LCD_IF_t* interface;
56 LCD_IF_t* interface;
@@ -44,6 +60,8 typedef struct LCD_t
44 void (*paintFilRect)(struct LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
60 void (*paintFilRect)(struct LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor);
45 void (*getPix)(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
61 void (*getPix)(struct LCD_t* LCD,uint16_t* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h);
46 void (*refreshenable)(struct LCD_t* LCD,int enable);
62 void (*refreshenable)(struct LCD_t* LCD,int enable);
63 LCD_BUFFER_t* (*getBuffer)(struct LCD_t* LCD);
64 void (*writeBuffer)(struct LCD_t* LCD,LCD_BUFFER_t* buffer);
47 uint16_t width;
65 uint16_t width;
48 uint16_t height;
66 uint16_t height;
49 }LCD_t;
67 }LCD_t;
Show file before | Show file after | Hide comments
@@ -27,6 +27,7 INCLUDEPATH += $$[QT_INSTALL_HEADERS] \
27 $$[QT_INSTALL_HEADERS]/ADC \
27 $$[QT_INSTALL_HEADERS]/ADC \
28 $$[QT_INSTALL_HEADERS]/GRAPHIC/CONTROLERS \
28 $$[QT_INSTALL_HEADERS]/GRAPHIC/CONTROLERS \
29 $$[QT_INSTALL_HEADERS]/GRAPHIC/TC_CONTROLERS \
29 $$[QT_INSTALL_HEADERS]/GRAPHIC/TC_CONTROLERS \
30 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI \
30 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/FONTS \
31 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/FONTS \
31 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/Widgets
32 $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/Widgets
32
33
Show file before | Show file after | Hide comments
@@ -22,18 +22,23 DEFINES += BSP="\"\\\"$$BSP"\\\"\"
22
22
23
23
24 contains(CPU, stm32f42x){
24 contains(CPU, stm32f42x){
25 LDSCRIPT=stm32f42_flash.ld
25 LDSCRIPT=stm32f42.ld
26 }
26 }
27 contains(CPU, stm32f4xxxG){
27 contains(CPU, stm32f4xxxG){
28 LDSCRIPT=stm32_flash.ld
28 LDSCRIPT=stm32f4.ld
29 }
29 }
30
30
31
31
32 contains( TEMPLATE, app ) {
32 contains( TEMPLATE, app ) {
33
33
34 unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin && python $$[QT_INSTALL_BINS]/dfu.py -b 0x08000000:"$$DESTDIR/"$(QMAKE_TARGET).bin " $$DESTDIR/"$(QMAKE_TARGET).dfu"
34 unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" $$escape_expand(\\n\\t)
35 win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin"
35 unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O binary "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" $$escape_expand(\\n\\t)
36
36 win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" $$escape_expand(\\n\\t)
37 win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O binary "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" $$escape_expand(\\n\\t)
38
39 contains( CONFIG, dfu ){
40 unix:QMAKE_POST_LINK += python $$[QT_INSTALL_BINS]/dfu.py -b 0x08000000:$$DESTDIR/"$(QMAKE_TARGET).bin" $$DESTDIR/"$(QMAKE_TARGET).dfu" $$escape_expand(\\n\\t)
41 }
37
42
38 LIBS += -L$$[QT_INSTALL_PREFIX]/bsp/lib/$$BSP -lbsp
43 LIBS += -L$$[QT_INSTALL_PREFIX]/bsp/lib/$$BSP -lbsp
39 LIBS += -L$$[QT_INSTALL_LIBS]/$$UCMODEL
44 LIBS += -L$$[QT_INSTALL_LIBS]/$$UCMODEL
@@ -46,7 +51,7 contains( TEMPLATE, app ) {
46
51
47 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/syscalls.c
52 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/syscalls.c
48 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/fs.c
53 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/fs.c
49 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/startup.s
54 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/crt0.s
50 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/cpuinit.c
55 SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/cpuinit.c
51
56
52
57
Show file before | Show file after | Hide comments
@@ -137,11 +137,11 int _read(int file, char *ptr, int len)
137
137
138 caddr_t _sbrk(int incr) {
138 caddr_t _sbrk(int incr) {
139 register char * stack_ptr __asm__ ("sp");
139 register char * stack_ptr __asm__ ("sp");
140 extern char _end; /* Defined by the linker */
140 extern char end; /* Defined by the linker */
141 static char *heap_end;
141 static char *heap_end;
142 char *prev_heap_end;
142 char *prev_heap_end;
143 if (heap_end == 0) {
143 if (heap_end == 0) {
144 heap_end = &_end;
144 heap_end = &end;
145 }
145 }
146 prev_heap_end = heap_end;
146 prev_heap_end = heap_end;
147 if (heap_end + incr > stack_ptr) {
147 if (heap_end + incr > stack_ptr) {
@@ -225,11 +225,11 int _close_r (struct _reent *r, int file
225 caddr_t _sbrk_r (struct _reent *r, int incr)
225 caddr_t _sbrk_r (struct _reent *r, int incr)
226 {
226 {
227 register char * stack_ptr __asm__ ("sp");
227 register char * stack_ptr __asm__ ("sp");
228 extern char _end; /* Defined by the linker */
228 extern char end; /* Defined by the linker */
229 static char *heap_end;
229 static char *heap_end;
230 char *prev_heap_end;
230 char *prev_heap_end;
231 if (heap_end == 0) {
231 if (heap_end == 0) {
232 heap_end = &_end;
232 heap_end = &end;
233 }
233 }
234 prev_heap_end = heap_end;
234 prev_heap_end = heap_end;
235 if (heap_end + incr > stack_ptr) {
235 if (heap_end + incr > stack_ptr) {
Show file before | Show file after | Hide comments
@@ -1,6 +1,7
1 TEMPLATE = subdirs
1 TEMPLATE = subdirs
2 SUBDIRS += ILI9328 \
2 SUBDIRS += ILI9328 \
3 SSD2119
3 SSD2119 \
4 D51E5TA7601
4
5
5
6
6
7
Show file before | Show file after | Hide comments
@@ -1,5 +1,6
1 TEMPLATE = subdirs
1 TEMPLATE = subdirs
2 SUBDIRS += CONTROLERS \
2 SUBDIRS += CONTROLERS \
3 PAINTING \
3 TC_CONTROLERS \
4 TC_CONTROLERS \
4 GUI
5 GUI
5
6
Show file before | Show file after | Hide comments
@@ -26,9 +26,11
26 #include <core_cm4.h>
26 #include <core_cm4.h>
27 #include <gpio.h>
27 #include <gpio.h>
28
28
29
29 extern uint32_t OSC0;
30 extern uint32_t OSC0;
30 extern uint32_t INTOSC;
31 extern uint32_t INTOSC;
31 extern uint32_t RTCOSC;
32 extern uint32_t RTCOSC;
33 extern gpio_t TickLed;
32
34
33 volatile uint32_t tickCounter=0;
35 volatile uint32_t tickCounter=0;
34
36
@@ -37,7 +39,7 void SysTick_Handler(void)
37 {
39 {
38 tickCounter+=1;
40 tickCounter+=1;
39 if((tickCounter&0xFFF)==0x800)
41 if((tickCounter&0xFFF)==0x800)
40 gpiosetval(PC15,!gpiogetval(PC15));
42 gpiosetval(TickLed,!gpiogetval(TickLed));
41 }
43 }
42
44
43 void delay_us(uint32_t value)
45 void delay_us(uint32_t value)
Show file before | Show file after | Hide comments
@@ -7,7 +7,7 include(STM32F4xx_StdPeriph_Driver/STM32
7
7
8 UCMODEL=stm32f4
8 UCMODEL=stm32f4
9
9
10 FILESTOCOPY.files = cpu.pri stm32_flash.ld stm32f42_flash.ld startup.s cpuinit.c fs.c syscalls.c
10 FILESTOCOPY.files = cpu.pri stm32f4.ld stm32f42.ld crt0.s cpuinit.c fs.c syscalls.c
11 FILESTOCOPY.path = $$[QT_INSTALL_PREFIX]/mkspecs/features/$$UCMODEL
11 FILESTOCOPY.path = $$[QT_INSTALL_PREFIX]/mkspecs/features/$$UCMODEL
12
12
13
13
@@ -16,7 +16,14 INCLUDEPATH += \
16 CMSIS/Include
16 CMSIS/Include
17
17
18 SOURCES += cpu.c
18 SOURCES += cpu.c
19 OTHER_FILES += cpu.pri stm32_flash.ld stm32f42_flash.ld startup.s cpuinit.c fs.c syscalls.c
19
20 OTHER_FILES += cpu.pri \
21 stm32f4.ld \
22 stm32f42.ld \
23 crt0.s \
24 cpuinit.c \
25 fs.c \
26 syscalls.c
20
27
21
28
22
29
Show file before | Show file after | Hide comments
@@ -137,11 +137,11 int _read(int file, char *ptr, int len)
137
137
138 caddr_t _sbrk(int incr) {
138 caddr_t _sbrk(int incr) {
139 register char * stack_ptr __asm__ ("sp");
139 register char * stack_ptr __asm__ ("sp");
140 extern char _end; /* Defined by the linker */
140 extern char end; /* Defined by the linker */
141 static char *heap_end;
141 static char *heap_end;
142 char *prev_heap_end;
142 char *prev_heap_end;
143 if (heap_end == 0) {
143 if (heap_end == 0) {
144 heap_end = &_end;
144 heap_end = &end;
145 }
145 }
146 prev_heap_end = heap_end;
146 prev_heap_end = heap_end;
147 if (heap_end + incr > stack_ptr) {
147 if (heap_end + incr > stack_ptr) {
@@ -225,11 +225,11 int _close_r (struct _reent *r, int file
225 caddr_t _sbrk_r (struct _reent *r, int incr)
225 caddr_t _sbrk_r (struct _reent *r, int incr)
226 {
226 {
227 register char * stack_ptr __asm__ ("sp");
227 register char * stack_ptr __asm__ ("sp");
228 extern char _end; /* Defined by the linker */
228 extern char end; /* Defined by the linker */
229 static char *heap_end;
229 static char *heap_end;
230 char *prev_heap_end;
230 char *prev_heap_end;
231 if (heap_end == 0) {
231 if (heap_end == 0) {
232 heap_end = &_end;
232 heap_end = &end;
233 }
233 }
234 prev_heap_end = heap_end;
234 prev_heap_end = heap_end;
235 if (heap_end + incr > stack_ptr) {
235 if (heap_end + incr > stack_ptr) {
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@@ -26,6 +26,7
26 #include <stm32f4xx_gpio.h>
26 #include <stm32f4xx_gpio.h>
27 #include <gpio.h>
27 #include <gpio.h>
28 #include <core.h>
28 #include <core.h>
29 #include <stdio.h>
29
30
30 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
31 #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
31 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
32 #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
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